Daniel Vetter 426115cf5d drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence ...

No need to call the ->pre_pll_enable hook twice if we don't enable the
dpll too early. This should make Jani a bit less grumpy.

v2: Rebase on top of the newly-colored BUG_ONs.

v3: Reinstate the lost write of the DPLL_MD register, spotted by Imre.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2013-07-12 18:54:01 +02:00

..

drm

drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence

2013-07-12 18:54:01 +02:00

host1x

gpu: host1x: Rework CPU syncpoint increment

2013-06-22 12:43:55 +02:00

vga

fbcon: fix locking harder

2013-02-08 12:02:43 +10:00

Makefile

gpu: host1x: Add host1x driver

2013-04-22 12:32:40 +02:00