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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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72324ac52d
We are about to add 52 bit PA guest modes for 4K and 16K pages when the system supports LPA2. In preparation beef up the logic that parses mmfr0 to also tell us what the maximum supported PA size is for each page size. Max PA size = 0 implies the page size is not supported at all. Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20231127111737.1897081-12-ryan.roberts@arm.com
234 lines
6.3 KiB
C
234 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AArch64 processor specific defines
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*
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* Copyright (C) 2018, Red Hat, Inc.
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*/
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#ifndef SELFTEST_KVM_PROCESSOR_H
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#define SELFTEST_KVM_PROCESSOR_H
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#include "kvm_util.h"
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#include <linux/stringify.h>
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#include <linux/types.h>
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#include <asm/sysreg.h>
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#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
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KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
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/*
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* KVM_ARM64_SYS_REG(sys_reg_id): Helper macro to convert
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* SYS_* register definitions in asm/sysreg.h to use in KVM
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* calls such as vcpu_get_reg() and vcpu_set_reg().
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*/
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#define KVM_ARM64_SYS_REG(sys_reg_id) \
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ARM64_SYS_REG(sys_reg_Op0(sys_reg_id), \
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sys_reg_Op1(sys_reg_id), \
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sys_reg_CRn(sys_reg_id), \
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sys_reg_CRm(sys_reg_id), \
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sys_reg_Op2(sys_reg_id))
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/*
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* Default MAIR
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* index attribute
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* DEVICE_nGnRnE 0 0000:0000
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* DEVICE_nGnRE 1 0000:0100
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* DEVICE_GRE 2 0000:1100
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* NORMAL_NC 3 0100:0100
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* NORMAL 4 1111:1111
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* NORMAL_WT 5 1011:1011
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*/
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/* Linux doesn't use these memory types, so let's define them. */
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#define MAIR_ATTR_DEVICE_GRE UL(0x0c)
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#define MAIR_ATTR_NORMAL_WT UL(0xbb)
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#define MT_DEVICE_nGnRnE 0
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#define MT_DEVICE_nGnRE 1
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#define MT_DEVICE_GRE 2
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#define MT_NORMAL_NC 3
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#define MT_NORMAL 4
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#define MT_NORMAL_WT 5
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#define DEFAULT_MAIR_EL1 \
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(MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
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MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
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MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT))
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#define MPIDR_HWID_BITMASK (0xff00fffffful)
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void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init);
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struct kvm_vcpu *aarch64_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id,
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struct kvm_vcpu_init *init, void *guest_code);
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struct ex_regs {
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u64 regs[31];
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u64 sp;
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u64 pc;
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u64 pstate;
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};
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#define VECTOR_NUM 16
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enum {
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VECTOR_SYNC_CURRENT_SP0,
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VECTOR_IRQ_CURRENT_SP0,
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VECTOR_FIQ_CURRENT_SP0,
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VECTOR_ERROR_CURRENT_SP0,
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VECTOR_SYNC_CURRENT,
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VECTOR_IRQ_CURRENT,
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VECTOR_FIQ_CURRENT,
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VECTOR_ERROR_CURRENT,
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VECTOR_SYNC_LOWER_64,
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VECTOR_IRQ_LOWER_64,
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VECTOR_FIQ_LOWER_64,
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VECTOR_ERROR_LOWER_64,
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VECTOR_SYNC_LOWER_32,
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VECTOR_IRQ_LOWER_32,
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VECTOR_FIQ_LOWER_32,
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VECTOR_ERROR_LOWER_32,
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};
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#define VECTOR_IS_SYNC(v) ((v) == VECTOR_SYNC_CURRENT_SP0 || \
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(v) == VECTOR_SYNC_CURRENT || \
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(v) == VECTOR_SYNC_LOWER_64 || \
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(v) == VECTOR_SYNC_LOWER_32)
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#define ESR_EC_NUM 64
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#define ESR_EC_SHIFT 26
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#define ESR_EC_MASK (ESR_EC_NUM - 1)
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#define ESR_EC_UNKNOWN 0x0
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#define ESR_EC_SVC64 0x15
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#define ESR_EC_IABT 0x21
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#define ESR_EC_DABT 0x25
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#define ESR_EC_HW_BP_CURRENT 0x31
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#define ESR_EC_SSTEP_CURRENT 0x33
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#define ESR_EC_WP_CURRENT 0x35
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#define ESR_EC_BRK_INS 0x3c
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/* Access flag */
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#define PTE_AF (1ULL << 10)
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/* Access flag update enable/disable */
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#define TCR_EL1_HA (1ULL << 39)
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void aarch64_get_supported_page_sizes(uint32_t ipa, uint32_t *ipa4k,
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uint32_t *ipa16k, uint32_t *ipa64k);
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void vm_init_descriptor_tables(struct kvm_vm *vm);
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void vcpu_init_descriptor_tables(struct kvm_vcpu *vcpu);
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typedef void(*handler_fn)(struct ex_regs *);
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void vm_install_exception_handler(struct kvm_vm *vm,
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int vector, handler_fn handler);
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void vm_install_sync_handler(struct kvm_vm *vm,
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int vector, int ec, handler_fn handler);
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uint64_t *virt_get_pte_hva(struct kvm_vm *vm, vm_vaddr_t gva);
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static inline void cpu_relax(void)
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{
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asm volatile("yield" ::: "memory");
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}
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#define isb() asm volatile("isb" : : : "memory")
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#define dsb(opt) asm volatile("dsb " #opt : : : "memory")
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#define dmb(opt) asm volatile("dmb " #opt : : : "memory")
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#define dma_wmb() dmb(oshst)
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#define __iowmb() dma_wmb()
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#define dma_rmb() dmb(oshld)
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#define __iormb(v) \
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({ \
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unsigned long tmp; \
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\
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dma_rmb(); \
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\
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/* \
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* Courtesy of arch/arm64/include/asm/io.h: \
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* Create a dummy control dependency from the IO read to any \
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* later instructions. This ensures that a subsequent call \
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* to udelay() will be ordered due to the ISB in __delay(). \
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*/ \
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asm volatile("eor %0, %1, %1\n" \
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"cbnz %0, ." \
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: "=r" (tmp) : "r" ((unsigned long)(v)) \
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: "memory"); \
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})
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static __always_inline void __raw_writel(u32 val, volatile void *addr)
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{
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asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
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}
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static __always_inline u32 __raw_readl(const volatile void *addr)
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{
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u32 val;
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asm volatile("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
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return val;
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}
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#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c)))
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#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
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#define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c));})
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#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(__v); __v; })
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static inline void local_irq_enable(void)
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{
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asm volatile("msr daifclr, #3" : : : "memory");
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}
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static inline void local_irq_disable(void)
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{
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asm volatile("msr daifset, #3" : : : "memory");
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}
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/**
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* struct arm_smccc_res - Result from SMC/HVC call
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* @a0-a3 result values from registers 0 to 3
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*/
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struct arm_smccc_res {
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unsigned long a0;
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unsigned long a1;
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unsigned long a2;
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unsigned long a3;
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};
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/**
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* smccc_hvc - Invoke a SMCCC function using the hvc conduit
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* @function_id: the SMCCC function to be called
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* @arg0-arg6: SMCCC function arguments, corresponding to registers x1-x7
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* @res: pointer to write the return values from registers x0-x3
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*
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*/
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void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1,
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uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5,
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uint64_t arg6, struct arm_smccc_res *res);
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/**
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* smccc_smc - Invoke a SMCCC function using the smc conduit
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* @function_id: the SMCCC function to be called
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* @arg0-arg6: SMCCC function arguments, corresponding to registers x1-x7
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* @res: pointer to write the return values from registers x0-x3
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*
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*/
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void smccc_smc(uint32_t function_id, uint64_t arg0, uint64_t arg1,
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uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5,
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uint64_t arg6, struct arm_smccc_res *res);
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uint32_t guest_get_vcpuid(void);
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#endif /* SELFTEST_KVM_PROCESSOR_H */
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