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d127db1a23
To allow ACPI's _STA value to hide CPUs that are present, but not available to online right now due to VMM or firmware policy, the register_cpu() call needs to be made by the ACPI machinery when ACPI is in use. This allows it to hide CPUs that are unavailable from sysfs. Switching to GENERIC_CPU_DEVICES is an intermediate step to allow all five ACPI architectures to be modified at once. Switch over to GENERIC_CPU_DEVICES, and provide an arch_register_cpu() that populates the hotpluggable flag. arch_register_cpu() is also the interface the ACPI machinery expects. The struct cpu in struct cpuinfo_arm64 is never used directly, remove it to use the one GENERIC_CPU_DEVICES provides. This changes the CPUs visible in sysfs from possible to present, but on arm64 smp_prepare_cpus() ensures these are the same. This patch also has the effect of moving the registration of CPUs from subsys to driver core initialisation, prior to any initcalls running. Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk> Reviewed-by: Shaoqin Huang <shahuang@redhat.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/E1r5R3b-00Csza-Ku@rmk-PC.armlinux.org.uk Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
1.5 KiB
C
77 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014 ARM Ltd.
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*/
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#ifndef __ASM_CPU_H
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#define __ASM_CPU_H
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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/*
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* Records attributes of an individual CPU.
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*/
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struct cpuinfo_32bit {
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u32 reg_id_dfr0;
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u32 reg_id_dfr1;
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u32 reg_id_isar0;
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u32 reg_id_isar1;
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u32 reg_id_isar2;
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u32 reg_id_isar3;
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u32 reg_id_isar4;
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u32 reg_id_isar5;
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u32 reg_id_isar6;
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u32 reg_id_mmfr0;
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u32 reg_id_mmfr1;
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u32 reg_id_mmfr2;
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u32 reg_id_mmfr3;
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u32 reg_id_mmfr4;
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u32 reg_id_mmfr5;
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u32 reg_id_pfr0;
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u32 reg_id_pfr1;
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u32 reg_id_pfr2;
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u32 reg_mvfr0;
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u32 reg_mvfr1;
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u32 reg_mvfr2;
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};
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struct cpuinfo_arm64 {
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struct kobject kobj;
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u64 reg_ctr;
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u64 reg_cntfrq;
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u64 reg_dczid;
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u64 reg_midr;
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u64 reg_revidr;
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u64 reg_gmid;
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u64 reg_smidr;
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u64 reg_id_aa64dfr0;
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u64 reg_id_aa64dfr1;
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u64 reg_id_aa64isar0;
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u64 reg_id_aa64isar1;
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u64 reg_id_aa64isar2;
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u64 reg_id_aa64mmfr0;
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u64 reg_id_aa64mmfr1;
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u64 reg_id_aa64mmfr2;
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u64 reg_id_aa64mmfr3;
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u64 reg_id_aa64pfr0;
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u64 reg_id_aa64pfr1;
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u64 reg_id_aa64zfr0;
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u64 reg_id_aa64smfr0;
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struct cpuinfo_32bit aarch32;
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};
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DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);
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void cpuinfo_store_cpu(void);
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void __init cpuinfo_store_boot_cpu(void);
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void __init init_cpu_features(struct cpuinfo_arm64 *info);
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void update_cpu_features(int cpu, struct cpuinfo_arm64 *info,
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struct cpuinfo_arm64 *boot);
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#endif /* __ASM_CPU_H */
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