Leo Chen 4012e0917b drm/amd/display: Exit idle optimizations before attempt to access PHY ...

[Why & How]
DMUB may hang when powering down pixel clocks due to no dprefclk.

It is fixed by exiting idle optimization before the attempt to access PHY.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo Chen <sancchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2023-07-25 13:40:28 -04:00

..

drm

drm/amd/display: Exit idle optimizations before attempt to access PHY

2023-07-25 13:40:28 -04:00

host1x

Merge tag 'drm/tegra/for-6.4-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next

2023-04-06 15:02:17 +02:00

ipu-v3

ipu-v3: Include <linux/io.h>

2023-05-18 11:06:18 +02:00

trace

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vga

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Makefile

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