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fe4bc1a086
The SpacemiT K1 SoC includes three USB ports: - One USB2.0 OTG port - One USB2.0 host-only port - One USB3.0 port with an integrated USB2.0 DRD interface Each of these ports is connected to a USB2.0 PHY responsible for USB2 transmission. This commit adds support for the SpacemiT K1 USB2.0 PHY, which is compliant with the USB 2.0 specification and supports both 8-bit 60MHz and 16-bit 30MHz parallel interfaces. Signed-off-by: Ze Huang <huang.ze@linux.dev> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Junzhong Pan <panjunzhong@linux.spacemit.com> Link: https://patch.msgid.link/20251017-k1-usb2phy-v6-2-7cf9ea2477a1@linux.dev Signed-off-by: Vinod Koul <vkoul@kernel.org>
48 lines
1.2 KiB
Makefile
48 lines
1.2 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the phy drivers.
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#
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
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obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o
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obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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obj-$(CONFIG_PHY_SNPS_EUSB2) += phy-snps-eusb2.o
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obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
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obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o
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obj-$(CONFIG_PHY_NXP_PTN3222) += phy-nxp-ptn3222.o
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obj-$(CONFIG_PHY_SPACEMIT_K1_PCIE) += phy-spacemit-k1-pcie.o
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obj-y += allwinner/ \
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amlogic/ \
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apple/ \
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broadcom/ \
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cadence/ \
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freescale/ \
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hisilicon/ \
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ingenic/ \
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intel/ \
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lantiq/ \
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marvell/ \
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mediatek/ \
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microchip/ \
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motorola/ \
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mscc/ \
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nuvoton/ \
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qualcomm/ \
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ralink/ \
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realtek/ \
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renesas/ \
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rockchip/ \
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samsung/ \
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socionext/ \
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sophgo/ \
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spacemit/ \
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st/ \
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starfive/ \
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sunplus/ \
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tegra/ \
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ti/ \
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xilinx/
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