Files
linux/arch
Valentine Barshak 340ffd267c [POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:20:18 -05:00
..
2007-09-30 17:36:22 +01:00
2007-08-11 15:47:40 -07:00
2007-09-06 11:10:56 +09:00
2007-09-11 17:21:20 -07:00
2007-08-27 00:29:25 -04:00
2007-08-22 13:32:07 +09:00
2007-09-19 11:24:18 -07:00
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