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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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afe789b736
For clarity. It's increasingly hard to reason about the code, when KASLR is moving around the boundaries. In this case where KASLR is randomizing the location of the kernel image within physical memory, the maximum number of address bits for physical memory has not changed. What has changed is the ending address of memory that is allowed to be directly mapped by the kernel. Let's name the variable, and the associated macro accordingly. Also, enhance the comment above the direct_map_physmem_end definition, to further clarify how this all works. Link: https://lkml.kernel.org/r/20241009025024.89813-1-jhubbard@nvidia.com Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Will Deacon <will@kernel.org> Reviewed-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Alistair Popple <apopple@nvidia.com> Cc: Jordan Niethe <jniethe@nvidia.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_PAGE_64_H
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#define _ASM_X86_PAGE_64_H
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#include <asm/page_64_types.h>
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#ifndef __ASSEMBLY__
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#include <asm/cpufeatures.h>
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#include <asm/alternative.h>
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#include <linux/kmsan-checks.h>
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/* duplicated to the one in bootmem.h */
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extern unsigned long max_pfn;
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extern unsigned long phys_base;
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extern unsigned long page_offset_base;
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extern unsigned long vmalloc_base;
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extern unsigned long vmemmap_base;
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extern unsigned long direct_map_physmem_end;
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static __always_inline unsigned long __phys_addr_nodebug(unsigned long x)
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{
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unsigned long y = x - __START_KERNEL_map;
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/* use the carry flag to determine if x was < __START_KERNEL_map */
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x = y + ((x > y) ? phys_base : (__START_KERNEL_map - PAGE_OFFSET));
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return x;
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}
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#ifdef CONFIG_DEBUG_VIRTUAL
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extern unsigned long __phys_addr(unsigned long);
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extern unsigned long __phys_addr_symbol(unsigned long);
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#else
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#define __phys_addr(x) __phys_addr_nodebug(x)
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#define __phys_addr_symbol(x) \
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((unsigned long)(x) - __START_KERNEL_map + phys_base)
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#endif
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#define __phys_reloc_hide(x) (x)
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void clear_page_orig(void *page);
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void clear_page_rep(void *page);
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void clear_page_erms(void *page);
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static inline void clear_page(void *page)
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{
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/*
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* Clean up KMSAN metadata for the page being cleared. The assembly call
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* below clobbers @page, so we perform unpoisoning before it.
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*/
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kmsan_unpoison_memory(page, PAGE_SIZE);
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alternative_call_2(clear_page_orig,
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clear_page_rep, X86_FEATURE_REP_GOOD,
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clear_page_erms, X86_FEATURE_ERMS,
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"=D" (page),
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"D" (page)
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: "cc", "memory", "rax", "rcx");
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}
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void copy_page(void *to, void *from);
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#ifdef CONFIG_X86_5LEVEL
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/*
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* User space process size. This is the first address outside the user range.
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* There are a few constraints that determine this:
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*
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* On Intel CPUs, if a SYSCALL instruction is at the highest canonical
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* address, then that syscall will enter the kernel with a
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* non-canonical return address, and SYSRET will explode dangerously.
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* We avoid this particular problem by preventing anything
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* from being mapped at the maximum canonical address.
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*
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* On AMD CPUs in the Ryzen family, there's a nasty bug in which the
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* CPUs malfunction if they execute code from the highest canonical page.
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* They'll speculate right off the end of the canonical space, and
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* bad things happen. This is worked around in the same way as the
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* Intel problem.
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*
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* With page table isolation enabled, we map the LDT in ... [stay tuned]
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*/
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static __always_inline unsigned long task_size_max(void)
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{
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unsigned long ret;
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alternative_io("movq %[small],%0","movq %[large],%0",
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X86_FEATURE_LA57,
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"=r" (ret),
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[small] "i" ((1ul << 47)-PAGE_SIZE),
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[large] "i" ((1ul << 56)-PAGE_SIZE));
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return ret;
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}
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#endif /* CONFIG_X86_5LEVEL */
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#endif /* !__ASSEMBLY__ */
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#ifdef CONFIG_X86_VSYSCALL_EMULATION
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# define __HAVE_ARCH_GATE_AREA 1
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#endif
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#endif /* _ASM_X86_PAGE_64_H */
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