Aric Cyr 32953485c5 drm/amd/display: Do not update DRR while BW optimizations pending ...

[why]
While bandwidth optimizations are pending, it's possible a pstate change
will occur.  During this time, VSYNC handler should not also try to update
DRR parameters causing pstate hang

[how]
Do not adjust DRR if optimize bandwidth is set.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2023-02-28 14:30:55 -05:00

..

drm

drm/amd/display: Do not update DRR while BW optimizations pending

2023-02-28 14:30:55 -05:00

host1x

gpu: host1x: Use tegra_dev_iommu_get_stream_id()

2023-01-27 17:41:49 +01:00

ipu-v3

gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id()

2022-12-16 18:40:29 +01:00

trace

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vga

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Makefile

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