chen gong 2cb96b2387 drm/amdgpu/gfx10: update CGTS_TCC_DISABLE and CGTS_USER_TCC_DISABLE register offsets for VGH ...

For Vangogh:
The offset of the CGTS_TCC_DISABLE is 0x5006 by calculation.
The offset of the CGTS_USER_TCC_DISABLE is 0x5007 by calculation.

Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-02-02 12:06:29 -05:00

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drm

drm/amdgpu/gfx10: update CGTS_TCC_DISABLE and CGTS_USER_TCC_DISABLE register offsets for VGH

2021-02-02 12:06:29 -05:00

host1x

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ipu-v3

gpu/ipu-v3/ipu-di: Strip out 2 unused 'di_sync_config' entries

2021-01-04 12:54:18 +01:00

trace

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vga

Merge tag 'pci-v5.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

2020-12-15 16:49:59 -08:00

Makefile

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