Lucas De Marchi 229f31e2d3 drm/i915/dg1: add hpd interrupt handling ...

DG1 has one more combo phy port, no TC and all irq handling goes through
SDE, like for MCC.

v2: Also change intel_hpd_pin_default() to include DG1 mapping
v3, v4: Rebase on hpd refactor

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201021082034.3170478-2-lucas.demarchi@intel.com

2020-10-23 17:15:39 -07:00

..

drm

drm/i915/dg1: add hpd interrupt handling

2020-10-23 17:15:39 -07:00

host1x

gpu: host1x: debug: Dump push buffer state

2020-07-17 16:06:14 +02:00

ipu-v3

treewide: Use fallthrough pseudo-keyword

2020-08-23 17:36:59 -05:00

trace

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00

vga

vgaarb: mark vga_tryget static

2020-08-01 11:28:17 +02:00

Makefile

gpu/trace: add a gpu total memory usage tracepoint

2020-03-03 17:52:41 -05:00