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With interrupt post, register CSR.GINTC and CSR.ESTAT is used, and CSR.ESTAT is used for percpu interrupt injection and CSR.GINTC is for external hardware interrupt injection. Here use existing macro about interrupt bit of register CSR.GINTC and CSR.ESTAT, rather than hard coded constant value. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>