Matthew Brost 1c060057ec drm/xe: Always write GEN12_RCU_MODE.GEN12_RCU_MODE_CCS_ENABLE for CCS engines ...

If CCS0 was fused we did not write this register thus CCS engine were
not enabled resulting in driver load failures.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

2023-12-19 18:31:38 -05:00

..

drm

drm/xe: Always write GEN12_RCU_MODE.GEN12_RCU_MODE_CCS_ENABLE for CCS engines

2023-12-19 18:31:38 -05:00

host1x

gpu: host1x: Correct allocated size for contexts

2023-10-11 22:52:44 +02:00

ipu-v3

Merge tag 'drm-next-2023-08-30' of git://anongit.freedesktop.org/drm/drm

2023-08-30 13:34:34 -07:00

trace

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vga

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Makefile

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