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1b82413426
The SPI controller found in the RK3506 SoC is still compatible to the original one introduced with the RK3066, so add the RK3506 compatible to the list of its variants. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20251022004200.204276-1-heiko@sntech.de Signed-off-by: Mark Brown <broonie@kernel.org>
121 lines
2.9 KiB
YAML
121 lines
2.9 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip SPI Controller
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description:
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The Rockchip SPI controller is used to interface with various devices such
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as flash and display controllers using the SPI communication interface.
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allOf:
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- $ref: spi-controller.yaml#
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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# Everything else is described in the common file
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properties:
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compatible:
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oneOf:
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- const: rockchip,rk3036-spi
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- const: rockchip,rk3066-spi
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- const: rockchip,rk3228-spi
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- const: rockchip,rv1108-spi
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- items:
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- enum:
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- rockchip,px30-spi
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- rockchip,rk3128-spi
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- rockchip,rk3188-spi
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- rockchip,rk3288-spi
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- rockchip,rk3308-spi
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- rockchip,rk3328-spi
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- rockchip,rk3368-spi
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- rockchip,rk3399-spi
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- rockchip,rk3506-spi
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- rockchip,rk3528-spi
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- rockchip,rk3562-spi
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- rockchip,rk3568-spi
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- rockchip,rk3576-spi
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- rockchip,rk3588-spi
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- rockchip,rv1126-spi
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- const: rockchip,rk3066-spi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: transfer-clock
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- description: peripheral clock
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clock-names:
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items:
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- const: spiclk
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- const: apb_pclk
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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rx-sample-delay-ns:
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default: 0
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description:
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Nano seconds to delay after the SCLK edge before sampling Rx data
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(may need to be fine tuned for high capacitance lines).
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If not specified 0 will be used.
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pinctrl-names:
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minItems: 1
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items:
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- const: default
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- const: sleep
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description:
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Names for the pin configuration(s); may be "default" or "sleep",
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where the "sleep" configuration may describe the state
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the pins should be in during system suspend.
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3188-cru-common.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi0: spi@ff110000 {
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compatible = "rockchip,rk3066-spi";
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reg = <0xff110000 0x1000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
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clock-names = "spiclk", "apb_pclk";
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dmas = <&pdma1 11>, <&pdma1 12>;
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dma-names = "tx", "rx";
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pinctrl-0 = <&spi1_pins>;
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pinctrl-1 = <&spi1_sleep>;
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pinctrl-names = "default", "sleep";
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rx-sample-delay-ns = <10>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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