Iwona Winiarska aba59ce109 peci: aspeed: Clear clock_divider value before setting it ...

PECI clock divider is programmed on 10:8 bits of PECI Control register.
Before setting a new value, clear bits read from hardware.

Reviewed-by: Billy Tsai <billy_tsai@aspeedtech.com>
Link: https://lore.kernel.org/r/20240417134849.5793-1-iwona.winiarska@intel.com
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>

2024-06-17 15:18:29 +02:00

..

Kconfig

peci: Add peci-npcm controller driver

2023-08-07 18:27:55 +02:00

Makefile

peci: Add peci-npcm controller driver

2023-08-07 18:27:55 +02:00

peci-aspeed.c

peci: aspeed: Clear clock_divider value before setting it

2024-06-17 15:18:29 +02:00

peci-npcm.c

peci: Add peci-npcm controller driver

2023-08-07 18:27:55 +02:00