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Tweak the arm64 code so that the pure NEON intrinsics implementation of XOR is shared between arm64 and ARM. While at it, rename the arm64 specific piece xor-eor3.c to reflect that only the version based on the EOR3 instruction is kept there. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://patch.msgid.link/20260422171655.3437334-13-ardb+git@google.com Signed-off-by: Eric Biggers <ebiggers@kernel.org>
147 lines
3.8 KiB
C
147 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/cache.h>
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#include <asm/neon-intrinsics.h>
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#include "xor_impl.h"
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#include "xor_arch.h"
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#include "xor-neon.h"
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extern void __xor_eor3_2(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2);
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static inline uint64x2_t eor3(uint64x2_t p, uint64x2_t q, uint64x2_t r)
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{
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uint64x2_t res;
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asm(ARM64_ASM_PREAMBLE ".arch_extension sha3\n"
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"eor3 %0.16b, %1.16b, %2.16b, %3.16b"
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: "=w"(res) : "w"(p), "w"(q), "w"(r));
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return res;
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}
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static void __xor_eor3_3(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3)
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{
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uint64_t *dp1 = (uint64_t *)p1;
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uint64_t *dp2 = (uint64_t *)p2;
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uint64_t *dp3 = (uint64_t *)p3;
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register uint64x2_t v0, v1, v2, v3;
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long lines = bytes / (sizeof(uint64x2_t) * 4);
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do {
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/* p1 ^= p2 ^ p3 */
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v0 = eor3(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0),
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vld1q_u64(dp3 + 0));
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v1 = eor3(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2),
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vld1q_u64(dp3 + 2));
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v2 = eor3(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4),
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vld1q_u64(dp3 + 4));
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v3 = eor3(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6),
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vld1q_u64(dp3 + 6));
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/* store */
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vst1q_u64(dp1 + 0, v0);
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vst1q_u64(dp1 + 2, v1);
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vst1q_u64(dp1 + 4, v2);
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vst1q_u64(dp1 + 6, v3);
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dp1 += 8;
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dp2 += 8;
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dp3 += 8;
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} while (--lines > 0);
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}
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static void __xor_eor3_4(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4)
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{
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uint64_t *dp1 = (uint64_t *)p1;
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uint64_t *dp2 = (uint64_t *)p2;
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uint64_t *dp3 = (uint64_t *)p3;
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uint64_t *dp4 = (uint64_t *)p4;
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register uint64x2_t v0, v1, v2, v3;
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long lines = bytes / (sizeof(uint64x2_t) * 4);
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do {
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/* p1 ^= p2 ^ p3 */
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v0 = eor3(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0),
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vld1q_u64(dp3 + 0));
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v1 = eor3(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2),
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vld1q_u64(dp3 + 2));
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v2 = eor3(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4),
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vld1q_u64(dp3 + 4));
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v3 = eor3(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6),
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vld1q_u64(dp3 + 6));
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/* p1 ^= p4 */
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v0 = veorq_u64(v0, vld1q_u64(dp4 + 0));
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v1 = veorq_u64(v1, vld1q_u64(dp4 + 2));
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v2 = veorq_u64(v2, vld1q_u64(dp4 + 4));
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v3 = veorq_u64(v3, vld1q_u64(dp4 + 6));
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/* store */
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vst1q_u64(dp1 + 0, v0);
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vst1q_u64(dp1 + 2, v1);
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vst1q_u64(dp1 + 4, v2);
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vst1q_u64(dp1 + 6, v3);
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dp1 += 8;
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dp2 += 8;
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dp3 += 8;
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dp4 += 8;
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} while (--lines > 0);
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}
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static void __xor_eor3_5(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4,
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const unsigned long * __restrict p5)
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{
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uint64_t *dp1 = (uint64_t *)p1;
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uint64_t *dp2 = (uint64_t *)p2;
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uint64_t *dp3 = (uint64_t *)p3;
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uint64_t *dp4 = (uint64_t *)p4;
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uint64_t *dp5 = (uint64_t *)p5;
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register uint64x2_t v0, v1, v2, v3;
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long lines = bytes / (sizeof(uint64x2_t) * 4);
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do {
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/* p1 ^= p2 ^ p3 */
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v0 = eor3(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0),
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vld1q_u64(dp3 + 0));
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v1 = eor3(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2),
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vld1q_u64(dp3 + 2));
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v2 = eor3(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4),
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vld1q_u64(dp3 + 4));
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v3 = eor3(vld1q_u64(dp1 + 6), vld1q_u64(dp2 + 6),
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vld1q_u64(dp3 + 6));
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/* p1 ^= p4 ^ p5 */
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v0 = eor3(v0, vld1q_u64(dp4 + 0), vld1q_u64(dp5 + 0));
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v1 = eor3(v1, vld1q_u64(dp4 + 2), vld1q_u64(dp5 + 2));
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v2 = eor3(v2, vld1q_u64(dp4 + 4), vld1q_u64(dp5 + 4));
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v3 = eor3(v3, vld1q_u64(dp4 + 6), vld1q_u64(dp5 + 6));
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/* store */
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vst1q_u64(dp1 + 0, v0);
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vst1q_u64(dp1 + 2, v1);
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vst1q_u64(dp1 + 4, v2);
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vst1q_u64(dp1 + 6, v3);
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dp1 += 8;
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dp2 += 8;
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dp3 += 8;
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dp4 += 8;
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dp5 += 8;
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} while (--lines > 0);
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}
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__DO_XOR_BLOCKS(eor3_inner, __xor_eor3_2, __xor_eor3_3, __xor_eor3_4,
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__xor_eor3_5);
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