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To migrate the support for CBC-based MACs into libaes, the corresponding arm64 assembly code needs to be moved there. However, the arm64 AES assembly code groups many AES modes together; individual modes aren't easily separable. (This isn't unique to arm64; other architectures organize their AES modes similarly.) Since the other AES modes will be migrated into the library eventually too, just move the full assembly files for the AES modes into the library. (This is similar to what I already did for PowerPC and SPARC.) Specifically: move the assembly files aes-ce.S, aes-modes.S, and aes-neon.S and their build rules; declare the assembly functions in <crypto/aes.h>; and export the assembly functions from libaes. Note that the exports and public declarations of the assembly functions are temporary. They exist only to keep arch/arm64/crypto/ working until the AES modes are fully moved into the library. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260218213501.136844-5-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
251 lines
7.4 KiB
ArmAsm
251 lines
7.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AES cipher for ARMv8 NEON
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*
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* Copyright (C) 2013 - 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#define AES_FUNC_START(func) SYM_FUNC_START(neon_ ## func)
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#define AES_FUNC_END(func) SYM_FUNC_END(neon_ ## func)
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xtsmask .req v7
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cbciv .req v7
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vctr .req v4
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.macro xts_reload_mask, tmp
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xts_load_mask \tmp
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.endm
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/* special case for the neon-bs driver calling into this one for CTS */
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.macro xts_cts_skip_tw, reg, lbl
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tbnz \reg, #1, \lbl
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.endm
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/* multiply by polynomial 'x' in GF(2^8) */
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.macro mul_by_x, out, in, temp, const
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sshr \temp, \in, #7
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shl \out, \in, #1
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and \temp, \temp, \const
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eor \out, \out, \temp
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.endm
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/* multiply by polynomial 'x^2' in GF(2^8) */
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.macro mul_by_x2, out, in, temp, const
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ushr \temp, \in, #6
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shl \out, \in, #2
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pmul \temp, \temp, \const
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eor \out, \out, \temp
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.endm
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/* preload the entire Sbox */
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.macro prepare, sbox, shiftrows, temp
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movi v12.16b, #0x1b
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ldr_l q13, \shiftrows, \temp
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ldr_l q14, .Lror32by8, \temp
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adr_l \temp, \sbox
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ld1 {v16.16b-v19.16b}, [\temp], #64
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ld1 {v20.16b-v23.16b}, [\temp], #64
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ld1 {v24.16b-v27.16b}, [\temp], #64
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ld1 {v28.16b-v31.16b}, [\temp]
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.endm
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/* do preload for encryption */
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.macro enc_prepare, ignore0, ignore1, temp
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prepare crypto_aes_sbox, .LForward_ShiftRows, \temp
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.endm
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.macro enc_switch_key, ignore0, ignore1, temp
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/* do nothing */
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.endm
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/* do preload for decryption */
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.macro dec_prepare, ignore0, ignore1, temp
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prepare crypto_aes_inv_sbox, .LReverse_ShiftRows, \temp
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.endm
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/* apply SubBytes transformation using the preloaded Sbox */
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.macro sub_bytes, in
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sub v9.16b, \in\().16b, v15.16b
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tbl \in\().16b, {v16.16b-v19.16b}, \in\().16b
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sub v10.16b, v9.16b, v15.16b
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tbx \in\().16b, {v20.16b-v23.16b}, v9.16b
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sub v11.16b, v10.16b, v15.16b
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tbx \in\().16b, {v24.16b-v27.16b}, v10.16b
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tbx \in\().16b, {v28.16b-v31.16b}, v11.16b
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.endm
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/* apply MixColumns transformation */
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.macro mix_columns, in, enc
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.if \enc == 0
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/* Inverse MixColumns: pre-multiply by { 5, 0, 4, 0 } */
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mul_by_x2 v8.16b, \in\().16b, v9.16b, v12.16b
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eor \in\().16b, \in\().16b, v8.16b
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rev32 v8.8h, v8.8h
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eor \in\().16b, \in\().16b, v8.16b
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.endif
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mul_by_x v9.16b, \in\().16b, v8.16b, v12.16b
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rev32 v8.8h, \in\().8h
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eor v8.16b, v8.16b, v9.16b
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eor \in\().16b, \in\().16b, v8.16b
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tbl \in\().16b, {\in\().16b}, v14.16b
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eor \in\().16b, \in\().16b, v8.16b
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.endm
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.macro do_block, enc, in, rounds, rk, rkp, i
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ld1 {v15.4s}, [\rk]
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add \rkp, \rk, #16
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mov \i, \rounds
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.La\@: eor \in\().16b, \in\().16b, v15.16b /* ^round key */
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movi v15.16b, #0x40
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tbl \in\().16b, {\in\().16b}, v13.16b /* ShiftRows */
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sub_bytes \in
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sub \i, \i, #1
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ld1 {v15.4s}, [\rkp], #16
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cbz \i, .Lb\@
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mix_columns \in, \enc
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b .La\@
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.Lb\@: eor \in\().16b, \in\().16b, v15.16b /* ^round key */
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.endm
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.macro encrypt_block, in, rounds, rk, rkp, i
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do_block 1, \in, \rounds, \rk, \rkp, \i
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.endm
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.macro decrypt_block, in, rounds, rk, rkp, i
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do_block 0, \in, \rounds, \rk, \rkp, \i
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.endm
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/*
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* Interleaved versions: functionally equivalent to the
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* ones above, but applied to AES states in parallel.
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*/
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.macro sub_bytes_4x, in0, in1, in2, in3
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sub v8.16b, \in0\().16b, v15.16b
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tbl \in0\().16b, {v16.16b-v19.16b}, \in0\().16b
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sub v9.16b, \in1\().16b, v15.16b
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tbl \in1\().16b, {v16.16b-v19.16b}, \in1\().16b
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sub v10.16b, \in2\().16b, v15.16b
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tbl \in2\().16b, {v16.16b-v19.16b}, \in2\().16b
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sub v11.16b, \in3\().16b, v15.16b
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tbl \in3\().16b, {v16.16b-v19.16b}, \in3\().16b
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tbx \in0\().16b, {v20.16b-v23.16b}, v8.16b
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tbx \in1\().16b, {v20.16b-v23.16b}, v9.16b
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sub v8.16b, v8.16b, v15.16b
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tbx \in2\().16b, {v20.16b-v23.16b}, v10.16b
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sub v9.16b, v9.16b, v15.16b
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tbx \in3\().16b, {v20.16b-v23.16b}, v11.16b
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sub v10.16b, v10.16b, v15.16b
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tbx \in0\().16b, {v24.16b-v27.16b}, v8.16b
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sub v11.16b, v11.16b, v15.16b
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tbx \in1\().16b, {v24.16b-v27.16b}, v9.16b
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sub v8.16b, v8.16b, v15.16b
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tbx \in2\().16b, {v24.16b-v27.16b}, v10.16b
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sub v9.16b, v9.16b, v15.16b
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tbx \in3\().16b, {v24.16b-v27.16b}, v11.16b
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sub v10.16b, v10.16b, v15.16b
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tbx \in0\().16b, {v28.16b-v31.16b}, v8.16b
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sub v11.16b, v11.16b, v15.16b
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tbx \in1\().16b, {v28.16b-v31.16b}, v9.16b
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tbx \in2\().16b, {v28.16b-v31.16b}, v10.16b
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tbx \in3\().16b, {v28.16b-v31.16b}, v11.16b
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.endm
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.macro mul_by_x_2x, out0, out1, in0, in1, tmp0, tmp1, const
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sshr \tmp0\().16b, \in0\().16b, #7
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shl \out0\().16b, \in0\().16b, #1
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sshr \tmp1\().16b, \in1\().16b, #7
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and \tmp0\().16b, \tmp0\().16b, \const\().16b
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shl \out1\().16b, \in1\().16b, #1
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and \tmp1\().16b, \tmp1\().16b, \const\().16b
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eor \out0\().16b, \out0\().16b, \tmp0\().16b
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eor \out1\().16b, \out1\().16b, \tmp1\().16b
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.endm
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.macro mul_by_x2_2x, out0, out1, in0, in1, tmp0, tmp1, const
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ushr \tmp0\().16b, \in0\().16b, #6
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shl \out0\().16b, \in0\().16b, #2
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ushr \tmp1\().16b, \in1\().16b, #6
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pmul \tmp0\().16b, \tmp0\().16b, \const\().16b
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shl \out1\().16b, \in1\().16b, #2
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pmul \tmp1\().16b, \tmp1\().16b, \const\().16b
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eor \out0\().16b, \out0\().16b, \tmp0\().16b
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eor \out1\().16b, \out1\().16b, \tmp1\().16b
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.endm
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.macro mix_columns_2x, in0, in1, enc
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.if \enc == 0
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/* Inverse MixColumns: pre-multiply by { 5, 0, 4, 0 } */
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mul_by_x2_2x v8, v9, \in0, \in1, v10, v11, v12
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eor \in0\().16b, \in0\().16b, v8.16b
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rev32 v8.8h, v8.8h
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eor \in1\().16b, \in1\().16b, v9.16b
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rev32 v9.8h, v9.8h
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eor \in0\().16b, \in0\().16b, v8.16b
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eor \in1\().16b, \in1\().16b, v9.16b
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.endif
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mul_by_x_2x v8, v9, \in0, \in1, v10, v11, v12
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rev32 v10.8h, \in0\().8h
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rev32 v11.8h, \in1\().8h
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eor v10.16b, v10.16b, v8.16b
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eor v11.16b, v11.16b, v9.16b
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eor \in0\().16b, \in0\().16b, v10.16b
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eor \in1\().16b, \in1\().16b, v11.16b
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tbl \in0\().16b, {\in0\().16b}, v14.16b
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tbl \in1\().16b, {\in1\().16b}, v14.16b
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eor \in0\().16b, \in0\().16b, v10.16b
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eor \in1\().16b, \in1\().16b, v11.16b
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.endm
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.macro do_block_4x, enc, in0, in1, in2, in3, rounds, rk, rkp, i
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ld1 {v15.4s}, [\rk]
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add \rkp, \rk, #16
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mov \i, \rounds
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.La\@: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
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eor \in1\().16b, \in1\().16b, v15.16b /* ^round key */
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eor \in2\().16b, \in2\().16b, v15.16b /* ^round key */
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eor \in3\().16b, \in3\().16b, v15.16b /* ^round key */
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movi v15.16b, #0x40
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tbl \in0\().16b, {\in0\().16b}, v13.16b /* ShiftRows */
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tbl \in1\().16b, {\in1\().16b}, v13.16b /* ShiftRows */
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tbl \in2\().16b, {\in2\().16b}, v13.16b /* ShiftRows */
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tbl \in3\().16b, {\in3\().16b}, v13.16b /* ShiftRows */
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sub_bytes_4x \in0, \in1, \in2, \in3
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sub \i, \i, #1
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ld1 {v15.4s}, [\rkp], #16
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cbz \i, .Lb\@
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mix_columns_2x \in0, \in1, \enc
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mix_columns_2x \in2, \in3, \enc
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b .La\@
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.Lb\@: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
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eor \in1\().16b, \in1\().16b, v15.16b /* ^round key */
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eor \in2\().16b, \in2\().16b, v15.16b /* ^round key */
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eor \in3\().16b, \in3\().16b, v15.16b /* ^round key */
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.endm
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.macro encrypt_block4x, in0, in1, in2, in3, rounds, rk, rkp, i
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do_block_4x 1, \in0, \in1, \in2, \in3, \rounds, \rk, \rkp, \i
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.endm
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.macro decrypt_block4x, in0, in1, in2, in3, rounds, rk, rkp, i
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do_block_4x 0, \in0, \in1, \in2, \in3, \rounds, \rk, \rkp, \i
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.endm
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#include "aes-modes.S"
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.section ".rodata", "a"
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.align 4
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.LForward_ShiftRows:
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.octa 0x0b06010c07020d08030e09040f0a0500
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.LReverse_ShiftRows:
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.octa 0x0306090c0f0205080b0e0104070a0d00
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.Lror32by8:
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.octa 0x0c0f0e0d080b0a090407060500030201
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