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bc98435652
Update documentation for the RPMH clock controller on the Qualcomm Hawi SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Mike Tipton <mike.tipton@oss.qualcomm.com> Signed-off-by: Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-1-530b538679f1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. */
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#ifndef _DT_BINDINGS_CLK_MSM_RPMH_H
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#define _DT_BINDINGS_CLK_MSM_RPMH_H
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/* RPMh controlled clocks */
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#define RPMH_CXO_CLK 0
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#define RPMH_CXO_CLK_A 1
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#define RPMH_LN_BB_CLK2 2
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#define RPMH_LN_BB_CLK2_A 3
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#define RPMH_LN_BB_CLK3 4
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#define RPMH_LN_BB_CLK3_A 5
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#define RPMH_RF_CLK1 6
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#define RPMH_RF_CLK1_A 7
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#define RPMH_RF_CLK2 8
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#define RPMH_RF_CLK2_A 9
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#define RPMH_RF_CLK3 10
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#define RPMH_RF_CLK3_A 11
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#define RPMH_IPA_CLK 12
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#define RPMH_LN_BB_CLK1 13
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#define RPMH_LN_BB_CLK1_A 14
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#define RPMH_CE_CLK 15
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#define RPMH_QPIC_CLK 16
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#define RPMH_DIV_CLK1 17
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#define RPMH_DIV_CLK1_A 18
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#define RPMH_RF_CLK4 19
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#define RPMH_RF_CLK4_A 20
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#define RPMH_RF_CLK5 21
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#define RPMH_RF_CLK5_A 22
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#define RPMH_PKA_CLK 23
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#define RPMH_HWKM_CLK 24
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#define RPMH_QLINK_CLK 25
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#define RPMH_QLINK_CLK_A 26
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#define RPMH_LN_BB_CLK4 27
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#define RPMH_LN_BB_CLK4_A 28
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#endif
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