Matthew Stewart 1a1751507e drm/amd: Add register header files for DCN42B ...

[Why & How]
Add register headers for:

- clk 15.0.5
- dcn 4.2.1
- dpcs 4.0.1
- nbio 7.15.5

v2: add in missing license (Alex)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2026-06-03 13:43:48 -04:00

..

dcn_1_0_offset.h

drm/amd/include: Add HUBPREQ_DEBUG register offsets

2019-04-23 17:27:08 -05:00

dcn_1_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_2_0_0_offset.h

drm/amd/include: Add OCSC registers

2020-01-16 13:41:06 -05:00

dcn_2_0_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_2_0_1_offset.h

drm/amdgpu: rename register headers to dcn_2_0_1

2024-12-10 10:37:34 -05:00

dcn_2_0_1_sh_mask.h

drm/amdgpu: rename register headers to dcn_2_0_1

2024-12-10 10:37:34 -05:00

dcn_2_1_0_offset.h

drm/amd/include: Add OCSC registers

2020-01-16 13:41:06 -05:00

dcn_2_1_0_sh_mask.h

drm/amd/display: Add HDMI_ACP_SEND register

2022-05-26 14:56:32 -04:00

dcn_3_0_0_offset.h

drm/amd/display: Add FRL registers for DCN30

2026-05-11 16:15:03 -04:00

dcn_3_0_0_sh_mask.h

drm/amd/display: Add FRL registers for DCN30

2026-05-11 16:15:03 -04:00

dcn_3_0_1_offset.h

drm/amdgpu: add vangogh asic header files (v2)

2020-10-05 15:14:02 -04:00

dcn_3_0_1_sh_mask.h

drm/amd/display: Add missing registers for ACP

2022-07-05 16:10:28 -04:00

dcn_3_0_2_offset.h

drm/amd/display: Add FRL register for DCN302

2026-05-11 16:15:20 -04:00

dcn_3_0_2_sh_mask.h

drm/amd/display: Add FRL register for DCN302

2026-05-11 16:15:20 -04:00

dcn_3_0_3_offset.h

drm/amd/display: Add FRL register for DCN303

2026-05-11 16:15:23 -04:00

dcn_3_0_3_sh_mask.h

drm/amd/display: Add FRL register for DCN303

2026-05-11 16:15:23 -04:00

dcn_3_1_2_offset.h

drm/amd/display: Add required FRL registers for DCN31

2026-05-11 16:15:07 -04:00

dcn_3_1_2_sh_mask.h

drm/amd/display: Add required FRL registers for DCN31

2026-05-11 16:15:07 -04:00

dcn_3_1_4_offset.h

drm/amd/display: Add the necessary FRL registers for DCN314

2026-05-11 16:15:16 -04:00

dcn_3_1_4_sh_mask.h

drm/amd/display: Add the necessary FRL registers for DCN314

2026-05-11 16:15:16 -04:00

dcn_3_1_5_offset.h

drm/amd/display: Add FRL registers for DCN315

2026-05-11 16:15:25 -04:00

dcn_3_1_5_sh_mask.h

drm/amd/display: Add FRL registers for DCN315

2026-05-11 16:15:25 -04:00

dcn_3_1_6_offset.h

drm/amd/display: Add FRL registers for DCN316

2026-05-11 16:15:28 -04:00

dcn_3_1_6_sh_mask.h

drm/amd/display: Add FRL registers for DCN316

2026-05-11 16:15:28 -04:00

dcn_3_2_0_offset.h

drm/amd/display: Introduce FRL registers for DCN32

2026-05-11 16:15:13 -04:00

dcn_3_2_0_sh_mask.h

drm/amd/display: Introduce FRL registers for DCN32

2026-05-11 16:15:13 -04:00

dcn_3_2_1_offset.h

drm/amd/display: Add FRL registers for DCN321

2026-05-11 16:15:11 -04:00

dcn_3_2_1_sh_mask.h

drm/amd/display: Add FRL registers for DCN321

2026-05-11 16:15:11 -04:00

dcn_3_5_0_offset.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_5_0_sh_mask.h

drm/amd/include: Add missing registers/mask for DCN316 and 350

2024-01-29 15:34:33 -05:00

dcn_3_5_1_offset.h

drm/amd: add register headers for DCN351

2024-03-04 15:59:07 -05:00

dcn_3_5_1_sh_mask.h

drm/amd: add register headers for DCN351

2024-03-04 15:59:07 -05:00

dcn_3_6_0_offset.h

drm/amd/display: Add dcn36 register header files

2025-02-12 21:04:07 -05:00

dcn_3_6_0_sh_mask.h

drm/amd/display: Add dcn36 register header files

2025-02-12 21:04:07 -05:00

dcn_4_1_0_offset.h

drm/amd/display: Add some missing register headers for DCN401

2025-05-28 16:01:50 -04:00

dcn_4_1_0_sh_mask.h

drm/amd/display: Add some missing register headers for DCN401

2025-05-28 16:01:50 -04:00

dcn_4_2_0_offset.h

drm/amd/display: Update underflow detection for DCN42

2026-03-23 14:13:32 -04:00

dcn_4_2_0_sh_mask.h

drm/amd/display: Sync dcn42 with DC 3.2.373

2026-03-11 13:58:07 -04:00

dcn_4_2_1_offset.h

drm/amd: Add register header files for DCN42B

2026-06-03 13:43:48 -04:00

dcn_4_2_1_sh_mask.h

drm/amd: Add register header files for DCN42B

2026-06-03 13:43:48 -04:00