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55a71224bd
Extend EVMCS1_SUPPORTED_2NDEXEC to allow MBEC and EVMCS to coexist. Presenting both EVMCS and MBEC simultaneously causes KVM to filter out MBEC and not present it as a supported control to the guest, preventing performance gains from MBEC when Windows HVCI is enabled. The guest may choose not to use MBEC (e.g., if the admin does not enable Windows HVCI / Memory Integrity), but if they use traditional nested virt (Hyper-V, WSL2, etc.), having EVMCS exposed is important for improving nested guest performance. IOW allowing MBEC and EVMCS to coexist provides maximum optionality to Windows users without overcomplicating VM administration. Signed-off-by: Jon Kohler <jon@nutanix.com> Message-ID: <20251223054806.1611168-8-jon@nutanix.com> Tested-by: David Riley <d.riley@proxmox.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
168 lines
5.1 KiB
C
168 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file contains common definitions for working with Enlightened VMCS which
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* are used both by Hyper-V on KVM and KVM on Hyper-V.
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*/
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#ifndef __KVM_X86_VMX_HYPERV_EVMCS_H
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#define __KVM_X86_VMX_HYPERV_EVMCS_H
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#include <hyperv/hvhdk.h>
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#include "capabilities.h"
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#include "vmcs12.h"
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#define KVM_EVMCS_VERSION 1
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/*
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* Enlightened VMCSv1 doesn't support these:
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*
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* POSTED_INTR_NV = 0x00000002,
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* GUEST_INTR_STATUS = 0x00000810,
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* APIC_ACCESS_ADDR = 0x00002014,
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* POSTED_INTR_DESC_ADDR = 0x00002016,
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* EOI_EXIT_BITMAP0 = 0x0000201c,
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* EOI_EXIT_BITMAP1 = 0x0000201e,
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* EOI_EXIT_BITMAP2 = 0x00002020,
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* EOI_EXIT_BITMAP3 = 0x00002022,
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* GUEST_PML_INDEX = 0x00000812,
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* PML_ADDRESS = 0x0000200e,
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* VM_FUNCTION_CONTROL = 0x00002018,
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* EPTP_LIST_ADDRESS = 0x00002024,
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* VMREAD_BITMAP = 0x00002026,
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* VMWRITE_BITMAP = 0x00002028,
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*
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* TSC_MULTIPLIER = 0x00002032,
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* PLE_GAP = 0x00004020,
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* PLE_WINDOW = 0x00004022,
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* VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
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*
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* Currently unsupported in KVM:
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* GUEST_IA32_RTIT_CTL = 0x00002814,
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*/
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#define EVMCS1_SUPPORTED_PINCTRL \
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(PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
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PIN_BASED_EXT_INTR_MASK | \
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PIN_BASED_NMI_EXITING | \
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PIN_BASED_VIRTUAL_NMIS)
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#define EVMCS1_SUPPORTED_EXEC_CTRL \
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(CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
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CPU_BASED_HLT_EXITING | \
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CPU_BASED_CR3_LOAD_EXITING | \
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CPU_BASED_CR3_STORE_EXITING | \
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CPU_BASED_UNCOND_IO_EXITING | \
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CPU_BASED_MOV_DR_EXITING | \
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CPU_BASED_USE_TSC_OFFSETTING | \
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CPU_BASED_MWAIT_EXITING | \
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CPU_BASED_MONITOR_EXITING | \
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CPU_BASED_INVLPG_EXITING | \
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CPU_BASED_RDPMC_EXITING | \
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CPU_BASED_INTR_WINDOW_EXITING | \
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CPU_BASED_CR8_LOAD_EXITING | \
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CPU_BASED_CR8_STORE_EXITING | \
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CPU_BASED_RDTSC_EXITING | \
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CPU_BASED_TPR_SHADOW | \
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CPU_BASED_USE_IO_BITMAPS | \
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CPU_BASED_MONITOR_TRAP_FLAG | \
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CPU_BASED_USE_MSR_BITMAPS | \
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CPU_BASED_NMI_WINDOW_EXITING | \
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CPU_BASED_PAUSE_EXITING | \
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CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
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#define EVMCS1_SUPPORTED_2NDEXEC \
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(SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | \
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SECONDARY_EXEC_WBINVD_EXITING | \
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SECONDARY_EXEC_ENABLE_VPID | \
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SECONDARY_EXEC_ENABLE_EPT | \
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SECONDARY_EXEC_UNRESTRICTED_GUEST | \
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SECONDARY_EXEC_DESC | \
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SECONDARY_EXEC_ENABLE_RDTSCP | \
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SECONDARY_EXEC_ENABLE_INVPCID | \
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SECONDARY_EXEC_ENABLE_XSAVES | \
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SECONDARY_EXEC_RDSEED_EXITING | \
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SECONDARY_EXEC_RDRAND_EXITING | \
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SECONDARY_EXEC_TSC_SCALING | \
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SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE | \
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SECONDARY_EXEC_PT_USE_GPA | \
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SECONDARY_EXEC_PT_CONCEAL_VMX | \
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SECONDARY_EXEC_BUS_LOCK_DETECTION | \
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SECONDARY_EXEC_NOTIFY_VM_EXITING | \
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SECONDARY_EXEC_MODE_BASED_EPT_EXEC | \
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SECONDARY_EXEC_ENCLS_EXITING)
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#define EVMCS1_SUPPORTED_3RDEXEC (0ULL)
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#define EVMCS1_SUPPORTED_VMEXIT_CTRL \
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(VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR | \
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VM_EXIT_SAVE_DEBUG_CONTROLS | \
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VM_EXIT_ACK_INTR_ON_EXIT | \
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VM_EXIT_HOST_ADDR_SPACE_SIZE | \
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VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \
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VM_EXIT_SAVE_IA32_PAT | \
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VM_EXIT_LOAD_IA32_PAT | \
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VM_EXIT_SAVE_IA32_EFER | \
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VM_EXIT_LOAD_IA32_EFER | \
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VM_EXIT_CLEAR_BNDCFGS | \
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VM_EXIT_PT_CONCEAL_PIP | \
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VM_EXIT_CLEAR_IA32_RTIT_CTL)
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#define EVMCS1_SUPPORTED_VMENTRY_CTRL \
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(VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR | \
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VM_ENTRY_LOAD_DEBUG_CONTROLS | \
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VM_ENTRY_IA32E_MODE | \
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VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | \
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VM_ENTRY_LOAD_IA32_PAT | \
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VM_ENTRY_LOAD_IA32_EFER | \
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VM_ENTRY_LOAD_BNDCFGS | \
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VM_ENTRY_PT_CONCEAL_PIP | \
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VM_ENTRY_LOAD_IA32_RTIT_CTL)
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#define EVMCS1_SUPPORTED_VMFUNC (0)
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struct evmcs_field {
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u16 offset;
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u16 clean_field;
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};
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extern const struct evmcs_field vmcs_field_to_evmcs_1[];
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extern const unsigned int nr_evmcs_1_fields;
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static __always_inline int evmcs_field_offset(unsigned long field,
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u16 *clean_field)
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{
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const struct evmcs_field *evmcs_field;
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unsigned int index = ENC_TO_VMCS12_IDX(field);
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if (unlikely(index >= nr_evmcs_1_fields))
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return -ENOENT;
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evmcs_field = &vmcs_field_to_evmcs_1[index];
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/*
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* Use offset=0 to detect holes in eVMCS. This offset belongs to
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* 'revision_id' but this field has no encoding and is supposed to
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* be accessed directly.
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*/
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if (unlikely(!evmcs_field->offset))
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return -ENOENT;
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if (clean_field)
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*clean_field = evmcs_field->clean_field;
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return evmcs_field->offset;
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}
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static inline u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs,
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unsigned long field, u16 offset)
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{
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/*
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* vmcs12_read_any() doesn't care whether the supplied structure
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* is 'struct vmcs12' or 'struct hv_enlightened_vmcs' as it takes
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* the exact offset of the required field, use it for convenience
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* here.
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*/
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return vmcs12_read_any((void *)evmcs, field, offset);
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}
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#endif /* __KVM_X86_VMX_HYPERV_H */
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