Chaitanya Kumar Borah 14c8fca214 drm/i915/color: Downscale degamma lut values read from hardware ...

For MTL and beyond, convert back the 24 bit lut values
read from HW to 16 bit values to maintain parity with
userspace values. This way we avoid pipe config mismatch
for pre-csc lut values.

v2: Add helper function to downscale values (Jani)

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230725083002.3779717-3-chaitanya.kumar.borah@intel.com

2023-07-27 18:09:12 +05:30

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drm

drm/i915/color: Downscale degamma lut values read from hardware

2023-07-27 18:09:12 +05:30

host1x

Merge tag 'drm/tegra/for-6.4-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next

2023-04-06 15:02:17 +02:00

ipu-v3

ipu-v3: Include <linux/io.h>

2023-05-18 11:06:18 +02:00

trace

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vga

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Makefile

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