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The struct exynos5_dmc members bypass_rate, mx_mspll_ccore_phy, mout_mx_mspll_ccore_phy and opp_bypass are not actually used. Apparently there was a plan to store the OPP for the bypass mode in opp_bypass member, but driver fails to do it and instead always sets target voltage during bypass mode. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200822163218.21857-2-krzk@kernel.org