Qingqing Zhuo 5b723b1230 drm/amd/include: add DCN 3.1.5 registers ...

Add DCN 3.1.5 and DPCS 4.2.2 register headers.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2022-02-18 14:07:00 -05:00

..

dpcs_2_0_0_offset.h

drm/amdgpu: add dpcs20 registers

2019-12-18 16:09:06 -05:00

dpcs_2_0_0_sh_mask.h

drm/amdgpu: add dpcs20 registers

2019-12-18 16:09:06 -05:00

dpcs_2_0_3_offset.h

drm/amdgpu: add cyan_skillfish asic header files

2021-09-29 17:30:00 -04:00

dpcs_2_0_3_sh_mask.h

drm/amdgpu: add cyan_skillfish asic header files

2021-09-29 17:30:00 -04:00

dpcs_2_1_0_offset.h

…

dpcs_2_1_0_sh_mask.h

…

dpcs_3_0_0_offset.h

drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs

2022-02-07 18:03:50 -05:00

dpcs_3_0_0_sh_mask.h

drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs

2022-02-07 18:03:50 -05:00

dpcs_3_0_3_offset.h

drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs

2022-02-07 18:03:50 -05:00

dpcs_3_0_3_sh_mask.h

drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs

2022-02-07 18:03:50 -05:00

dpcs_4_2_0_offset.h

drm/amd/display: Fix B0 USB-C DP Alt mode

2021-09-23 15:17:30 -04:00

dpcs_4_2_0_sh_mask.h

drm/amdgpu: add yellow carp asic header files (v3)

2021-06-04 16:03:05 -04:00

dpcs_4_2_2_offset.h

drm/amd/include: add DCN 3.1.5 registers

2022-02-18 14:07:00 -05:00

dpcs_4_2_2_sh_mask.h

drm/amd/include: add DCN 3.1.5 registers

2022-02-18 14:07:00 -05:00

dpcs_4_2_3_offset.h

drm/amd/include: Add register headers for DCN 3.1.6

2022-02-17 15:44:45 -05:00

dpcs_4_2_3_sh_mask.h

drm/amd/include: Add register headers for DCN 3.1.6

2022-02-17 15:44:45 -05:00