Dmitry Osipenko 06f079816d memory: tegra-mc: Add interconnect framework ...

Add common SoC-agnostic ICC framework which turns Tegra Memory Controller
into a memory interconnection provider. This allows us to use interconnect
API for tuning of memory configurations.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Link: https://lore.kernel.org/r/20201104164923.21238-33-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

2020-11-26 18:50:35 +01:00

..

arc

include/: replace HTTP links with HTTPS ones

2020-08-12 10:57:59 -07:00

at91

ARM: at91: add atmel tcb capabilities

2020-07-11 18:57:03 +02:00

bcm2835

Revert "firmware: raspberrypi: Introduce vl805 init routine"

2020-08-18 13:01:11 +02:00

brcmstb

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

fsl

soc: fsl: qman: fix -Wpacked-not-aligned warnings

2020-09-22 17:38:21 -05:00

imx

ARM: imx: move cpu definitions into a header

2020-05-20 23:03:47 +08:00

mediatek

iommu/mediatek: Clean up struct mtk_smi_iommu

2019-08-30 15:57:27 +02:00

mscc

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2020-10-05 18:40:01 -07:00

nps

irqchip/eznps: Fix build error for !ARC700 builds

2020-08-27 13:15:17 -07:00

qcom

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2020-08-07 13:35:51 -07:00

rockchip

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288

2019-06-05 17:36:37 +02:00

sa1100

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

sifive

riscv: move sifive_l2_cache.h to include/soc

2020-01-12 10:12:44 -08:00

tegra

memory: tegra-mc: Add interconnect framework

2020-11-26 18:50:35 +01:00