Files
linux/drivers
Vincent Guittot 045ad2c623 PCI: dwc: Add register and bitfield definitions
Add register and bitfield definitions:

  - GEN3_RELATED_OFF_EQ_PHASE_2_3 field of GEN3_RELATED_OFF

  - Coherency control registers

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251121164920.2008569-3-vincent.guittot@linaro.org
2025-12-02 14:03:11 -06:00
..
2025-10-01 00:00:45 +00:00
2025-09-29 00:17:22 +02:00
2025-09-22 09:35:21 -04:00
2025-10-01 07:24:43 -04:00