Finley Xiao 491b00ff69 clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks ...

Add CLK_SET_RATE_PARENT for both rk3066 lcdc dclk.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

2019-01-07 09:17:15 +01:00

..

clk-cpu.c

…

clk-ddr.c

clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call

2018-10-17 15:12:51 +02:00

clk-half-divider.c

…

clk-inverter.c

…

clk-mmc-phase.c

…

clk-muxgrf.c

…

clk-pll.c

…

clk-px30.c

…

clk-rk3036.c

…

clk-rk3128.c

…

clk-rk3188.c

clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks

2019-01-07 09:17:15 +01:00

clk-rk3228.c

…

clk-rk3288.c

clk: rockchip: improve rk3288 pll rates for better hdmi output

2018-08-31 09:43:35 +02:00

clk-rk3328.c

clk: rockchip: fix frac settings of GPLL clock for rk3328

2019-01-07 09:17:15 +01:00

clk-rk3368.c

…

clk-rk3399.c

…

clk-rv1108.c

…

clk.c

…

clk.h

…

Makefile

…

softrst.c

…