Files
linux/drivers/gpu/drm/xe
Thomas Hellström 01e0cfc994 drm/xe: Use write-back caching mode for system memory on DGFX
The caching mode for buffer objects with VRAM as a possible
placement was forced to write-combined, regardless of placement.

However, write-combined system memory is expensive to allocate and
even though it is pooled, the pool is expensive to shrink, since
it involves global CPU TLB flushes.

Moreover write-combined system memory from TTM is only reliably
available on x86 and DGFX doesn't have an x86 restriction.

So regardless of the cpu caching mode selected for a bo,
internally use write-back caching mode for system memory on DGFX.

Coherency is maintained, but user-space clients may perceive a
difference in cpu access speeds.

v2:
- Update RB- and Ack tags.
- Rephrase wording in xe_drm.h (Matt Roper)
v3:
- Really rephrase wording.

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Fixes: 622f709ca6 ("drm/xe/uapi: Add support for CPU caching mode")
Cc: Pallavi Mishra <pallavi.mishra@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Effie Yu <effie.yu@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Jose Souza <jose.souza@intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Cc: <stable@vger.kernel.org> # v6.8+
Acked-by: Matthew Auld <matthew.auld@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: 622f709ca6 ("drm/xe/uapi: Add support for CPU caching mode")
Acked-by: Michal Mrozek <michal.mrozek@intel.com>
Acked-by: Effie Yu <effie.yu@intel.com> #On chat
Link: https://patchwork.freedesktop.org/patch/msgid/20240705132828.27714-1-thomas.hellstrom@linux.intel.com
2024-07-06 11:05:46 +02:00
..
2024-06-18 12:40:38 -07:00
2024-07-05 09:53:12 +01:00
2024-06-12 11:31:42 -04:00
2024-05-09 21:28:25 +02:00
2024-04-02 10:33:57 -07:00
2023-12-19 18:33:50 -05:00
2023-12-21 11:37:31 -05:00
2024-07-02 12:14:00 -04:00
2024-06-26 18:23:45 -04:00
2024-06-26 18:23:45 -04:00
2024-05-22 12:03:54 +02:00
2024-05-31 00:02:04 +02:00
2024-07-05 09:53:12 +01:00
2024-06-26 18:23:45 -04:00
2024-05-13 21:36:50 +02:00
2024-04-02 10:33:57 -07:00
2024-07-02 12:14:00 -04:00
2024-05-22 12:03:55 +02:00
2023-12-19 18:29:20 -05:00
2024-06-26 18:25:22 -04:00
2024-06-26 18:25:22 -04:00
2024-07-04 11:54:35 +02:00
2024-06-18 12:40:38 -07:00
2024-06-18 12:40:38 -07:00
2024-04-02 10:33:57 -07:00
2024-06-12 09:26:18 -07:00
2024-05-07 12:03:49 +02:00
2024-07-05 09:53:12 +01:00
2024-05-13 21:36:52 +02:00
2024-06-18 12:03:29 -07:00
2024-06-18 12:03:29 -07:00
2024-07-04 11:54:35 +02:00
2023-12-21 11:45:24 -05:00
2024-07-03 22:28:06 -07:00
2024-06-12 09:26:18 -07:00
2023-12-19 18:31:30 -05:00
2023-12-21 11:45:06 -05:00
2023-12-21 11:45:06 -05:00
2024-06-06 16:01:00 +02:00
2024-05-22 12:03:53 +02:00
2024-05-07 12:45:39 -04:00
2024-06-14 12:52:46 +02:00
2023-12-21 11:44:39 -05:00