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Move FW_BLC_SELF to common header to make i9xx_wm.c free from i915_reg.h include. Introduce a common intel_gmd_misc_regs.h to define common miscellaneous register definitions across graphics and display. v3: MISC header included as needed, drop from i915_reg (Jani) v2: Introdue a common misc header for GMD Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260205094341.1882816-13-uma.shankar@intel.com
22 lines
710 B
C
22 lines
710 B
C
/* SPDX-License-Identifier: MIT */
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/* Copyright © 2026 Intel Corporation */
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#ifndef _INTEL_GMD_MISC_REGS_H_
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#define _INTEL_GMD_MISC_REGS_H_
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#define DISP_ARB_CTL _MMIO(0x45000)
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#define DISP_FBC_MEMORY_WAKE REG_BIT(31)
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#define DISP_TILE_SURFACE_SWIZZLING REG_BIT(13)
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#define DISP_FBC_WM_DIS REG_BIT(15)
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#define INSTPM _MMIO(0x20c0)
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#define INSTPM_SELF_EN (1 << 12) /* 915GM only */
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#define INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
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will not assert AGPBUSY# and will only
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be delivered when out of C3. */
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#define INSTPM_FORCE_ORDERING (1 << 7) /* GEN6+ */
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#define INSTPM_TLB_INVALIDATE (1 << 9)
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#define INSTPM_SYNC_FLUSH (1 << 5)
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#endif
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