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The Realtek RTl93xx switch SoC series has a built in ECC controller that can provide BCH6 or BCH12 over 512 data and 6 tag bytes. It generates 10 (BCH6) or 20 (BCH12) bytes of parity. This engine will most likely work in conjunction with the Realtek spi-mem based NAND controller but can work on its own. Therefore the initial implementation will be of type external. Remark! The engine can support any data blocks that are multiples of 512 bytes. For now limit it to data+oob layouts that have been analyzed from existing devices. This way it keeps compatibility and pre-existing vendor data can be read. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
17 lines
557 B
Makefile
17 lines
557 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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nandcore-objs := core.o bbt.o
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obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
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obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
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obj-$(CONFIG_MTD_NAND_ECC_REALTEK) += ecc-realtek.o
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obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o
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obj-$(CONFIG_MTD_NAND_QCOM) += qpic_common.o
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obj-y += onenand/
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obj-y += raw/
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obj-y += spi/
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nandcore-$(CONFIG_MTD_NAND_ECC) += ecc.o
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nandcore-$(CONFIG_MTD_NAND_ECC_SW_HAMMING) += ecc-sw-hamming.o
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nandcore-$(CONFIG_MTD_NAND_ECC_SW_BCH) += ecc-sw-bch.o
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nandcore-$(CONFIG_MTD_NAND_ECC_MXIC) += ecc-mxic.o
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