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19da26bce0
There will be a NVL-P workaround for which we will need to know the
platform-level stepping information in order to decide whether to apply
it or not.
While NVL-P has a nice mapping between the PCI revid and our symbolic
stepping enumeration, not all platforms are like that: (i) Some
platforms will have a single PCI revid used for a set platform level
steppings (ii) and some might even require specific mappings.
To make things simpler, let's include stepping information in the device
info only on demand, for those platforms where it is needed for
workaround checks.
v2:
- Call xe_step_platform_get() very early, to allow device workarounds
to use it in early stages of device initialization. (Matt)
Bspec: 74201
Reviewed-by: Matt Roper <matthew.d.roper@intel.com> # v1
Link: https://patch.msgid.link/20260309-extra-nvl-p-enabling-patches-v5-3-be9c902ee34e@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
26 lines
544 B
C
26 lines
544 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#ifndef _XE_STEP_H_
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#define _XE_STEP_H_
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#include <linux/types.h>
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#include "xe_step_types.h"
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struct xe_device;
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void xe_step_platform_get(struct xe_device *xe);
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void xe_step_pre_gmdid_get(struct xe_device *xe);
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void xe_step_gmdid_get(struct xe_device *xe,
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u32 graphics_gmdid_revid,
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u32 media_gmdid_revid);
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static inline u32 xe_step_to_gmdid(enum xe_step step) { return step - STEP_A0; }
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const char *xe_step_name(enum xe_step step);
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#endif
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