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Using the DRM GPU scheduler infrastructure, with a scheduler for each core. Userspace can decide for a series of tasks to be executed sequentially in the same core, so SRAM locality can be taken advantage of. The job submission code was initially based on Panfrost. v2: - Remove hardcoded number of cores - Misc. style fixes (Jeffrey Hugo) - Repack IOCTL struct (Jeffrey Hugo) v3: - Adapt to a split of the register block in the DT bindings (Nicolas Frattaroli) - Make use of GPL-2.0-only for the copyright notice (Jeff Hugo) - Use drm_* logging functions (Thomas Zimmermann) - Rename reg i/o macros (Thomas Zimmermann) - Add padding to ioctls and check for zero (Jeff Hugo) - Improve error handling (Nicolas Frattaroli) v6: - Use mutexes guard (Markus Elfring) - Use u64_to_user_ptr (Jeff Hugo) - Drop rocket_fence (Rob Herring) v7: - Assign its own IOMMU domain to each client, for isolation (Daniel Stone and Robin Murphy) v8: - Use reset lines to reset the cores (Robin Murphy) - Use the macros to compute the values for the bitfields (Robin Murphy) - More descriptive name for the IRQ (Robin Murphy) - Simplify job interrupt handing (Robin Murphy) - Correctly acquire a reference to the IOMMU (Robin Murphy) - Specify the size of the embedded structs in the IOCTLs for future extensibility (Rob Herring) - Expose only 32 bits for the address of the regcmd BO (Robin Murphy) Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Signed-off-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-4-77ebd484941e@tomeuvizoso.net
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright 2024-2025 Tomeu Vizoso <tomeu@tomeuvizoso.net> */
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#include <drm/drm_drv.h>
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#include <linux/array_size.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include "rocket_device.h"
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struct rocket_device *rocket_device_init(struct platform_device *pdev,
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const struct drm_driver *rocket_drm_driver)
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{
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struct device *dev = &pdev->dev;
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struct device_node *core_node;
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struct rocket_device *rdev;
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struct drm_device *ddev;
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unsigned int num_cores = 0;
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int err;
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rdev = devm_drm_dev_alloc(dev, rocket_drm_driver, struct rocket_device, ddev);
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if (IS_ERR(rdev))
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return rdev;
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ddev = &rdev->ddev;
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dev_set_drvdata(dev, rdev);
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for_each_compatible_node(core_node, NULL, "rockchip,rk3588-rknn-core")
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if (of_device_is_available(core_node))
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num_cores++;
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rdev->cores = devm_kcalloc(dev, num_cores, sizeof(*rdev->cores), GFP_KERNEL);
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if (!rdev->cores)
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return ERR_PTR(-ENOMEM);
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dma_set_max_seg_size(dev, UINT_MAX);
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err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
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if (err)
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return ERR_PTR(err);
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err = devm_mutex_init(dev, &rdev->sched_lock);
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if (err)
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return ERR_PTR(-ENOMEM);
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err = drm_dev_register(ddev, 0);
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if (err)
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return ERR_PTR(err);
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return rdev;
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}
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void rocket_device_fini(struct rocket_device *rdev)
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{
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WARN_ON(rdev->num_cores > 0);
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drm_dev_unregister(&rdev->ddev);
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}
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