mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-07-22 02:17:36 -04:00
Add riscv32-specific '__ashldi3()', '__ashrdi3()', and '__lshrdi3()'. Initially it was intended to fix the following link error observed when building EFI-enabled kernel with CONFIG_EFI_STUB=y and CONFIG_EFI_GENERIC_STUB=y: riscv32-linux-gnu-ld: ./drivers/firmware/efi/libstub/lib-cmdline.stub.o: in function `__efistub_.L49': __efistub_cmdline.c:(.init.text+0x1f2): undefined reference to `__efistub___ashldi3' riscv32-linux-gnu-ld: __efistub_cmdline.c:(.init.text+0x202): undefined reference to `__efistub___lshrdi3' Reported at [1] trying to build https://patchew.org/linux/20260212164413.889625-1-dmantipov@yandex.ru, tested with 'qemu-system-riscv32 -M virt' only. Link: https://lore.kernel.org/20260519172259.908980-7-dmantipov@yandex.ru Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202603041925.KLKqpK6N-lkp@intel.com [1] Suggested-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Assisted-by: Gemini:gemini-3.1-pro-preview sashiko Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Andriy Shevchenko <andriy.shevchenko@intel.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
37 lines
878 B
ArmAsm
37 lines
878 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/**
|
|
* Adopted for the Linux kernel from IPXE project, see
|
|
* https://github.com/ipxe/ipxe/blob/master/src/arch/riscv32/libgcc/llshift.S
|
|
*/
|
|
|
|
#include <linux/linkage.h>
|
|
#include <asm/asm.h>
|
|
|
|
/**
|
|
* Arithmetic shift right
|
|
*
|
|
* @v a1:a0 Value to shift
|
|
* @v a2 Shift amount
|
|
* @ret a1:a0 Shifted value
|
|
*/
|
|
|
|
SYM_FUNC_START(__ashrdi3)
|
|
|
|
/* Perform shift by 32 bits, if applicable */
|
|
li t0, 32
|
|
sub t1, t0, a2
|
|
bgtz t1, 1f
|
|
mv a0, a1
|
|
srai a1, a1, 31
|
|
1: /* Perform shift by modulo-32 bits, if applicable */
|
|
andi a2, a2, 0x1f
|
|
beqz a2, 2f
|
|
sll t2, a1, t1
|
|
sra a1, a1, a2
|
|
srl a0, a0, a2
|
|
or a0, a0, t2
|
|
2: ret
|
|
|
|
SYM_FUNC_END(__ashrdi3)
|
|
EXPORT_SYMBOL(__ashrdi3)
|