ACPICA commit 44ca5f4f9be24bf64524cdb1de46322509319056
This entails adding an optional subtable indicating secure access
components as well as two different types of secure access components
(ID-based or Memory). For definitons and uses, consult the ACPI
specification.
Link: https://github.com/acpica/acpica/commit/44ca5f4f
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit eefb865355514048380d921de5efcf30027d6b02
IVHD type 40h uses the same field layout as type 11h, but adds support
for a new device entry type F0h (ACPI HID device entry). The new device
entry type has variable length: after fixed-length fields occupying 22
bytes, there's a field of length up to 255 (as given by the preceding
field).
Link: https://github.com/acpica/acpica/commit/eefb8653
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
System time snapshots are not conveying information about the current
clocksource which was used, but callers like the PTP KVM guest
implementation have the requirement to evaluate the clocksource type to
select the appropriate mechanism.
Introduce a clocksource id field in struct clocksource which is by default
set to CSID_GENERIC (0). Clocksource implementations can set that field to
a value which allows to identify the clocksource.
Store the clocksource id of the current clocksource in the
system_time_snapshot so callers can evaluate which clocksource was used to
take the snapshot and act accordingly.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201209060932.212364-5-jianyong.wu@arm.com
Vinod writes:
phy-for-5.13
- Updates:
- Yaml conversion for mvebu-utmi binding, bcm-ns-usb2 and
bcm-ns-usb3 bindings
- Mediatek dsi and hdmi phy updates
- TI j721e-wiz updates for AM64
- Cadence-torrent phy updates for SGMII/QSGMII
- New support:
- usb3-dp phy for Qualcomm SM8250
- UTMI phy for Armada CP110
- USB phy for Qualcomm SC7280
- Binding and driver for Sparx5 ethernet serdes
* tag 'phy-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (75 commits)
phy: fix resource_size.cocci warnings
phy: Sparx5 Eth SerDes: Use direct register operations
phy: hisilicon: Use the correct HiSilicon copyright
phy: marvell: phy-mvebu-cp11i-utmi needs USB_COMMON
phy: qcom-qmp: add support for sm8250-usb3-dp phy
phy: qcom-qmp: rename common registers
phy: qcom-qmp: move DP functions to callbacks
dt-bindings: phy: qcom,qmp-usb3-dp: Add support for SM8250
dt-bindings: phy: qcom,qmp-usb3-dp-phy: move usb3 compatibles back to qcom,qmp-phy.yaml
phy: ti: j721e-wiz: Configure 'p_standard_mode' only for DP/QSGMII
dt-bindings: phy: fix dt_binding_check warning in mediatek, ufs-phy.yaml
phy: zynqmp: Handle the clock enable/disable properly
dt-bindings: phy: bcm-ns-usb3-phy: convert to yaml
dt-bindings: phy: bcm-ns-usb2-phy: convert to yaml
phy: microchip: PHY_SPARX5_SERDES should depend on ARCH_SPARX5
phy: cadence-torrent: Add delay for PIPE clock to be stable
phy: cadence-torrent: Explicitly request exclusive reset control
phy: cadence-torrent: Do not configure SERDES if it's already configured
phy: cadence-torrent: Group reset APIs and clock APIs
phy: ti: j721e-wiz: Do not configure wiz if its already configured
...
Vinod writes:
soundwire updates for 5.13-rc1
Updates for v5.13-rc1 are:
Core:
- Ability to add quirks for masters
- static checker cleanup for bus code
Drivers:
- DMI quirks for Intel controllers
- static checker cleanup for drivers
- add auto enumeration support qcom controller
* tag 'soundwire-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire: (45 commits)
soundwire: intel_init: test link->cdns
soundwire: qcom: handle return correctly in qcom_swrm_transport_params
soundwire: qcom: cleanup internal port config indexing
soundwire: qcom: wait for fifo space to be available before read/write
soundwire: qcom: add static port map support
soundwire: qcom: update port map allocation bit mask
soundwire: add static port mapping support
soundwire: stream: fix memory leak in stream config error path
soundwire: qcom: use signed variable for error return
soundwire: qcom: wait for enumeration to be complete in probe
soundwire: qcom: add auto enumeration support
soundwire: export sdw_compare_devid, sdw_extract_slave_id and sdw_slave_add
soundwire: qcom: add support to new interrupts
soundwire: qcom: update register read/write routine
soundwire: qcom: start the clock during initialization
soundwire: qcom: set continue execution flag for ignored commands
soundwire: qcom: add support to missing transport params
dt-bindings: soundwire: qcom: clarify data port bus parameters
soundwire: cadence: only prepare attached devices on clock stop
soundwire: generic_allocation: fix confusion between group and packing
...
This is the capacity in percentage, relative to design capacity.
Specifically, it is present in Apple Magic Mouse 2.
In contrast, usage 00850064 is also the capacity in percentage, but is
relative to full capacity. It is not mapped here because I don't have
such device.
Signed-off-by: John Chen <johnchen902@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
A few functions that were intentended for the perf events support are
currently declared in arch/x86/events/amd/iommu.h, which mens they are
not in scope for the actual function definition. Also amdkfd has started
using a few of them using externs in a .c file. End that misery by
moving the prototypes to the proper header.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Link: https://lore.kernel.org/r/20210402143312.372386-5-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Instead make the global iommu_dma_strict paramete in iommu.c canonical by
exporting helpers to get and set it and use those directly in the drivers.
This make sure that the iommu.strict parameter also works for the AMD and
Intel IOMMU drivers on x86. As those default to lazy flushing a new
IOMMU_CMD_LINE_STRICT is used to turn the value into a tristate to
represent the default if not overriden by an explicit parameter.
[ported on top of the other iommu_attr changes and added a few small
missing bits]
Signed-off-by: Robin Murphy <robin.murphy@arm.com>.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Link: https://lore.kernel.org/r/20210401155256.298656-19-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The only thing that fsl_pamu_window_enable does for the current caller
is to fill in the prot value in the only dma_window structure, and to
propagate a few values from the iommu_domain_geometry struture into the
dma_window. Remove the dma_window entirely, hardcode the prot value and
otherwise use the iommu_domain_geometry structure instead.
Remove the now unused ->domain_window_enable iommu method.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-7-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Some systems allow devices to handle I/O Page Faults in the core mm. For
example systems implementing the PCIe PRI extension or Arm SMMU stall
model. Infrastructure for reporting these recoverable page faults was
added to the IOMMU core by commit 0c830e6b32 ("iommu: Introduce device
fault report API"). Add a page fault handler for host SVA.
IOMMU driver can now instantiate several fault workqueues and link them
to IOPF-capable devices. Drivers can choose between a single global
workqueue, one per IOMMU device, one per low-level fault queue, one per
domain, etc.
When it receives a fault event, most commonly in an IRQ handler, the
IOMMU driver reports the fault using iommu_report_device_fault(), which
calls the registered handler. The page fault handler then calls the mm
fault handler, and reports either success or failure with
iommu_page_response(). After the handler succeeds, the hardware retries
the access.
The iopf_param pointer could be embedded into iommu_fault_param. But
putting iopf_param into the iommu_param structure allows us not to care
about ordering between calls to iopf_queue_add_device() and
iommu_register_device_fault_handler().
Tested-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20210401154718.307519-7-jean-philippe@linaro.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Some devices manage I/O Page Faults (IOPF) themselves instead of relying
on PCIe PRI or Arm SMMU stall. Allow their drivers to enable SVA without
mandating IOMMU-managed IOPF. The other device drivers now need to first
enable IOMMU_DEV_FEAT_IOPF before enabling IOMMU_DEV_FEAT_SVA. Enabling
IOMMU_DEV_FEAT_IOPF on its own doesn't have any effect visible to the
device driver, it is used in combination with other features.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20210401154718.307519-4-jean-philippe@linaro.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>
After the change of patch ("iommu: Switch gather->end to the
inclusive end"), the performace drops from 1600+K IOPS to 1200K in our
kunpeng ARM64 platform.
We find that the range [start1, end1) actually is joint from the range
[end1, end2), but it is considered as disjoint after the change,
so it needs more times of TLB sync, and spends more time on it.
So fix the boundary issue to avoid performance drop.
Fixes: 862c3715de ("iommu: Switch gather->end to the inclusive end")
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/1616643504-120688-1-git-send-email-chenxiang66@hisilicon.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Jonathan writes:
2nd set of IIO features, cleanups etc for 5.13
Trying again as a wrong fixes tag managed to beat the checking script
I was running.
A few of these are fixes for major rework earlier in cycle.
Bulk of patches are the ad7150 pre graduation cleanup, some link
fixes in maintainers and set using the new IRQF_NO_AUTOEN flag.
Note includes a merge of a tag from tip to get the IRQF_NO_AUTOEN
support (one patch only from Barry Song)
Staging graduation
* adi,ad7150 CDC
- A lot of precursor patches cleaning it up first.
- Includes core support for timeout event ABI where after a time
a adaptive threshold jumps to fix slow tracking problems.
Cleanups and minor / late breaking fixes
* core
- Use sysfs_emit() and sysfs_emit_at() as appropriate
- Fix a bug introduced in this cycle for iio_read_channel_processed_scale()
- Fix handling of getfd ioctl as IIO_IOCTL_UNHANDLED is a valid ioctl number
- Tidy up some pointless type conversion in string formatting and odd
indentation.
* dac
- Use sysfs_emit() for powerdown attribute show() functions.
* docs
- Fix dead links due to txt to yaml binding conversions.
* treewide
- Use IRQF_NO_AUTOEN
* various
- Typo fixes in comments.
* triggers/hr-timer-trigger
- Fix an overflow handing issue.
* ad,ad7923
- Device managed functions in probe()
* ad,ad9467
- Fix kconfig dependency issue
* adi,adis16201
- Fix a wrong axis assignment that stops the driver loading.
* invensense,mpu6050
- Allow use as a standalone trigger (no channels enabled)
- Drop unnecessary manual assignment of indio_dev->modes
- Make device function in a basic way if no interrupt wired.
- Sanity check scale writes.
* semtech,sx9310
- Fix access to a variable length array in DT binding.
- Sanity check input before writing debounce register.
* st,stm32-dfsdm
- Drop __func__ from dev_dbg() and pr_debug().
* yamaha,yas530
- Include asm/unaligned.h instead of be_byteshift.h
- Fix an issue with return value on an error path.
* tag 'iio-for-5.13b-take2' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (76 commits)
iio: inv_mpu6050: Fully validate gyro and accel scale writes
iio: sx9310: Fix write_.._debounce()
iio: sx9310: Fix access to variable DT array
iio: adc: Kconfig: make AD9467 depend on ADI_AXI_ADC symbol
iio: magnetometer: yas530: Include right header
iio: magnetometer: yas530: Fix return value on error path
iio:cdc:ad7150: Fix use of uninitialized ret
iio: hrtimer-trigger: Fix potential integer overflow in iio_hrtimer_store_sampling_frequency
iio:adc: Fix trivial typo
iio:adc:ad7476: Fix remove handling
iio:adc:ad_sigma_delta: Use IRQF_NO_AUTOEN rather than request and disable
iio:imu:adis: Use IRQF_NO_AUTOEN instead of irq request then disable
iio:chemical:scd30: Use IRQF_NO_AUTOEN to avoid irq request then disable
iio:adc:sun4i-gpadc: Use new IRQF_NO_AUTOEN flag instead of request then disable
iio:adc:nau7802: Use IRQF_NO_AUTOEN instead of request then disable
iio:adc:exynos-adc: Use new IRQF_NO_AUTOEN flag rather than separate irq_disable()
iio:adc:ad7766: Use new IRQF_NO_AUTOEN to reduce boilerplate
iio: buffer: use sysfs_attr_init() on allocated attrs
iio: trigger: Fix strange (ladder-type) indentation
iio: trigger: Replace explicit casting and wrong specifier with proper one
...
On a typical end product, a vendor may choose to secure some regions in
the NAND memory which are supposed to stay intact between FW upgrades.
The access to those regions will be blocked by a secure element like
Trustzone. So the normal world software like Linux kernel should not
touch these regions (including reading).
The regions are declared using a NAND chip DT property,
"secure-regions". So let's make use of this property in the raw NAND
core and skip access to the secure regions present in a system.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-4-manivannan.sadhasivam@linaro.org
