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329 Commits

Author SHA1 Message Date
Barnabás Czémán
f1f514d730 dt-bindings: display/msm/gpu: describe A505 clocks 
Descirbe A505 clocks it is using same clocks like A506.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Patchwork: https://patchwork.freedesktop.org/patch/672751/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
 2025-09-08 07:24:58 -07:00
Jie Zhang
c2cc1e60c1 dt-bindings: display/msm/gmu: Update Adreno 623 bindings 
Update Adreno 623's dt-binding to remove smmu_clk which is not required
for this GMU.

Signed-off-by: Jie Zhang <quic_jiezh@quicinc.com>
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/672455/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
 2025-09-06 09:09:39 -07:00
Abhinav Kumar
9be5c47908 dt-bindings: display/msm: expand to support MST 
On a vast majority of Qualcomm chipsets DisplayPort controller can
support several MST streams (up to 4x). To support MST these chipsets
use up to 4 stream pixel clocks for the DisplayPort controller and
several extra register regions. Expand corresponding region and clock
bindings for these platforms and fix example schema files to follow
updated bindings.

Note: On chipsets that support MST, the number of streams supported
can vary between controllers. For example, SA8775P supports 4 MST
streams on mdss_dp0 but only 2 streams on mdss_dp1.

Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/672585/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-7-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Abhinav Kumar
0253f5ef8d dt-bindings: display/msm: drop assigned-clock-parents for dp controller 
DP controller schema documents assigned-clocks and
assigned-clock-parents. However these assignments should not be a part
of the ABI: there are no actual requirements on the order of the
assignments, MST cases require different number of clocks to be
assigned, etc.

Instead of fixing up the documentation, drop the assigned-clock-parents
and assigned-clocks from the bindings. The generic clock/clock.yaml
already covers these properties.

Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/672586/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-6-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Abhinav Kumar
3259ffe5b1 dt-bindings: display/msm: dp-controller: add X1E80100 
Add X1E80100 to the dp-controller bindings, it has DisplayPort
controller similar to other platforms, but it uses its own compatible
string.

Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/672578/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-5-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Abhinav Kumar
2c97ee44d2 dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses 
Fix c&p error and correct example to use 32-bit addressing (as the rest
of the example DT does) instead of 64-bit (as the platform does).  It
got unnoticed before since DP controller node wasn't validated against
DT schema because of the missing compatible.

Fixes: 81de267367 ("dt-bindings: display/msm: Document MDSS on X1E80100")
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/672574/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-4-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Dmitry Baryshkov
afc9e583c0 dt-bindings: display/msm: dp-controller: document DP on SM7150 
The qcom,sm7150-dp compatible is documented in schema. Mark DisplayPort
controller as compatible with SM8350.

Fixes: 726eded12d ("dt-bindings: display/msm: Add SM7150 MDSS")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/672572/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-3-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Dmitry Baryshkov
5484265fd6 dt-bindings: display/msm: dp-controller: fix fallback for SM6350 
Currently SM6350 uses qcom,sm8350-dp as a fallback compatible entry.
This works, but adding DP MST support will reveal that this SoC is
not fully compatible with SM8350 platform: the former one doesn't
provide MST support, while the latter one will get it. DT schema for
SM8350 is going to demand MST-related clocks which SM6350 doesn't
provide.

Add new entry for SM6350 with fallback to SC7180 (which belongs to the
same generation and also doesn't have MST support). SC7180 has been
supported by the Linux kernel long ago (and long before SM8350 support
was added).

Fixes: 3908615159 ("dt-bindings: display: msm: dp-controller: document SM6350 compatible")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/672571/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-2-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Dmitry Baryshkov
ac77c8f12e dt-bindings: display/msm: dp-controller: allow eDP for SA8775P 
On Qualcomm SA8775P the DP controller might be driving either a
DisplayPort or a eDP sink (depending on the PHY that is tied to the
controller). Reflect that in the schema.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/672569/
Link: https://lore.kernel.org/r/20250903-dp_mst_bindings-v8-1-7526f0311eaa@oss.qualcomm.com
 2025-09-04 02:20:49 +03:00
Dmitry Baryshkov
fd5c9b3c99 dt-bindings: display/msm: describe MDSS on SC8180X 
Describe the Mobile Display SubSystem (MDSS) unit as present on the
SC8180X platform.

Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/662498/
Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-3-e978e4e73e14@oss.qualcomm.com
 2025-08-29 01:51:46 +03:00
Dmitry Baryshkov
275af16d72 dt-bindings: display/msm: describe DPU on SC8180X 
Describe the Display Processing Unit (DPU) as present on the SC8180X
platform.

Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/662502/
Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-2-e978e4e73e14@oss.qualcomm.com
 2025-08-29 01:51:45 +03:00
Dmitry Baryshkov
505441083a dt-bindings: display/msm: dsi-controller-main: add SC8180X 
Describe the SC8180X-specific compatible for the DSI controller persent
on the SoC. While the current DT for SC8180X doesn't use this
compatible, all other platforms were updated to have one. This change
makes SC8180X follow the lead.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/662495/
Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-1-e978e4e73e14@oss.qualcomm.com
 2025-08-29 01:51:45 +03:00
Dmitry Baryshkov
f3b649d7a5 dt-bindings: display/msm/gpu: describe clocks for each Adreno GPU type 
Rather than having a single list with all possible clocks for A3xx-A5xx
define individual Adreno GPU types and corresponding clock lists.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/661348/
Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-3-89f818c51b6a@oss.qualcomm.com
 2025-08-29 01:51:45 +03:00
Dmitry Baryshkov
cef3a60b30 dt-bindings: display/msm/gpu: describe alwayson clock 
Adreno A506 and A510 have one extra clock, alwayson. Describe it in the
schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/661352/
Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-2-89f818c51b6a@oss.qualcomm.com
 2025-08-29 01:51:45 +03:00
Dmitry Baryshkov
86d39a046b dt-bindings: display/msm/gpu: account for 7xx GPUs in clocks conditions 
Handle two cases for Adreno 7xx:
- Adreno 702 follows A610 and A619 example and has clocks in the GPU
  node.
- Newer 7xx GPUs use a different pattern for the compatibles and did not
  match currently.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/661351/
Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-1-89f818c51b6a@oss.qualcomm.com
 2025-08-29 01:51:45 +03:00
Dmitry Baryshkov
7ab3b7579a dt-bindings: display/msm: qcom,mdp5: drop lut clock 
None of MDP5 platforms have a LUT clock on the display-controller, it
was added by the mistake. Drop it, fixing DT warnings on MSM8976 /
MSM8956 platforms. Technically it's an ABI break, but no other platforms
are affected.

Fixes: 385c8ac763 ("dt-bindings: display/msm: convert MDP5 schema to YAML format")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/667822/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
 2025-08-25 14:00:10 -07:00
Krzysztof Kozlowski
6b93840116 dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750 
Add MDSS/MDP display subsystem for Qualcomm SM8750 SoC, next generation
with two revisions up of the IP block comparing to SM8650.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659614/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-5-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-07-04 16:35:19 +03:00
Krzysztof Kozlowski
1ea958223c dt-bindings: display/msm: qcom,sm8650-dpu: Add SM8750 
Add DPU for Qualcomm SM8750 SoC which has several differences, new
blocks and changes in registers, making it incompatible with SM8650.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659612/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-4-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-07-04 16:35:19 +03:00
Krzysztof Kozlowski
1364e7e66f dt-bindings: display/msm: dp-controller: Add SM8750 
Add DisplayPort controller for Qualcomm SM8750 SoC which so far looks
fully compatible with earlier SM8650 variant - both are of version
v1.5.1 of the IP block.  Datasheet also mentions that both support 4x
MST for DPTX0 and 2x MST for DPTX1.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659611/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-3-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-07-04 16:35:19 +03:00
Krzysztof Kozlowski
34bdf809a5 dt-bindings: display/msm: dsi-controller-main: Add SM8750 
Add DSI controller for Qualcomm SM8750 SoC which is quite different from
previous (SM8650) generation.

It does not allow the display clock controller clocks like "byte" and
"pixel" to be reparented to DSI PHY PLLs while the DSI PHY PLL is not
configured (not prepared, rate not set).  Therefore
assigned-clock-parents are not working here and driver is responsible
for reparenting clocks with proper procedure.  These clocks are now
inputs to the DSI controller device.

Except that SM8750 DSI comes with several differences, new blocks and
changes in registers, making it incompatible with SM8650.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659609/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-2-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-07-04 16:35:19 +03:00
Krzysztof Kozlowski
c257d2c848 dt-bindings: display/msm: dsi-phy-7nm: Add SM8750 
Add DSI PHY v7.0 for Qualcomm SM8750 SoC which is quite different from
previous (SM8650) generation.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659615/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-1-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-07-04 16:35:19 +03:00
Dmitry Baryshkov
fc5c669c90 dt-bindings: display: msm: correct example in SM8350 MDSS schema 
Fix the interconnects in the example to follow the schema changes.

Fixes: 60b8d3a236 ("dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path")
Reported-by: Rob Herring <robh@kernel.org>
Closes: http://lore.kernel.org/r/CAL_JsqKr8Xd8uxFzE0YJTyD+V6N++VV8SX-GB5Xt0_BKkeoGUQ@mail.gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/651775/
Link: https://lore.kernel.org/r/20250505-sm8350-fix-example-v1-1-36d5d9ccba66@oss.qualcomm.com
 2025-05-13 21:53:34 +03:00
Rob Herring (Arm)
d92801d8e6 dt-bindings: display/msm: hdmi: Fix constraints on additional 'port' properties 
The MSM HDMI port nodes are missing any restrictions on additional
properties. The $ref should be to "/properties/port" rather than
"/$defs/port-base" as there are not additional properties in the nodes
to define.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/652299/
Link: https://lore.kernel.org/r/20250507215912.2748964-1-robh@kernel.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-12 19:18:49 +03:00
Dmitry Baryshkov
90957ca46a dt-bindings: display/msm/hdmi: drop obsolete GPIOs from schema 
The commit 68e674b13b ("drm/msm/hdmi: drop unused GPIO support")
dropped support for obsolete qcom,hdmi-tx-mux-* gpios. They were not
used by any of the upstream platforms. Drop them from the bindings too.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/651708/
Link: https://lore.kernel.org/r/20250505-fd-hdmi-hpd-v5-1-48541f76318c@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-12 19:18:48 +03:00
Ayushi Makhija
a6f2524f4d dt-bindings: display: msm: document DSI controller and phy on SA8775P 
Document DSI controller and phy on SA8775P platform.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649839/
Link: https://lore.kernel.org/r/20250424062431.2040692-4-quic_amakhija@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 03:54:03 +03:00
Ayushi Makhija
2a0195b94c dt-bindings: msm: dsi-controller-main: document the SA8775P DSI CTRL 
Document the DSI CTRL on the SA8775P Platform.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649855/
Link: https://lore.kernel.org/r/20250424062431.2040692-3-quic_amakhija@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 03:54:03 +03:00
Ayushi Makhija
850e13b65e dt-bindings: display: msm-dsi-phy-7nm: document the SA8775P DSI PHY 
Document the DSI PHY on the SA8775P Platform.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649838/
Link: https://lore.kernel.org/r/20250424062431.2040692-2-quic_amakhija@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 03:54:03 +03:00
Konrad Dybcio
60b8d3a236 dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path 
There's a separate path that allows register access from CPUSS.
Describe it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/641464/
Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-2-0c84aceb0ef9@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 03:54:03 +03:00
Dmitry Baryshkov
3096209b7a dt-bindings: display/msm: Add Qualcomm SAR2130P 
Describe the Mobile Display SubSystem (MDSS) device present on the
Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the
system level. SAR2130P features two DSI hosts and single DisplayPort
controller.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649265/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-5-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 03:53:59 +03:00
Dmitry Baryshkov
759fe71817 dt-bindings: display/msm: qcom,sc7280-dpu: describe SAR2130P 
Describe DPU controller present on Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649254/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-4-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:14:27 +03:00
Dmitry Baryshkov
262650e718 dt-bindings: display/msm: dsi-phy-7nm: describe SAR2130P 
Describe MIPI DSI PHY present on Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649252/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-3-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:14:27 +03:00
Dmitry Baryshkov
3c70c9d0a9 dt-bindings: display/msm: dsi-controller-main: describe SAR2130P 
Describe MIPI DSI controller present on Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649250/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-2-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:14:27 +03:00
Dmitry Baryshkov
b341da1172 dt-bindings: display/msm: dp-controller: describe SAR2130P 
Describe DisplayPort controller present on Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649263/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-1-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:14:27 +03:00
Dmitry Baryshkov
2f1d131147 dt-bindings: display: msm: mdp4: add LCDC clock and PLL source 
Add the LCDC / LVDS clock input and the XO used to drive internal LVDS
PLL to MDP4 controller bindings. The controller also provides LVDS PHY
PLL, so add optional #clock-cells to the device.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/650278/
Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-1-6b212160b44c@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:12:30 +03:00
Luca Weiss
6694d17843 dt-bindings: msm: qcom,mdss: Document interconnect paths 
Document two interconnect paths found on the MDSS on MSM8953.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/649391/
Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-1-828715dcb674@lucaweiss.eu
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
 2025-05-02 01:11:53 +03:00
Krzysztof Kozlowski
83ee6d2ec5 dt-bindings: display/msm: dsi-controller-main: Add missing minItems 
Specific constrain in if:then: blocks for variable lists, like clocks
and clock-names, should have a fixed upper and lower size.  Older
dtschema implied minItems, but that's not true since 2024 and missing
minItems means that lower bound is not set.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/638751/
Link: https://lore.kernel.org/r/20250221-b4-sm8750-display-v3-2-3ea95b1630ea@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-03-08 03:06:00 +02:00
Krzysztof Kozlowski
0edf7b1f31 dt-bindings: display/msm: dsi-controller-main: Combine if:then: entries 
Several devices have the same clock inputs, thus they can be in the same
if:then: clause, making everything smaller.  No functional impact.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/638749/
Link: https://lore.kernel.org/r/20250221-b4-sm8750-display-v3-1-3ea95b1630ea@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-03-08 03:05:56 +02:00
Krzysztof Kozlowski
d3169ce525 dt-bindings: display/msm: qcom, sa8775p-mdss: Add missing eDP phy 
The Qualcomm SA8775p MDSS display block comes with eDP phy, already used
in DTS and already documented in phy/qcom,edp-phy.yaml binding.  Add the
missing device node in the binding and extend example to silence
dtbs_check warnings like:

  sa8775p-ride.dtb: display-subsystem@ae00000: Unevaluated properties are not allowed ('phy@aec2a00', 'phy@aec5a00' were unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/638744/
Link: https://lore.kernel.org/r/20250221151311.138755-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-03-05 04:34:13 +02:00
Jie Zhang
78e70fa099 dt-bindings: display/msm/gmu: Add Adreno 623 GMU 
Document Adreno 623 GMU in the dt-binding specification.

Signed-off-by: Jie Zhang <quic_jiezh@quicinc.com>
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/640058/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2025-02-28 09:12:27 -08:00
Neil Armstrong
162c57b8e7 dt-bindings: display: qcom,sm8650-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths 
The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2
makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg
is required, so explicitly document the mdp0-mem/cpu-cfg interconnect
paths and complete the example with the missing interconnect paths.

Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/637051/
Link: https://lore.kernel.org/r/20250213-topic-sm8x50-mdss-interconnect-bindings-fix-v4-2-3fa0bc42dd38@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-02-26 12:15:48 +02:00
Neil Armstrong
e05b233ae1 dt-bindings: display: qcom,sm8550-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths 
The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2
makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is
required, so explicitly document the mdp0-mem/cpu-cfg interconnect and
add the cpu-cfg path in the example.

Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/637050/
Link: https://lore.kernel.org/r/20250213-topic-sm8x50-mdss-interconnect-bindings-fix-v4-1-3fa0bc42dd38@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-02-26 12:15:48 +02:00
Krzysztof Kozlowski
d1f28e30a5 dt-bindings: display/msm/dsi-phy: Add header with exposed clock IDs 
DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide
two clocks.  The respective clock ID is used by drivers and DTS, so it
should be documented as explicit ABI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/634146/
Link: https://lore.kernel.org/r/20250127132105.107138-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2025-02-26 12:15:48 +02:00
Linus Torvalds
f345fc7a07 Merge tag 'devicetree-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Add Bindings for QCom QCS615 UFS, QCom IPQ5424 DWC3 USB, NXP imx7d
     MIPI DSI, QCom SM8750 PDC, QCom MSM8976 SRAM, QCom ipq6018 temp
     sensor, QCom QCS8300 Power Domain Controller, QCom QCS615 Power
     Domain Controller, QCom QCS615 APSS, QCom QCS615 qfprom, QCom
     QCS8300 remoteproc, Mediatek MT6328 PMIC, Allwinner A100 OPP, and
     NXP iMX35 GPT

   - Convert Altera socfpga-system, raspberrypi,bcm2835-power to DT
     schema

   - Add Siflower vendor prefix

   - Cleanup display, interrupt-controller, and UFS binding examples'
     indentation

   - Document preferred line wrapping (the same as the rest of the
     kernel)

  DT Core:

   - Add warning when of_property_read_bool() is used on non-boolean
     properties

   - Restore keeping bootloader DTB when booting with ACPI. Turns out
     some x86 platforms relied on that. Shrug.

   - Fix of_find_node_opts_by_path() handling of alias+path+options

   - Fix resource bounds checking for empty resources

   - A bunch of small fixes/cleanups all over from Zijun Hu

   - Cleanups in bin_attribute handling"

* tag 'devicetree-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits)
  of: address: Fix empty resource handling in __of_address_resource_bounds()
  of/fdt: Restore possibility to use both ACPI and FDT from bootloader
  docs: dt-bindings: Document preferred line wrapping
  dt-bindings: ufs: Correct indentation and style in DTS example
  of: Correct element count for two arrays in API of_parse_phandle_with_args_map()
  of: reserved-memory: Warn for missing static reserved memory regions
  of: Do not expose of_alias_scan() and correct its comments
  dt-bindings: ufs: qcom: Add UFS Host Controller for QCS615
  dt-bindings: usb: qcom,dwc3: Add IPQ5424 to USB DWC3 bindings
  dt-bindings: arm: coresight: Update the pattern of ete node name
  of: Warn when of_property_read_bool() is used on non-boolean properties
  device property: Split property reading bool and presence test ops
  of/fdt: Check fdt_get_mem_rsv() error in early_init_fdt_scan_reserved_mem()
  of: reserved-memory: Move an assignment to effective place in __reserved_mem_alloc_size()
  of: reserved-memory: Do not make kmemleak ignore freed address
  of: reserved-memory: Fix using wrong number of cells to get property 'alignment'
  of: Remove a duplicated code block
  of: property: Avoiding using uninitialized variable @imaplen in parse_interrupt_map()
  of: Correct child specifier used as input of the 2nd nexus node
  dt-bindings: interrupt-controller: ti,omap4-wugen-mpu: Add file extension
  ...
 2025-01-24 15:09:20 -08:00
Krzysztof Kozlowski
52659fab5a dt-bindings: display: Correct indentation and style in DTS example 
DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding.

No functional changes here, but saves some comments during reviews of
new patches built on existing code.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # msm
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Link: https://lore.kernel.org/r/20250107125854.227233-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
 2025-01-10 09:43:41 -06:00
Abhinav Kumar
c36c60d1f7 dt-bindings: display: msm: dp: update maintainer entry 
Add myself as maintainer for dp controller yaml as to support
review of the incoming changes.

Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/626921/
Link: https://lore.kernel.org/r/20241202-dp_mst_bindings-v1-4-9a9a43b0624a@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-12-24 20:57:59 +02:00
Li Liu
701da2861c dt-bindings: display/msm: Add SM6150 MDSS & DPU 
Document the MDSS and DPU hardware found on the Qualcomm SM6150 platform.

Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/628003/
Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-3-2d875a67602d@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-12-15 14:37:19 +02:00
Li Liu
e9280f124b dt-bindings: display/msm: dsi-controller-main: Document SM6150 
Document general compatibility of the DSI controller on SM6150.

Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/628002/
Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-2-2d875a67602d@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-12-15 14:37:19 +02:00
Li Liu
5902cd2212 dt-bindings: display/msm: Add SM6150 DSI phy 
Add new compatible for SM6150 with dsi_phy_14nm_36mA_regulators

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/627999/
Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-1-2d875a67602d@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-12-15 14:37:19 +02:00
Dmitry Baryshkov
3b08796f2a dt-bindings: display/msm: qcom,sa8775p-mdss: fix the example 
Add p1 region to the list of DP registers in the SA8775p example. This
fixes the following warning:

Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.example.dtb: displayport-controller@af54000: reg: [[183844864, 260], [183845376, 192], [183848960, 1904], [183853056, 156]] is too short

Fixes: 409685915f ("dt-bindings: display/msm: Document MDSS on SA8775P")
Reported-by: Rob Herring <robh@kernel.org>
Closes: https://lore.kernel.org/dri-devel/CAL_JsqJ0zoyaZAgZtyJ8xMsPY+YzrbF-YG1vPN6tFoFXQaW09w@mail.gmail.com/
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/624068/
Link: https://lore.kernel.org/r/20241112-fd-dp-fux-warning-v2-1-8cc4960094bd@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-12-02 18:50:05 -08:00
Puranam V G Tejaswi
1c967110e7 dt-bindings: display/msm/gmu: Add Adreno 663 GMU 
Document Adreno 663 GMU in the dt-binding specification.

Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com>
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/620771/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-27 08:13:50 -07:00