Commit Graph

11770 Commits

Author SHA1 Message Date
Linus Torvalds
37a93dd5c4 Merge tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from Paolo Abeni:
 "Core & protocols:

   - A significant effort all around the stack to guide the compiler to
     make the right choice when inlining code, to avoid unneeded calls
     for small helper and stack canary overhead in the fast-path.

     This generates better and faster code with very small or no text
     size increases, as in many cases the call generated more code than
     the actual inlined helper.

   - Extend AccECN implementation so that is now functionally complete,
     also allow the user-space enabling it on a per network namespace
     basis.

   - Add support for memory providers with large (above 4K) rx buffer.
     Paired with hw-gro, larger rx buffer sizes reduce the number of
     buffers traversing the stack, dincreasing single stream CPU usage
     by up to ~30%.

   - Do not add HBH header to Big TCP GSO packets. This simplifies the
     RX path, the TX path and the NIC drivers, and is possible because
     user-space taps can now interpret correctly such packets without
     the HBH hint.

   - Allow IPv6 routes to be configured with a gateway address that is
     resolved out of a different interface than the one specified,
     aligning IPv6 to IPv4 behavior.

   - Multi-queue aware sch_cake. This makes it possible to scale the
     rate shaper of sch_cake across multiple CPUs, while still enforcing
     a single global rate on the interface.

   - Add support for the nbcon (new buffer console) infrastructure to
     netconsole, enabling lock-free, priority-based console operations
     that are safer in crash scenarios.

   - Improve the TCP ipv6 output path to cache the flow information,
     saving cpu cycles, reducing cache line misses and stack use.

   - Improve netfilter packet tracker to resolve clashes for most
     protocols, avoiding unneeded drops on rare occasions.

   - Add IP6IP6 tunneling acceleration to the flowtable infrastructure.

   - Reduce tcp socket size by one cache line.

   - Notify neighbour changes atomically, avoiding inconsistencies
     between the notification sequence and the actual states sequence.

   - Add vsock namespace support, allowing complete isolation of vsocks
     across different network namespaces.

   - Improve xsk generic performances with cache-alignment-oriented
     optimizations.

   - Support netconsole automatic target recovery, allowing netconsole
     to reestablish targets when underlying low-level interface comes
     back online.

  Driver API:

   - Support for switching the working mode (automatic vs manual) of a
     DPLL device via netlink.

   - Introduce PHY ports representation to expose multiple front-facing
     media ports over a single MAC.

   - Introduce "rx-polarity" and "tx-polarity" device tree properties,
     to generalize polarity inversion requirements for differential
     signaling.

   - Add helper to create, prepare and enable managed clocks.

  Device drivers:

   - Add Huawei hinic3 PF etherner driver.

   - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet
     controller.

   - Add ethernet driver for MaxLinear MxL862xx switches

   - Remove parallel-port Ethernet driver.

   - Convert existing driver timestamp configuration reporting to
     hwtstamp_get and remove legacy ioctl().

   - Convert existing drivers to .get_rx_ring_count(), simplifing the RX
     ring count retrieval. Also remove the legacy fallback path.

   - Ethernet high-speed NICs:
      - Broadcom (bnxt, bng):
         - bnxt: add FW interface update to support FEC stats histogram
           and NVRAM defragmentation
         - bng: add TSO and H/W GRO support
      - nVidia/Mellanox (mlx5):
         - improve latency of channel restart operations, reducing the
           used H/W resources
         - add TSO support for UDP over GRE over VLAN
         - add flow counters support for hardware steering (HWS) rules
         - use a static memory area to store headers for H/W GRO,
           leading to 12% RX tput improvement
      - Intel (100G, ice, idpf):
         - ice: reorganizes layout of Tx and Rx rings for cacheline
           locality and utilizes __cacheline_group* macros on the new
           layouts
         - ice: introduces Synchronous Ethernet (SyncE) support
      - Meta (fbnic):
         - adds debugfs for firmware mailbox and tx/rx rings vectors

   - Ethernet virtual:
      - geneve: introduce GRO/GSO support for double UDP encapsulation

   - Ethernet NICs consumer, and embedded:
      - Synopsys (stmmac):
         - some code refactoring and cleanups
      - RealTek (r8169):
         - add support for RTL8127ATF (10G Fiber SFP)
         - add dash and LTR support
      - Airoha:
         - AN8811HB 2.5 Gbps phy support
      - Freescale (fec):
         - add XDP zero-copy support
      - Thunderbolt:
         - add get link setting support to allow bonding
      - Renesas:
         - add support for RZ/G3L GBETH SoC

   - Ethernet switches:
      - Maxlinear:
         - support R(G)MII slow rate configuration
         - add support for Intel GSW150
      - Motorcomm (yt921x):
         - add DCB/QoS support
      - TI:
         - icssm-prueth: support bridging (STP/RSTP) via the switchdev
           framework

   - Ethernet PHYs:
      - Realtek:
         - enable SGMII and 2500Base-X in-band auto-negotiation
         - simplify and reunify C22/C45 drivers
      - Micrel: convert bindings to DT schema

   - CAN:
      - move skb headroom content into skb extensions, making CAN
        metadata access more robust

   - CAN drivers:
      - rcar_canfd:
         - add support for FD-only mode
         - add support for the RZ/T2H SoC
      - sja1000: cleanup the CAN state handling

   - WiFi:
      - implement EPPKE/802.1X over auth frames support
      - split up drop reasons better, removing generic RX_DROP
      - additional FTM capabilities: 6 GHz support, supported number of
        spatial streams and supported number of LTF repetitions
      - better mac80211 iterators to enumerate resources
      - initial UHR (Wi-Fi 8) support for cfg80211/mac80211

   - WiFi drivers:
      - Qualcomm/Atheros:
         - ath11k: support for Channel Frequency Response measurement
         - ath12k: a significant driver refactor to support multi-wiphy
           devices and and pave the way for future device support in the
           same driver (rather than splitting to ath13k)
         - ath12k: support for the QCC2072 chipset
      - Intel:
         - iwlwifi: partial Neighbor Awareness Networking (NAN) support
         - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn
      - RealTek (rtw89):
         - preparations for RTL8922DE support

   - Bluetooth:
      - implement setsockopt(BT_PHY) to set the connection packet type/PHY
      - set link_policy on incoming ACL connections

   - Bluetooth drivers:
      - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE
      - btqca: add WCN6855 firmware priority selection feature"

* tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1254 commits)
  bnge/bng_re: Add a new HSI
  net: macb: Fix tx/rx malfunction after phy link down and up
  af_unix: Fix memleak of newsk in unix_stream_connect().
  net: ti: icssg-prueth: Add optional dependency on HSR
  net: dsa: add basic initial driver for MxL862xx switches
  net: mdio: add unlocked mdiodev C45 bus accessors
  net: dsa: add tag format for MxL862xx switches
  dt-bindings: net: dsa: add MaxLinear MxL862xx
  selftests: drivers: net: hw: Modify toeplitz.c to poll for packets
  octeontx2-pf: Unregister devlink on probe failure
  net: renesas: rswitch: fix forwarding offload statemachine
  ionic: Rate limit unknown xcvr type messages
  tcp: inet6_csk_xmit() optimization
  tcp: populate inet->cork.fl.u.ip6 in tcp_v6_syn_recv_sock()
  tcp: populate inet->cork.fl.u.ip6 in tcp_v6_connect()
  ipv6: inet6_csk_xmit() and inet6_csk_update_pmtu() use inet->cork.fl.u.ip6
  ipv6: use inet->cork.fl.u.ip6 and np->final in ip6_datagram_dst_update()
  ipv6: use np->final in inet6_sk_rebuild_header()
  ipv6: add daddr/final storage in struct ipv6_pinfo
  net: stmmac: qcom-ethqos: fix qcom_ethqos_serdes_powerup()
  ...
2026-02-11 19:31:52 -08:00
Linus Torvalds
098b6e44cb Merge tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT core:

   - Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8

   - Add a for_each_compatible_node_scoped() loop and convert users in
     cpufreq, dmaengine, clk, cdx, powerpc and Arm

   - Simplify of/platform.c with scoped loop helpers

   - Add fw_devlink tracking for "mmc-pwrseq"

   - Optimize fw_devlink callback code size for pinctrl-N properties

   - Replace strcmp_suffix() with strends()

  DT bindings:

   - Support building single binding targets

   - Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst

   - Add bindings for Freescale AVIC, Realtek RTD1xxx system
     controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI
     WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply,
     Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610
     Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller,
     socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware

   - Lots of trivial binding fixes to address warnings in DTS files.
     These are mostly for arm64 platforms which is getting closer to be
     warning free. Some public shaming has helped.

   - Fix I2C bus node names in examples

   - Drop obsolete brcm,vulcan-soc binding

   - Drop unreferenced binding headers"

* tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (60 commits)
  dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic
  dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings
  dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement
  dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated
  cpufreq: s5pv210: Simplify with scoped for each OF child loop
  dmaengine: fsl_raid: Simplify with scoped for each OF child loop
  clk: imx: imx31: Simplify with scoped for each OF child loop
  clk: imx: imx27: Simplify with scoped for each OF child loop
  cdx: Use mutex guard to simplify error handling
  cdx: Simplify with scoped for each OF child loop
  powerpc/wii: Simplify with scoped for each OF child loop
  powerpc/fsp2: Simplify with scoped for each OF child loop
  ARM: exynos: Simplify with scoped for each OF child loop
  ARM: at91: Simplify with scoped for each OF child loop
  of: Add for_each_compatible_node_scoped() helper
  dt-bindings: Fix emails with spaces or missing brackets
  scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8
  dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs
  dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles
  of: reserved_mem: Fix placement of __free() annotation
  ...
2026-02-11 18:27:08 -08:00
Linus Torvalds
d701782152 Merge tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski:
 "There are two new drivers and some changes to GPIO core but mostly
  just GPIO driver updates across a wide array of files, adding support
  for new models as well as various refactoring changes. Nothing
  controversial and everything has spent a good measure of time in
  linux-next.

  GPIOLIB core:
   - shrink the GPIO bus driver stub code
   - rework software node support for "undefined" software nodes
   - provide and use devm_fwnode_gpiod_get_optional()
   - only compile the OF quirk for MT2701 when needed

  New drivers:
   - add the GPIO driver for ROHM bd72720
   - add the gpio-line-mux driver providing 1-to-many mapping for a
     single real GPIO

  Driver changes:
   - refactor gpio-pca9570: use lock guard, add missing headers, use
     devres consistently
   - add support for a new model (G7 Aspeed sgpiom) to the aspeed-sgpio
     driver along with some prerequisite refactoring
   - use device_get_match_data() where applicable and save some lines
   - add support for more models to gpio-cadence
   - add the compatible property to reset-gpio and use it in shared GPIO
     management
   - drop unnecessary use of irqd_get_trigger_type() in gpio-max77759
   - add support for a new variant to gpio-pca953x
   - extend build coverage with COMPILE_TEST for more drivers
   - constify configfs structures in gpio-sim and gpio-virtuser
   - add support for the K3 SoC to gpio-spacemit
   - implement the missing .get_direction() callback in gpio-max77620
   - add support for Tegra264 to gpio-tegra186
   - drop unneeded MODULE_ALIAS() from gpio-menz127

  DT bindings:
   - document support for the opencores GPIO controller in gpio-mmio
   - document new variants for gpio-pca953x

  Documentation:
   - extensively describe interrupt source detection for gpio-pca953x
     and add more models to the list of supported variants"

* tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits)
  gpio: tegra186: Add support for Tegra264
  dt-bindings: gpio: Add Tegra264 support
  gpio: spacemit-k1: Use PDR for pin direction, not SDR/CDR
  gpio: max77620: Implement .get_direction() callback
  gpio: aspeed-sgpio: Support G7 Aspeed sgpiom controller
  dt-bindings: gpio: aspeed,sgpio: Support ast2700
  gpio: aspeed-sgpio: Convert IRQ functions to use llops callbacks
  gpio: aspeed-sgpio: Create llops to handle hardware access
  gpio: aspeed-sgpio: Remove unused bank name field
  gpio: aspeed-sgpio: Change the macro to support deferred probe
  regulator: bd71815: switch to devm_fwnode_gpiod_get_optional
  gpiolib: introduce devm_fwnode_gpiod_get_optional() wrapper
  gpio: mmio: Add compatible for opencores GPIO
  dt-bindings: gpio-mmio: Correct opencores GPIO
  gpio: pca9570: use lock guards
  gpio: pca9570: Don't use "proxy" headers
  gpio: pca9570: Use devm_mutex_init() for mutex initialization
  MAINTAINERS: Add ROHM BD72720 PMIC
  power: supply: bd71828-power: Support ROHM BD72720
  power: supply: bd71828: Support wider register addresses
  ...
2026-02-11 10:53:39 -08:00
Krzysztof Kozlowski
122b6c28c0 clk: imx: imx31: Simplify with scoped for each OF child loop
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Acked-by: Abel Vesa <abelvesa@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-9-c22fa2c0749a@oss.qualcomm.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03 20:58:13 -06:00
Krzysztof Kozlowski
f82fa1d592 clk: imx: imx27: Simplify with scoped for each OF child loop
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Acked-by: Abel Vesa <abelvesa@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-8-c22fa2c0749a@oss.qualcomm.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03 20:58:13 -06:00
Suraj Gupta
820ce0c8e9 clk: Add devm_clk_bulk_get_optional_enable() helper
Add a new managed clock framework helper function that combines getting
optional bulk clocks and enabling them in a single operation.

The devm_clk_bulk_get_optional_enable() function simplifies the common
pattern where drivers need to get optional bulk clocks, prepare and enable
them, and have them automatically disabled/unprepared and freed when the
device is unbound.

This new API follows the established pattern of
devm_clk_bulk_get_all_enabled() and reduces boilerplate code in drivers
that manage multiple optional clocks.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://patch.msgid.link/20260116192725.972966-2-suraj.gupta2@amd.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-21 18:57:07 -08:00
Matti Vaittinen
da4950b591 clk: clk-bd718x7: Support BD72720 clk gate
The BD72720 has similar simple clk gate as a few other ROHM PMICs.

Add support for BD72720 clk gate.

Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://patch.msgid.link/742e76cd0b87e726818d4fddc534a29298697b6b.1765804226.git.mazziesaccount@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13 12:50:20 +00:00
Haotian Zhang
1e07ebe744 clk: qcom: Return correct error code in qcom_cc_probe_by_index()
When devm_platform_ioremap_resource() fails, it returns various
error codes. Returning a hardcoded -ENOMEM masks the actual
failure reason.

Use PTR_ERR() to propagate the actual error code returned by
devm_platform_ioremap_resource() instead of -ENOMEM.

Fixes: 75e0a1e301 ("clk: qcom: define probe by index API as common API")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251217041338.2432-1-vulab@iscas.ac.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-03 12:16:55 -06:00
Linus Torvalds
ba65a4e712 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "This is entirely SoC clk drivers.

  The majority diff wise is for the new Rockchip and Qualcomm clk
  drivers which is mostly lines and lines of data structures to describe
  the clk hardware in these SoCs. Beyond those two, Renesas continues to
  incrementally add clks to their SoC drivers, causing them to show up
  higher in the diffstat this time because they added quite a few clks
  all over the place.

  Overall it is a semi-quiet release that has some new clk drivers and
  the usual fixes for clock data that was wrong or missing and
  non-critical cleanups that plug error paths or fix typos.

  New Drivers:
   - Qualcomm IPQ5424 Network Subsystem Clock Controller
   - Qualcomm SM8750 Video Clock Controller
   - Rockchip RV1126B and RK3506 clock drivers
   - i.MX8ULP SIM LPAV clock driver
   - Samsung ACPM (firmware interface) clock driver
   - Altera Agilex5 clock driver"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (117 commits)
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: qcom: Mark camcc_sm7150_hws static
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: rockchip: Add clock and reset driver for RK3506
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: visconti: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Remove definition of number of clocks
  clk: visconti: Do not define number of clocks in bindings
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  clk: qcom: x1e80100-dispcc: Add USB4 router link resets
  dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
  clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
  dt-bindings: clock: qcom: Add SM8750 video clock controller
  clk: qcom: branch: Extend invert logic for branch2 mem clocks
  ...
2025-12-08 09:38:52 +09:00
Linus Torvalds
f468cf53c5 Merge tag 'bitmap-for-6.19' of github.com:/norov/linux
Pull bitmap updates from Yury Norov:

 - Runtime field_{get,prep}() (Geert)

 - Rust ID pool updates (Alice)

 - min_t() simplification (David)

 - __sw_hweightN kernel-doc fixes (Andy)

 - cpumask.h headers cleanup (Andy)

* tag 'bitmap-for-6.19' of github.com:/norov/linux: (32 commits)
  rust_binder: use bitmap for allocation of handles
  rust: id_pool: do not immediately acquire new ids
  rust: id_pool: do not supply starting capacity
  rust: id_pool: rename IdPool::new() to with_capacity()
  rust: bitmap: add BitmapVec::new_inline()
  rust: bitmap: add MAX_LEN and MAX_INLINE_LEN constants
  cpumask: Don't use "proxy" headers
  soc: renesas: Use bitfield helpers
  clk: renesas: Use bitfield helpers
  ALSA: usb-audio: Convert to common field_{get,prep}() helpers
  soc: renesas: rz-sysc: Convert to common field_get() helper
  pinctrl: ma35: Convert to common field_{get,prep}() helpers
  iio: mlx90614: Convert to common field_{get,prep}() helpers
  iio: dac: Convert to common field_prep() helper
  gpio: aspeed: Convert to common field_{get,prep}() helpers
  EDAC/ie31200: Convert to common field_get() helper
  crypto: qat - convert to common field_get() helper
  clk: at91: Convert to common field_{get,prep}() helpers
  bitfield: Add non-constant field_{prep,get}() helpers
  bitfield: Add less-checking __FIELD_{GET,PREP}()
  ...
2025-12-06 09:01:27 -08:00
Linus Torvalds
208eed95fc Merge tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
 "This is the first half of the driver changes:

   - A treewide interface change to the "syscore" operations for power
     management, as a preparation for future Tegra specific changes

   - Reset controller updates with added drivers for LAN969x, eic770 and
     RZ/G3S SoCs

   - Protection of system controller registers on Renesas and Google
     SoCs, to prevent trivially triggering a system crash from e.g.
     debugfs access

   - soc_device identification updates on Nvidia, Exynos and Mediatek

   - debugfs support in the ST STM32 firewall driver

   - Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI

   - Cleanups for memory controller support on Nvidia and Renesas"

* tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (114 commits)
  memory: tegra186-emc: Fix missing put_bpmp
  Documentation: reset: Remove reset_controller_add_lookup()
  reset: fix BIT macro reference
  reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe
  reset: th1520: Support reset controllers in more subsystems
  reset: th1520: Prepare for supporting multiple controllers
  dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
  dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
  reset: remove legacy reset lookup code
  clk: davinci: psc: drop unused reset lookup
  reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
  reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
  reset: eswin: Add eic7700 reset driver
  dt-bindings: reset: eswin: Documentation for eic7700 SoC
  reset: sparx5: add LAN969x support
  dt-bindings: reset: microchip: Add LAN969x support
  soc: rockchip: grf: Add select correct PWM implementation on RK3368
  soc/tegra: pmc: Add USB wake events for Tegra234
  amba: tegra-ahb: Fix device leak on SMMU enable
  ...
2025-12-05 17:29:04 -08:00
Linus Torvalds
0cac5ce06e Merge tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
 "Three new SoCs got added in existing arm64 chip families:

   - Renesas R-Car X5H (R8A78000) is a new generation of automotive
     SoCs, based on 16 Cortex-A720 (Armv9.2) cores, which makes the the
     currently highest-perforance embedded SoC.

   - TI AM62L is a new variant of the AM62 family of industrial SoCs,
     this one comes without a GPU.

   - Qualcomm MSM8937 (Snapdragon 430) is an older mobile phone chip
     based on Cortex-A53, and closely related to MSM8917 (Snapdragn
     425), which we already support.

  In addition, there are a good number of newly supported machines
  across SoC families:

   - Two Aspeed AST2600 (Cortex-A7) based BMC setups for large servers

   - Mobile Phones and tables based on Mediatek MT6582, Nvidia Tegra124,
     Qualcomm MSM8937 and Qualcomm MSM8939,

   - Two Laptops based on Qualcomm SoCs: one using the older sdm850, the
     other using x1p42100.

   - One Router based on Rockchips RK3568

   - 24 variants of the Enclustra Mercury system-on-module, all based on
     32-bit Intel/Altera SocFPGA chips, plus two boards using 64-bit
     SocFPGA Agilex chips..

   - 30 industrial/embedded boards and single-board computers, using
     various chips from NXP, Rockchips, Mediatek, TI, Amlogic, Qualcomm,
     Spacemit, and Starfive.

  In total there are 783 commits here, the majority of these improving
  hardware support and cleaning up devicetree files across the tree,
  with the majority of the changes going into the Qualcomm, NXP, Renesas
  and Rockchips platforms"

* tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (782 commits)
  arm64: dts: mediatek: mt8195: Fix address range for JPEG decoder core 1
  ARM: dts: samsung: exynos4412-midas: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: exynos4210-trats: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: exynos4210-i9100: turn off SDIO WLAN chip during system suspend
  ARM: dts: samsung: universal_c210: turn off SDIO WLAN chip during system suspend
  arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs
  arm64: dts: Add gpio_intc node for Amlogic S7D SoCs
  arm64: dts: Add gpio_intc node for Amlogic S7 SoCs
  arm64: dts: Add gpio_intc node for Amlogic S6 SoCs
  arm64: dts: amlogic: s7d: add ao secure node
  arm64: dts: amlogic: s7: add ao secure node
  arm64: dts: amlogic: s6: add ao secure node
  arm64: dts: amlogic: Fix the register name of the 'DBI' region
  dts: arm64: amlogic: add a5 pinctrl node
  arm64: dts: amlogic: s7d: add power domain controller node
  arm64: dts: amlogic: s7: add power domain controller node
  arm64: dts: amlogic: s6: add power domain controller node
  dts: arm64: amlogic: Add ISP related nodes for C3
  arm64: dts: meson: add initial device-tree for Tanix TX9 Pro
  dt-bindings: arm: amlogic: add support for Tanix TX9 Pro
  ...
2025-12-05 17:24:29 -08:00
Stephen Boyd
6f172175b6 Merge branches 'clk-visconti', 'clk-imx', 'clk-microchip', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-visconti:
  clk: visconti: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Remove definition of number of clocks
  clk: visconti: Do not define number of clocks in bindings

* clk-imx:
  clk: imx: add driver for imx8ulp's sim lpav
  dt-bindings: clock: document 8ULP's SIM LPAV
  clk: imx: imx8mp-audiomix: use devm_auxiliary_device_create() to simple code
  clk: imx: Add some delay before deassert the reset

* clk-microchip:
  reset: mpfs: add non-auxiliary bus probing
  clk: lan966x: remove unused dt-bindings include
  clk: microchip: mpfs: use regmap for clocks
  dt-bindings: clk: microchip: mpfs: remove first reg region

* clk-rockchip:
  clk: rockchip: Add clock and reset driver for RK3506
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  dt-bindings: clock: rk3568: Drop CLK_NR_CLKS define
  clk: rockchip: rk3568: Drop CLK_NR_CLKS usage
  dt-bindings: clock: rk3568: Add SCMI clock ids

* clk-qcom: (48 commits)
  clk: qcom: Mark camcc_sm7150_hws static
  clk: qcom: x1e80100-dispcc: Add USB4 router link resets
  dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
  clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
  dt-bindings: clock: qcom: Add SM8750 video clock controller
  clk: qcom: branch: Extend invert logic for branch2 mem clocks
  clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch
  clk: qcom: clk_mem_branch: add enable mask and invert flags
  clk: qcom: mmcc-sdm660: Add missing MDSS reset
  dt-bindings: clock: mmcc-sdm660: Add missing MDSS reset
  clk: qcom: use different Kconfig prompts for APSS IPQ5424/6018 drivers
  clk: qcom: apss-ipq5424: remove unused 'apss_clk' structure
  dt-bindings: clock: qcom: Add Kaanapali Global clock controller
  dt-bindings: clock: qcom: Document the Kaanapali TCSR Clock Controller
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for Kaanapali
  clk: qcom: tcsrcc-glymur: Update register offsets for clock refs
  clk: qcom: gcc-qcs615: Update the SDCC clock to use shared_floor_ops
  clk: qcom: camcc-sm7150: Fix PLL config of PLL2
  clk: qcom: camcc-sm6350: Fix PLL config of PLL2
  clk: qcom: Add NSS clock controller driver for IPQ5424
  ...
2025-12-03 10:22:37 -08:00
Stephen Boyd
0999df6032 Merge branches 'clk-socfpga', 'clk-renesas', 'clk-cleanup', 'clk-samsung' and 'clk-mediatek' into clk-next
* clk-socfpga:
  clk: socfpga: agilex5: add clock driver for Agilex5

* clk-renesas: (35 commits)
  clk: renesas: r9a09g077: Add SPI module clocks
  clk: renesas: r9a09g056: Add USB3.0 clocks/resets
  clk: renesas: r9a09g057: Add USB3.0 clocks/resets
  clk: renesas: r9a09g047: Add RSCI clocks/resets
  dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
  dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
  clk: renesas: r9a06g032: Fix memory leak in error path
  clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration
  clk: renesas: r9a09g077: Remove stray blank line
  clk: renesas: r9a09g077: Propagate rate changes to parent clocks
  clk: renesas: r8a779a0: Add 3DGE module clock
  clk: renesas: r8a779a0: Add ZG Core clock
  clk: renesas: rcar-gen4: Add support for clock dividers in FRQCRB
  dt-bindings: clock: r8a779a0: Add ZG core clock
  clk: renesas: r9a09g056: Add clock and reset entries for ISP
  clk: renesas: r9a09g056: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modules
  clk: renesas: r9a09g077: Add TSU module clock
  clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
  clk: renesas: rzv2h: Add support for DSI clocks
  ...

* clk-cleanup:
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: spacemit: fix comment typo
  clk: keystone: Fix discarded const qualifiers
  clk: sprd: sc9860: Simplify with of_device_get_match_data()

* clk-samsung:
  firmware: exynos-acpm: add empty method to allow compile test
  MAINTAINERS: add ACPM clock bindings and driver
  clk: samsung: add Exynos ACPM clock driver
  firmware: exynos-acpm: register ACPM clocks pdev
  firmware: exynos-acpm: add DVFS protocol
  dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
  clk: samsung: clk-pll: simplify samsung_pll_lock_wait()
  clk: samsung: exynosautov920: add block mfc clock support
  clk: samsung: exynosautov920: add clock support
  dt-bindings: clock: exynosautov920: add mfc clock definitions
  dt-bindings: clock: exynosautov920: add m2m clock definitions
  dt-bindings: clock: google,gs101-clock: add power-domains

* clk-mediatek:
  clk: en7523: Add reset-controller support for EN7523 SoC
  dt-bindings: clock: airoha: Add reset support to EN7523 clock binding
2025-12-03 10:22:24 -08:00
Johan Hovold
b276445e98 clk: keystone: fix compile testing
Some keystone clock drivers can be selected when COMPILE_TEST is
enabled but since commit b745c0794e ("clk: keystone: Add sci-clk
driver support") they are never actually built.

Enable compile testing by allowing the build system to process the
keystone drivers.

Fixes: b745c0794e ("clk: keystone: Add sci-clk driver support")
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-30 12:06:21 -08:00
Johan Hovold
9c75986a29 clk: keystone: syscon-clk: fix regmap leak on probe failure
The mmio regmap allocated during probe is never freed.

Switch to using the device managed allocator so that the regmap is
released on probe failures (e.g. probe deferral) and on driver unbind.

Fixes: a250cd4c19 ("clk: keystone: syscon-clk: Do not use syscon helper to build regmap")
Cc: stable@vger.kernel.org	# 6.15
Cc: Andrew Davis <afd@ti.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-30 12:05:45 -08:00
Stephen Boyd
1413717ad0 clk: qcom: Mark camcc_sm7150_hws static
This isn't used outside this file. Mark it static.

Fixes: 9f0532da42 ("clk: qcom: Add Camera Clock Controller driver for SM7150")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-30 12:04:10 -08:00
Nathan Chancellor
cf33f0b7df clk: samsung: exynos-clkout: Assign .num before accessing .hws
Commit f316cdff8d ("clk: Annotate struct clk_hw_onecell_data with
__counted_by") annotated the hws member of 'struct clk_hw_onecell_data'
with __counted_by, which informs the bounds sanitizer (UBSAN_BOUNDS)
about the number of elements in .hws[], so that it can warn when .hws[]
is accessed out of bounds. As noted in that change, the __counted_by
member must be initialized with the number of elements before the first
array access happens, otherwise there will be a warning from each access
prior to the initialization because the number of elements is zero. This
occurs in exynos_clkout_probe() due to .num being assigned after .hws[]
has been accessed:

  UBSAN: array-index-out-of-bounds in drivers/clk/samsung/clk-exynos-clkout.c:178:18
  index 0 is out of range for type 'clk_hw *[*]'

Move the .num initialization to before the first access of .hws[],
clearing up the warning.

Cc: stable@vger.kernel.org
Fixes: f316cdff8d ("clk: Annotate struct clk_hw_onecell_data with __counted_by")
Reported-by: Jochen Sprickerhof <jochen@sprickerhof.de>
Closes: https://lore.kernel.org/aSIYDN5eyKFKoXKL@eldamar.lan/
Tested-by: Jochen Sprickerhof <jochen@sprickerhof.de>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Kees Cook <kees@kernel.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-30 11:34:00 -08:00
Arnd Bergmann
af058d5f32 Merge tag 'reset-for-v6.19' of https://git.pengutronix.de/git/pza/linux into soc/drivers
Reset controller updates for v6.19

* Add support for LAN969x, eic770 and RZ/G3S reset controllers,
  for the RZ/G3S USB-PHY reset controller, and for the remaining
  TH1520 reset controllers.
* Drop legacy reset control lookup code.
* Include linux/bits.h from linux/reset.h to make it self-contained.

* tag 'reset-for-v6.19' of https://git.pengutronix.de/git/pza/linux:
  Documentation: reset: Remove reset_controller_add_lookup()
  reset: fix BIT macro reference
  reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe
  reset: th1520: Support reset controllers in more subsystems
  reset: th1520: Prepare for supporting multiple controllers
  dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
  dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
  reset: remove legacy reset lookup code
  clk: davinci: psc: drop unused reset lookup
  reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
  reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
  reset: eswin: Add eic7700 reset driver
  dt-bindings: reset: eswin: Documentation for eic7700 SoC
  reset: sparx5: add LAN969x support
  dt-bindings: reset: microchip: Add LAN969x support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-11-25 14:11:21 +01:00
Geert Uytterhoeven
3937b05bb7 clk: renesas: Use bitfield helpers
Use the FIELD_{GET,PREP}() and field_{get,prep}() helpers for const
respective non-const bitfields, instead of open-coding the same
operations.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-11-24 14:15:47 -05:00
Geert Uytterhoeven
0f8407a1f1 clk: at91: Convert to common field_{get,prep}() helpers
Drop the driver-specific field_get() and field_prep() macros, in favor
of the globally available variants from <linux/bitfield.h>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-11-24 14:15:47 -05:00
Geert Uytterhoeven
dbfe51513a clk: at91: pmc: #undef field_{get,prep}() before definition
Prepare for the advent of globally available common field_get() and
field_prep() macros by undefining the symbols before defining local
variants.  This prevents redefinition warnings from the C preprocessor
when introducing the common macros later.

Suggested-by: Yury Norov <yury.norov@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-11-24 14:15:46 -05:00
Elaine Zhang
18191dd750 clk: rockchip: Add clock and reset driver for RK3506
Add the clock and reset tree definitions for the new
RK3506 SoC.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Link: https://patch.msgid.link/20251121075350.2564860-3-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-23 22:56:49 +01:00
Adrian Barnaś
1749001151 clk: actions: Fix discarding const qualifier by 'container_of' macro
Remove const qualifier from functions parameter because it was discarded
when container_of was called. Received pointer had mutable access to
it through received container.

Signed-off-by: Adrian Barnaś <abarnas@google.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-20 19:23:43 -08:00
Charles Mirabile
23b2d2fb13 clk: spacemit: Set clk_hw_onecell_data::num before using flex array
When booting with KASAN enabled the following splat is
encountered during probe of the k1 clock driver:

UBSAN: array-index-out-of-bounds in drivers/clk/spacemit/ccu-k1.c:1044:16
index 0 is out of range for type 'clk_hw *[*]'
CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.18.0-rc5+ #1 PREEMPT(lazy)
Hardware name: Unknown Unknown Product/Unknown Product, BIOS 2022.10spacemit 10/01/2022
Call Trace:
[<ffffffff8002b628>] dump_backtrace+0x28/0x38
[<ffffffff800027d2>] show_stack+0x3a/0x50
[<ffffffff800220c2>] dump_stack_lvl+0x5a/0x80
[<ffffffff80022100>] dump_stack+0x18/0x20
[<ffffffff800164b8>] ubsan_epilogue+0x10/0x48
[<ffffffff8099034e>] __ubsan_handle_out_of_bounds+0xa6/0xa8
[<ffffffff80acbfa6>] k1_ccu_probe+0x37e/0x420
[<ffffffff80b79e6e>] platform_probe+0x56/0x98
[<ffffffff80b76a7e>] really_probe+0x9e/0x350
[<ffffffff80b76db0>] __driver_probe_device+0x80/0x138
[<ffffffff80b76f52>] driver_probe_device+0x3a/0xd0
[<ffffffff80b771c4>] __driver_attach+0xac/0x1b8
[<ffffffff80b742fc>] bus_for_each_dev+0x6c/0xc8
[<ffffffff80b76296>] driver_attach+0x26/0x38
[<ffffffff80b759ae>] bus_add_driver+0x13e/0x268
[<ffffffff80b7836a>] driver_register+0x52/0x100
[<ffffffff80b79a78>] __platform_driver_register+0x28/0x38
[<ffffffff814585da>] k1_ccu_driver_init+0x22/0x38
[<ffffffff80023a8a>] do_one_initcall+0x62/0x2a0
[<ffffffff81401c60>] do_initcalls+0x170/0x1a8
[<ffffffff81401e7a>] kernel_init_freeable+0x16a/0x1e0
[<ffffffff811f7534>] kernel_init+0x2c/0x180
[<ffffffff80025f56>] ret_from_fork_kernel+0x16/0x1d8
[<ffffffff81205336>] ret_from_fork_kernel_asm+0x16/0x18
---[ end trace ]---

This is bogus and is simply a result of KASAN consulting the
`.num` member of the struct for bounds information (as it should
due to `__counted_by`) and finding 0 set by kzalloc() because it
has not been initialized before the loop that fills in the array.
The easy fix is to just move the line that sets `num` to before
the loop that fills the array so that KASAN has the information
it needs to accurately conclude that the access is valid.

Fixes: 1b72c59db0 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Tested-by: Yanko Kaneti <yaneti@declera.com>
Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-20 19:02:16 -08:00
Yuji Ishikawa
b65e179b98 clk: visconti: Add VIIF clocks
Add the control sequence of register bits to handle the clocks and the
resets of Video Input Interface.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-20 18:53:32 -08:00
Yuji Ishikawa
67e41dbc26 clk: visconti: Do not define number of clocks in bindings
Remove use of TMPV770X_NR_CLK.
Instead, define number of clocks inside the driver directory.

The same for TMPV770X_NR_RESET and TMPV770X_NR_PLL.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-20 18:53:03 -08:00
Elaine Zhang
652c108cc4 clk: rockchip: Add clock controller for the RV1126B
Add the clock and reset tree definitions for the new
rv1126b SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Link: https://patch.msgid.link/20251111025738.869847-4-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-20 20:57:42 +01:00
Elaine Zhang
826eaa8f5b clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
The current path will have an independent PLL(LPLL\BPLL)
exclusively for the CPU to use.
As follows:

            |-\
    --lpll--|  \
            |mux|--[gate]--[div]--clk_core--
    --gpll--|  /
            |-/

The new chip does not have a dedicated PLL for the cpu;
it is distributed nearby from the common PLL.
If there are special frequency requirements that require the
use of pvtpll, explanations will be submitted later.

The clock path of new soc CPU simplified as follows:

    --gpll--|--\
            |   \
            |    \
            |     \
   --v0pll--| mux |--[gate]--[div]--clk_core--
            |     /
            |    /
   --v1pll--|   /
            |--/

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Link: https://patch.msgid.link/20251111025738.869847-2-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-20 20:50:23 +01:00
Konrad Dybcio
3664282f33 clk: qcom: x1e80100-dispcc: Add USB4 router link resets
The router link clock branches also feature some reset logic, which is
required to properly power sequence the hardware for DP tunneling over
USB4.

Describe these missing resets.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-topic-usb4_x1e_dispcc-v1-2-14c68d842c71@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 16:11:37 -06:00
Taniya Das
a160860529 clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
Add support for the video clock controller for video clients to be able
to request for videocc clocks on SM8750 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-5-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 16:11:36 -06:00
Taniya Das
aa788d3b47 clk: qcom: branch: Extend invert logic for branch2 mem clocks
Some clock branches require inverted logic for memory gating, where
disabling the memory involves setting a bit and enabling it involves
clearing the same bit. This behavior differs from the standard approach
memory branch clocks ops where enabling typically sets the bit.

The mem_enable_invert to allow conditional handling of these sequences
of the inverted control logic for memory operations required on those
memory clock branches.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-3-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 16:11:29 -06:00
Bartosz Golaszewski
a86aaf2b62 clk: davinci: psc: drop unused reset lookup
We no longer support any non-DT DaVinci boards so there are no more
users of legacy reset lookup.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: David Lechner <david@lechnology.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-11-18 17:52:54 +01:00
Taniya Das
53a1895834 clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch
The ECPRI clock controller’s mem_ops clocks used the mem_enable_ack_mask
directly for both setting and polling.
Add the newly introduced 'mem_enable_mask' to the memory control branch
clocks of ECPRI clock controller to align to the new mem_ops handling.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-2-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 10:30:43 -06:00
Taniya Das
165d0b6dd2 clk: qcom: clk_mem_branch: add enable mask and invert flags
Introduce mem_enable_mask and mem_enable_invert in clk_mem_branch to
describe memory gating implementations that use a separate mask and/or
inverted enable logic. This documents hardware behavior in data instead
of code and will be used by upcoming platform descriptions.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251118-sm8750-videocc-v2-v4-1-049882a70c9f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 10:30:43 -06:00
Alexey Minnekhanov
0a0ea5541d clk: qcom: mmcc-sdm660: Add missing MDSS reset
Add offset for display subsystem reset in multimedia clock controller
block, which is necessary to reset display when there is some
configuration in display controller left by previous stock (Android)
bootloader to provide continuous splash functionaluty.

Before 6.17 power domains were turned off for long enough to clear
registers, now this is not the case and a proper reset is needed to
have functioning display.

Fixes: 0e789b491b ("pmdomain: core: Leave powered-on genpds on until sync_state")
Cc: stable@vger.kernel.org # 6.17
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251116-sdm660-mdss-reset-v2-2-6219bec0a97f@postmarketos.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-18 10:29:03 -06:00
Thierry Reding
a97fbc3ee3 syscore: Pass context data to callbacks
Several drivers can benefit from registering per-instance data along
with the syscore operations. To achieve this, move the modifiable fields
out of the syscore_ops structure and into a separate struct syscore that
can be registered with the framework. Add a void * driver data field for
drivers to store contextual data that will be passed to the syscore ops.

Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 10:01:52 +01:00
Mikhail Kshevetskiy
1c0608d860 clk: en7523: Add reset-controller support for EN7523 SoC
Introduce reset API support to EN7523 clock driver. EN7523 uses the
same reset logic as EN7581, so just reuse existing code.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 20:05:13 -08:00
Stephen Boyd
7ee9719771 Merge tag 'samsung-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung
Pull more Samsung clk driver updates from Krzysztof Kozlowski:

 - ExynosAutov920: add support for additional clock controllers (M2M and
   MFC)

* tag 'samsung-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: clk-pll: simplify samsung_pll_lock_wait()
  clk: samsung: exynosautov920: add block mfc clock support
  clk: samsung: exynosautov920: add clock support
  dt-bindings: clock: exynosautov920: add mfc clock definitions
  dt-bindings: clock: exynosautov920: add m2m clock definitions
  dt-bindings: clock: google,gs101-clock: add power-domains
2025-11-13 19:49:32 -08:00
Encrow Thorne
2e12d91cbf clk: spacemit: fix comment typo
Fix incorrect comment to match the filename.

Reviewd-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Encrow Thorne <jyc0019@gmail.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 18:19:51 -08:00
Adrian Barnaś
fa3542e822 clk: keystone: Fix discarded const qualifiers
Add const qualifiers to the pointers returned from 'container_of' macro
to prevent breaking the const promise on const struct pointers from
parameters.

Once you have a mutable container structure pointer, you can change
structure fields through it, which violates the const guarantee.

Signed-off-by: Adrian Barnaś <abarnas@google.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 18:16:09 -08:00
Cosmin Tanislav
5fb2f67341 clk: renesas: r9a09g077: Add SPI module clocks
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI
peripherals, each with their own clock divider, which divides PLL4 by
either 24, 25, 30 or 32, similar to the SCI peripheral.

The dividers feed into the usual module clocks.

Add them all.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251105104151.1489281-2-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-13 21:18:25 +01:00
Lad Prabhakar
7efa3a6d96 clk: renesas: r9a09g056: Add USB3.0 clocks/resets
Add USB3.0 clock and reset entries.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251101050034.738807-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-13 21:17:59 +01:00
Lad Prabhakar
4ecc8ccde5 clk: renesas: r9a09g057: Add USB3.0 clocks/resets
Add USB3.0 clock and reset entries.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251101050034.738807-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-13 21:17:59 +01:00
Biju Das
c6b63d54c6 clk: renesas: r9a09g047: Add RSCI clocks/resets
Add RSCI clock and reset entries.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251027154615.115759-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-13 21:16:35 +01:00
Gabor Juhos
4145fc363e clk: qcom: use different Kconfig prompts for APSS IPQ5424/6018 drivers
Both the IPQ_APSS_5424 and IPQ_APSS_6018 symbols are using the same
prompt which complicates to see that which option corresponds to which
driver.

Add a prefix to both prompts to make it easier to differentiate the
two options.

While at it, also fix a typo in the help text of the IPQ_APSS_5424
symbol.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Link: https://lore.kernel.org/r/20251113-clk-qcom-apss-ipq-prompt-v1-1-b62cf2142609@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-13 11:42:48 -06:00
Gabor Juhos
dc937f12e6 clk: qcom: apss-ipq5424: remove unused 'apss_clk' structure
The locally defined 'apss_clk' structure is not used in the code, so
remove that.

Compile tested only.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Link: https://lore.kernel.org/r/20251113-ipq5424-remove-apss_clk-v1-1-e942e720cf99@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-13 11:42:07 -06:00
Haotian Zhang
f8def051bb clk: renesas: r9a06g032: Fix memory leak in error path
The current code uses of_iomap() to map registers but never calls
iounmap() on any error path after the mapping. This causes a memory
leak when probe fails after successful ioremap, for example when
of_clk_add_provider() or r9a06g032_add_clk_domain() fails.

Replace of_iomap() with devm_of_iomap() to automatically unmap the
region on probe failure. Update the error check accordingly to use
IS_ERR() and PTR_ERR() since devm_of_iomap() returns ERR_PTR on error.

Fixes: 4c3d88526e ("clk: renesas: Renesas R9A06G032 clock driver")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251030061603.1954-1-vulab@iscas.ac.cn
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-12 11:09:23 +01:00
Lad Prabhakar
7a9d0318da clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration
Convert the divider clock registration in the R9A09G077 CPG driver to use
device-managed (devm_) helper functions.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-12 11:09:21 +01:00
Lad Prabhakar
3b32a07584 clk: renesas: r9a09g077: Remove stray blank line
Remove an unnecessary blank line at the end of
r9a09g077_cpg_div_clk_register() to tidy up the code.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-12 11:09:19 +01:00