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96821 Commits

Author SHA1 Message Date
Jani Nikula
906cdb2b5f drm/i915/gvt: move structs intel_gvt_irq_info and intel_gvt_irq_map to interrupt.c 
Structs intel_gvt_irq_info and intel_gvt_irq_map are not used outside of
interrupt.c. Hide them, and reduce includes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926121904.499888-4-jani.nikula@intel.com
 2023-10-11 14:19:12 +03:00
Jani Nikula
21c828a0c7 drm/i915/gvt: move struct engine_mmio to mmio_context.c 
struct engine_mmio is not used outside of mmio_context.c. Hide it, and
reduce includes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926121904.499888-3-jani.nikula@intel.com
 2023-10-11 14:19:08 +03:00
Jani Nikula
80cf8f18c6 drm/i915/gvt: don't include gvt.h from intel_gvt_mmio_table.h 
intel_gvt_mmio_table.c has no need to include the massive
gvt.h. Simplify.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926121904.499888-2-jani.nikula@intel.com
 2023-10-11 14:19:04 +03:00
Jani Nikula
9e92a6d1ba drm/i915/gvt: remove unused to_gvt() and reduce includes 
gvt.h has no need to include i915_drv.h once the unused to_gvt() has
been removed.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230926121904.499888-1-jani.nikula@intel.com
 2023-10-11 14:18:43 +03:00
Vinod Govindapillai
2b8b2948c6 drm/i915/xe2lpd: update the scaler feature capability 
Update the number of scalers per pipe based on the display
capabilities reported.

v1: define the field values instead of the magic number (JaniN)

Bspec: 71161
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001113155.80659-4-vinod.govindapillai@intel.com
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
 2023-10-11 13:55:07 +03:00
Vinod Govindapillai
6d181a288e drm/i915/xe2lpd: update the dsc feature capability 
Update the global dsc flag based on the display capabilities
reported.

v1: define the field values instead of the magic number (JaniN)

Bspec: 71161
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001113155.80659-3-vinod.govindapillai@intel.com
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
 2023-10-11 13:54:58 +03:00
Vinod Govindapillai
9a3acd8c77 drm/i915/xe2lpd: display capability register definitions 
Register definitions to track the reported scalable display
feature configurations

Bspec: 71161
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001113155.80659-2-vinod.govindapillai@intel.com
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
 2023-10-11 13:54:34 +03:00
Chaitanya Kumar Borah
55ce2c37cf drm/i915: Add wrapper for getting display step 
Add a wrapper around intel_step_name that takes in driver data as an
argument. This wrapper will help maintain compatibility with the
proposed xe driver.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003065211.1052385-1-chaitanya.kumar.borah@intel.com
 2023-10-11 15:19:48 +05:30
Suraj Kandpal
85c477011d drm/i915/display: Free crtc_state in verify_crtc_state 
Free hw_crtc_state in verify_crtc_state after we are done using
this or else it's just a resource leak.

Fixes: 2745bdda20 ("drm/i915: Stop clobbering old crtc state during state check")
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231010053208.691260-1-suraj.kandpal@intel.com
 2023-10-10 21:43:57 +03:00
Ville Syrjälä
2bc823c920 drm/i915: Fix VLV color state readout 
VLV was missed when the color.get_config() hook was added.
Remedy that.

Not really sure what the final plan here was since a bunch of
color related readout was left in intel_display.c anyway,
but that's for anothr day to figure out...

Cc: Jani Nikula <jani.nikula@intel.com>
Fixes: 9af09dfcdf ("drm/i915/color: move pre-SKL gamma and CSC enable read to intel_color")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231009145828.12960-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-10 10:41:41 +03:00
Suraj Kandpal
3385375be6 drm/i915/ddi: Remove redundant intel_connector NULL check 
Remove redundant intel_connector NULL check. Having it here just
creates further confusion and also the variable already gets
dereferenced before the aforementioned NULL check

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231006072830.581487-1-suraj.kandpal@intel.com
 2023-10-07 08:08:49 +02:00
Ville Syrjälä
ae2b1c380e drm/i915: s/dev_priv/i915/ in the state checker 
Switch the state checker over to using the new 'i915' variable
name insteda of the old 'dev_priv'.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-13-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
3ce6ac8c5e drm/i915: s/pipe_config/crtc_state/ in the state checker 
Switch over to the modern variable naming in the state checker.
Ie. rename the pipe_config stuff to crtc_state.

Also make it clear which is the "software state" (ie. what the
current state should be) vs. "hardware state" (ie. what the
currnet state really is).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-12-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
4627bef626 drm/i915: Simplify the state checker calling convetions 
We're passing in a totally random mismash of things into the state
checker. Clean it up to pass in the minimum needed.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
a4e71126ac drm/i915: Constify remainder of the state checker 
Mark the remaining crtc states used by the state checker as const.
There is no reason to ever mutate them here.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
335aa752cf drm/i915: Simplify snps/c10x DPLL state checker calling convetion 
Passing in the atomic state + crtc state is a bit weird. The latter
can be just the crtc (which is the normal calling convention used
in a lot of other places).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
c788479a7c drm/i915: Constify the snps/c10x PLL state checkers 
State checkers should never modify the crtc states, so make
them const.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
8f0994d47e drm/i915: Simplify watermark state checker calling convention 
There is never any reason to pass in both the crtc and its state
as one can always dig out the crtc from its state. But for more
consistency across the whole state checker let's just pass the
overall atomic state+crtc here as well.

v2: Also pass state+crtc here (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231005122713.3531-1-ville.syrjala@linux.intel.com
 2023-10-07 00:12:46 +03:00
Ville Syrjälä
487a2db8bc drm/i915: Constify watermark state checker 
The skl+ wm state checker has no reason to modify the crtc state,
so make it const.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-07 00:12:42 +03:00
Ville Syrjälä
4d6e198a3a drm/i915: Simplify DPLL state checker calling convention 
Make life simpler by just passing in the atomic state + crtc
instead of plumbing in all kinds of crtc states.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-06 23:59:20 +03:00
Ville Syrjälä
cfc7109bf6 drm/i915: Constify the crtc states in the DPLL checker 
The DPLL state checker should not be modifying the crtc states,
so make the const.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-06 23:59:00 +03:00
Ville Syrjälä
2745bdda20 drm/i915: Stop clobbering old crtc state during state check 
The state checker overwrites the old crtc state with the
current hardware state. While that does save a kmalloc() it seems
rather dubious as there might still be something that we need
in the old crtc state.

Stop doing that and just allocate a temporary state for the state
checker. Should the extra malloc during the commit phase turn out
too annoying we could of course preallocate one for each crtc, but
let's proceed with the straightforward approch for now.

And while at it let's mark the new crtc state as const to make
sure the state checker doesn't mess it up.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-06 23:58:33 +03:00
Ville Syrjälä
12e03c8058 drm/i915/psr: Unify PSR pre/post plane update hooks 
intel_psr_pre_plane_update() operates on a per-crtc level, whereas
intel_psr_post_plane_update() operates on the whole atomic commit,
for no real reason that I can see. Adjust intel_psr_post_plane_update()
to match the intel_psr_pre_plane_update() approach.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-06 23:58:16 +03:00
Ville Syrjälä
64909aa6dd drm/i915/fbc: Remove pointless "stride is multiple of 64 bytes" check 
Plane stride is always a multiple of 64 bytes. Remove the
pointless check that really doesn't have anything to do
with FBC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-6-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
1fe5c43e44 drm/i915/fbc: Split plane pixel format checks per-platform 
Carve up pixel_format_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

Note that the XRGB1555 can be dropped from the g4x+ variant
since the plane no longer supports that format anyway.

TODO: maybe go for vfuncs later

v2: Update for lnl changes

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> #v1
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-5-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
5737f7dc16 drm/i915/fbc: Split plane rotation checks per-platform 
Carve up rotation_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

TODO: maybe go for vfuncs later

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-4-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
9fbe915b88 drm/i915/fbc: Split plane tiling checks per-platform 
Carve up tiling_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

TODO: maybe go for vfuncs later

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-3-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
a8a3b4cd74 drm/i915/fbc: Split plane stride checks per-platform 
Carve up stride_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

TODO: maybe go for vfuncs later

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-2-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
da7b3b03f4 drm/i915/fbc: Remove ancient 16k plane stride limit 
The 16k max plane stride limit seems to be originally from
i965gm, and no explicit limit has been specified since (g4x+).
So let's assume the max plane stride itself is a suitable limit
also for the more recent FBC hardware.

In fact even for i965gm the max X-tiled stride is also 16k so
technically we don't need the check there either, but let's
keep it there anyway since it's explicitly mentioned in the
spec. Gen2/3 have more strict limits checked separately.

Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-1-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00
Uros Bizjak
6097cdac5a drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read 
Use local64_try_cmpxchg instead of local64_cmpxchg (*ptr, old, new) == old
in i915_pmu_event_read. x86 CMPXCHG instruction returns success in ZF flag,
so this change saves a compare after cmpxchg (and related move instruction
in front of cmpxchg).

Also, try_cmpxchg implicitly assigns old *ptr value to "old" when cmpxchg
fails. There is no need to re-read the value in the loop.

No functional change intended.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230703150859.6176-1-ubizjak@gmail.com
 2023-10-05 13:20:40 +03:00
Uma Shankar
5846cdfd3d drm/i915/display: Created exclusive version of vga decode setup 
Current vga arbiter implementation in i915 needs a re-design.
The current approach would cause real problems if anyone actually
needs to talk another GPU using legacy VGA resources.

The main issue is that X becomes a slideshow if it thinks there
are multiple GPUs that have VGA decoding enabled as it insists
on adjusting the VGA routing pretty much for every little operation
involving any of the GPUs.

The cleanup will be planned for i915. Meanwhile to focus on Xe
upstreaming and have a cleaner separation, the said functionality
is being moved to a different file exclusive for i915. Xe driver
will re-use rest of the display code from i915.

v2: Addressed Jani Nikula's review comments.

v3: Dropped a duplicate function (Jani)

v4: Updated commit message with reasoning as sugested by Ville.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929074306.1533859-1-uma.shankar@intel.com
 2023-10-05 12:37:08 +05:30
Imre Deak
07f9cfe2ef drm/i915/dp_mst: Make sure pbn_div is up-to-date after sink reconnect 
Atm the MST encoder config computation may use an out-of-date pbn_div
value, if the sink is unplugged and a sink is replugged with different
link rate/lane count capabilities. The current way of reinitializing
pbn_div depends on pbn_div getting cleared via intel_atomic_check() ->
drm_dp_mst_atomic_check() ->
drm_dp_mst_atomic_check_payload_alloc_limits(), however the clearing
won't happen if the sink got unplugged (and hence
drm_dp_mst_topology_mgr::mst_state being false).

To fix the above, simply update pbn_div unconditionally during config
computation, making pbn_div always match the link rate and lane count.

Cc: Lyude Paul <lyude@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929154929.343947-1-imre.deak@intel.com
 2023-10-04 18:48:31 +03:00
Niko Tsirakis
cf37c0979e drm/i915/display/lspcon: Increase LSPCON mode settle timeout 
This is to eliminate all cases of "*ERROR* LSPCON mode hasn't settled",
followed by link training errors. Intel engineers recommended increasing
this timeout and that does resolve the issue.

On some CometLake-based device designs the Parade PS175 takes more than
400ms to settle in PCON mode. 100 reboot trials on one device resulted
in a median settle time of 440ms and a maximum of 444ms. Even after
increasing the timeout to 500ms, 2% of devices still had this error. So
this increases the timeout to 800ms.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9443
Signed-off-by: Pablo Ceballos <pceballos@google.com>
Signed-off-by: Niko Tsirakis <ntsirakis@google.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231002204709.761089-1-ntsirakis@google.com
 2023-10-04 18:34:20 +03:00
Jani Nikula
14aebb78b9 drm/i915/gt: remove i915->gt0 in favour of i915->gt[0] 
Since gt0 == i915->gt[0], just drop the former.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5319364f4c9416fed218382d020a57c5b0a17bee.1696236329.git.jani.nikula@intel.com
 2023-10-04 18:27:51 +03:00
Jani Nikula
39fa9a7d5f drm/i915: allocate i915->gt0 dynamically 
Convert i915->gt0 to a pointer, and allocate it dynamically.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/01bf968aa431b77d491790178cbeece18b5fc4c0.1696236329.git.jani.nikula@intel.com
 2023-10-04 18:27:46 +03:00
Jani Nikula
5ed8c7bcf9 drm/i915/mocs: use to_gt() instead of direct &i915->gt 
Have to give up the const on i915 pointer, but it's not big of a deal
considering non-const i915 gets passed all over the place.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/63e644f056c7745eb0e8e165c990c392a38ec85c.1696236329.git.jani.nikula@intel.com
 2023-10-04 18:27:33 +03:00
Jani Nikula
7824a88b42 Merge drm/drm-next into drm-intel-next 
Backmerge to sync up with drm-intel-gt-next and drm-misc-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2023-10-04 18:06:27 +03:00
Ville Syrjälä
25591b66d0 drm/i915: s/dev_priv/i915/ in the shared_dpll code 
Do a s/dev_priv/i915/ pass over the shared_dpll code to
get the variable names into sync with modern standards.

v2: Rebase

Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003200620.11633-5-ville.syrjala@linux.intel.com
 2023-10-04 16:49:50 +03:00
Ville Syrjälä
51d3e62927 drm/i915: Introduce for_each_shared_dpll() 
No one really cares how we store the shared_dplls. Currently
it happens to be an array, but we could change that to a more
flexible scheme at some point. Hide the implementation details
behind an iterator macro.

The slight downside is the pll variable moving out of the
loop scope, but maybe someday soon we'll start to convert
everything over to having declarations within for-statements...

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003200620.11633-4-ville.syrjala@linux.intel.com
 2023-10-04 16:46:45 +03:00
Ville Syrjälä
99e5a010e8 drm/i915: Decouple I915_NUM_PLLS from PLL IDs 
Stop assuming the size of PLL ID based bitmask is restricted
to I915_NUM_PLLS bits. This is the last thing coupling the
two things together and thus artificially limiting PLL IDs.

We could just pass any arbitrary (large enough) size to
for_each_set_bit() and be done with it, but the WARN
requiring the caller to not pass in a bogus bitmask seems
potentially useful to keep around. So let's just calculate
the full bitmask on the spot.

And while at it let's assert that the PLL IDs will fit
into the bitmask we use for them.

TODO: could also get rid of I915_NUM_PLLS entirely and just
dynamically allocate i915->shared_dplls[] and state->shared_dpll[].
But that would involve error handling in the modeset init path. Uff.

v2: Warn about conflicting PLL IDs (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003200620.11633-3-ville.syrjala@linux.intel.com
 2023-10-04 16:46:36 +03:00
Ville Syrjälä
027c570177 drm/i915: Stop requiring PLL index == PLL ID 
There's no good reason to keep around this PLL index == PLL ID
footgun. Get rid of it.

Both i915->shared_dplls[] and state->shared_dpll[] are indexed
by the same thing now, which is just the index we get at
initialization from dpll_mgr->dpll_info[]. The rest is all about
PLL IDs now.

v2: Add pll->index to mimic drm_crtc & co.
    Remove the comment saying ID should match the index
v3: s/i/pll->index/ in debugfs loop (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003200620.11633-2-ville.syrjala@linux.intel.com
 2023-10-04 16:46:25 +03:00
Jani Nikula
079d0b01bc drm/i915: separate subplatform init and runtime feature init 
Adjusting ->port_mask does not belong in
intel_device_info_subplatform_init(), but rather
intel_display_device_info_runtime_init().

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1035800e623e13d5e7baf1215b07e7cdad5eb764.1696336887.git.jani.nikula@intel.com
 2023-10-04 12:41:42 +03:00
Jani Nikula
b8eed6a4ae drm/i915: separate display runtime info init 
Move display related functionality from intel_device_info_runtime_init()
to intel_display_device_info_runtime_init() and call the latter from the
top level.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a2226a47a4450e75d867c2ac48665b387af0e42d.1696336887.git.jani.nikula@intel.com
 2023-10-04 12:41:33 +03:00
Jani Nikula
5e72e75d30 drm/i915: move display info related macros to display 
Anything looking at display (runtime) info should be under display.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/41b53870ffa7bd41ccc337616c756c69326f05cf.1696336887.git.jani.nikula@intel.com
 2023-10-04 12:41:20 +03:00
Jani Nikula
fe63ea7c3d drm/i915: convert INTEL_DISPLAY_ENABLED() into a function 
There's no need for this to be a macro. Add some documentation too.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/480b9b697b2ffa0c8677115bd443ba633801c6c1.1696336887.git.jani.nikula@intel.com
 2023-10-04 12:40:39 +03:00
Vinod Govindapillai
f2a7b9cd5b drm/i915/lnl: update the supported plane formats with FBC 
FBC is supported with RGB32 8:8:8:8 with or without alpha

Bspec: 68904, 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230922133003.150578-3-vinod.govindapillai@intel.com
 2023-10-03 15:53:12 +03:00
Vinod Govindapillai
de1ee4e4cd drm/i915/lnl: possibility to enable FBC on first three planes 
In LNL onwards, FBC can be associated to the first three planes.
FBC will be enabled on planes first come first served basis
until the userspace can select one of these FBC capable planes
explicitly.

v2:
 - avoid fbc->state.plane check in intel_fbc_check_plane (Ville)
 - simplify plane binding register writes (Matt)
 - Update the subject to reflect that fbc can be enabled only in
   the first three planes (Matt)

v3:
 - use icl_is_hdr_plane(), use wrapper macro for plane binding
   register access, comments update and patch split (Ville)

v4:
 - update to the plane binding register access macro

Bspec: 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230922133003.150578-2-vinod.govindapillai@intel.com
 2023-10-03 15:52:59 +03:00
Dave Airlie
caacbdc28f Merge tag 'drm-intel-gt-next-2023-09-28' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 
Driver Changes:

Fixes/improvements/new stuff:

- Fix TLB-Invalidation seqno store [mtl] (Alan Previn)
- Force a reset on internal GuC error [guc] (John Harrison)
- Define GSC fw [gsc] (Daniele Ceraolo Spurio)
- Update workaround 14016712196 [dg2/mtl] (Tejas Upadhyay)
- Mark requests for GuC virtual engines to avoid use-after-free (Andrzej Hajda)
- Add Wa_14015150844 [dg2/mtl] (Shekhar Chauhan)
- Prevent error pointer dereference (Dan Carpenter)
- Add Wa_18022495364 [tgl,adl,rpl] (Dnyaneshwar Bhadane)
- Fix GuC PMU by moving execlist stats initialization to execlist specific setup (Umesh Nerlige Ramappa)
- Fix PXP firmware load [pxp/mtl] (Alan Previn)
- Fix execution/context state of PXP contexts (Alan Previn)
- Limit the length of an sg list to the requested length (Matthew Wilcox)
- Fix reservation address in ggtt_reserve_guc_top [guc] (Javier Pello)
- Add Wa_18028616096 [dg2] (Shekhar Chauhan)
- Get runtime pm in busyness worker only if already active [guc/pmu] (Umesh Nerlige Ramappa)
- Don't set PIPE_CONTROL_FLUSH_L3 for aux inval (Nirmoy Das)

Future platform enablement:

- Fix and consolidate some workaround checks, make others IP version based [mtl] (Matt Roper)
- Replace Meteorlake subplatforms with IP version checks (Matt Roper)
- Adding DeviceID for Arrowlake-S under MTL [mtl] (Nemesa Garg)
- Run relevant bits of debugfs drop_caches per GT (Tvrtko Ursulin)

Miscellaneous:

- Remove Wa_15010599737 [dg2] (Shekhar Chauhan)
- Align igt_spinner_create_request with hangcheck [selftests] (Jonathan Cavitt)
- Remove pre-production workarounds [dg2] (Matt Roper)
- Tidy some workaround definitions (Matt Roper)
- Wait longer for tasks in migrate selftest [gt] (Jonathan Cavitt)
- Skip WA verification for GEN7_MISCCPCTL on DG2 [gt] (Andrzej Hajda)
- Silence injected failure in the load via GSC path [huc] (Daniele Ceraolo Spurio)
- Refactor deprecated strncpy (Justin Stitt)
- Update RC6 mask for mtl_drpc [debugfs/mtl] (Badal Nilawar)
- Remove a static inline that requires including i915_drv.h [gt] (Jani Nikula)
- Remove inlines from i915_gem_execbuffer.c [gem] (Jani Nikula)
- Remove gtt_offset from stream->oa_buffer.head/.tail [perf] (Ashutosh Dixit)
- Do not disable preemption for resets (Tvrtko Ursulin)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZRVzL02VFuwIkcGl@tursulin-desk
 2023-10-03 06:02:30 +10:00
Rodrigo Vivi
4c7690614c drm/i915: Abstract display info away during probe 
The goal is to have this function ready for Xe to use
directly. So, let's use the available macro.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929205023.1202735-1-rodrigo.vivi@intel.com
 2023-10-02 12:01:42 -04:00
Jouni Högander
f52d1493df drm/i915/display: Include i915_active header in frontbuffer tracking code 
Intel frontbuffer tracking code is using i915_active functions -> include
i915_active.h directly instead of relying getting indirectly included.

Cc: Jani Nikula <jani.nikula@intel.com>

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929112047.1151914-1-jouni.hogander@intel.com
 2023-10-02 08:41:52 +03:00