intel-pinctrl for v6.12-1
* Enable High Impedance pin configuration support for Intel pin control
* Miscellaneous small improvements here and there
The following is an automated git shortlog grouped by driver:
baytrail:
- Drop duplicate return statement
intel:
- Constify struct intel_pinctrl parameter
- Inline intel_gpio_community_irq_handler()
- Introduce for_each_intel_gpio_group() helper et al.
- Constify intel_get_community() returned object
- Implement high impedance support
- Add __intel_gpio_get_direction() helper
- Refactor __intel_gpio_set_direction() to be more useful
- Move debounce validation out of the lock
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are a few functions that do not and should not change
the state of the pin control object. Constify the respective
parameter.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Since we have for_each_intel_pad_group() helper, there is
no advantage of having intel_gpio_community_irq_handler().
Inline it into intel_gpio_irq().
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Introduce a helper macro for_each_intel_gpio_group() et al.
With those in place, update the users.
It reduces the C code base as well as shrinks the binary:
add/remove: 0/0 grow/shrink: 4/21 up/down: 39/-621 (-582)
Total: Before=15942, After=15360, chg -3.65%
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add __intel_gpio_get_direction() helper which provides all possible
physical states of the pad.
With that done, update current users and make the respective checks
consistent.
While at it, make the style of anonymous enum kernel documentation
consistent.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Refactor __intel_gpio_set_direction() to be more useful, i.e.
1) use one parameter per each direction to support all combinatios;
2) move IO to the only user that needs it.
With that done, update current users and deduplicate existing code.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
There is no need to validate debounce value under the lock.
Move it outside.
It also results in a smaller binary:
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-11 (-11)
Total: Before=15374, After=15363, chg -0.07%
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Arrow Lake-H/U has the same GPIO hardware than Meteor Lake-P but
the ACPI ID is different. Add this new ACPI ID to the list of supported
devices.
Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
GPIO_S0_SC57 / GPIO_S0_SC61 can be muxed to PCU_UART_TXD / PCU_UART_RXD,
add a pinconf group for this.
On Bay Trail board schematics using these pins as UART these are
called UART3_TXD / UART3_RXD, name the pinconf group "uart3_grp"
to be consistent with the schematics.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
For all the "score" pin-groups all the intel_pingroup-s to select
the non GPIO function are re-used for byt_score_gpio_groups[].
But this is incorrect since a pin-group includes the mode setting,
which for the non GPIO functions generally is 1, where as to select
the GPIO function mode must be set to 0.
So the GPIO function needs separate intel_pingroup-s with their own mode
value of 0.
Add a new PIN_GROUP_GPIO macro which adds a foo_gpio entry to each
pin-group defined this way and update byt_score_gpio_groups[] to point
to the new foo_gpio entries.
The "sus" usb_oc_grp usb_ulpi_grp and pcu_spi_grp pin-groups are special
because these have a non 0 mode value to select the GPIO functions and
these already have matching foo_gpio pin-groups, leave these are unchanged.
The pmu_clk "sus" groups added in commit 2f46d7f7e9 ("pinctrl: baytrail:
Add pinconf group + function for the pmu_clk") do need to use the new
PIN_GROUP_GPIO macro.
Fixes: 2f46d7f7e9 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
intel-pinctrl for v6.8-1
* New agnostic driver to support Lunar Lake and newer platforms
* New driver for Intel Meteor Point-S (PCH for Meteor Lake-S)
* Update drivers to use new PM helpers
* Use RAII for locking in a few drivers (Raag, Andy)
* Reduce locking scope in some functions (Raag)
* Miscellaneous cleanups (Raag)
The following is an automated git shortlog grouped by driver:
alderlake:
- Switch to use Intel pin control PM ops
baytrail:
- Simplify code with cleanup helpers
- Move default strength assignment to a switch-case
- Factor out byt_gpio_force_input_mode()
- Fix types of config value in byt_pin_config_set()
broxton:
- Switch to use Intel pin control PM ops
cannonlake:
- Switch to use Intel pin control PM ops
cedarfork:
- Switch to use Intel pin control PM ops
denverton:
- Switch to use Intel pin control PM ops
elkhartlake:
- Switch to use Intel pin control PM ops
emmitsburg:
- Switch to use Intel pin control PM ops
geminilake:
- Switch to use Intel pin control PM ops
icelake:
- Switch to use Intel pin control PM ops
intel:
- Add Intel Meteor Point pin controller and GPIO support
- use the correct _PM_OPS() export macro
- Add a generic Intel pin control platform driver
- Revert "Unexport intel_pinctrl_probe()"
- allow independent COMPILE_TEST
- Refactor intel_pinctrl_get_soc_data()
- Move default strength assignment to a switch-case
- Make PM ops functions static
- Provide Intel pin control wide PM ops structure
jasperlake:
- Switch to use Intel pin control PM ops
lakefield:
- Switch to use Intel pin control PM ops
lewisburg:
- Switch to use Intel pin control PM ops
lynxpoint:
- Simplify code with cleanup helpers
meteorlake:
- Switch to use Intel pin control PM ops
sunrisepoint:
- Switch to use Intel pin control PM ops
tangier:
- simplify locking using cleanup helpers
- Move default strength assignment to a switch-case
- Enable 910 Ohm bias
tigerlake:
- Switch to use Intel pin control PM ops
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver supports pinctrl/GPIO hardware found on Intel Meteor Point
(a Meteor Lake PCH) providing users a pinctrl and GPIO interfaces
including GPIO interrupts.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
When ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Since we don't have runtime PM handles here, we should be using
EXPORT_NS_GPL_DEV_SLEEP_PM_OPS() macro, so that the compiler can
discard it in case CONFIG_PM_SLEEP=n.
Fixes: b10a74b5c0 ("pinctrl: intel: Provide Intel pin control wide PM ops structure")
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
New generations of Intel platforms will provide better description
of the pin control devices in the ACPI tables. Hence, we may provide
a generic pin control platform driver to cover all of them. Currently
the following Intel SoCs / platforms require this to be functional:
- Lunar Lake
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
In order to prepare for a new coming driver export the original
intel_pinctrl_probe() again.
This reverts commit 0dd519e378.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Refactor intel_pinctrl_get_soc_data() to drop initial assignment
of the data variable. It's only used in ACPI case and instead
we may always assign it there as the ACPI ID table has the terminator
entry that has driver data set to NULL.
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
iWhen ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
iWhen ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Now that pinctrl_gpio_direction_output() is no longer used, let's drop
the '_new' suffix from its improved variant.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Now that pinctrl_gpio_direction_input() is no longer used, let's drop the
'_new' suffix from its improved variant.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
