Commit Graph

129866 Commits

Author SHA1 Message Date
Laura Abbott
869dcfd10d arm64: Add cast for virt_to_pfn
virt_to_pfn lacks a cast at the top level. Don't rely on __virt_to_phys
and explicitly cast to unsigned long.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-12 15:05:39 +00:00
Laura Abbott
9e22eb616f arm64: Move some macros under #ifndef __ASSEMBLY__
Several macros for various x_to_y exist outside the bounds of an
__ASSEMBLY__ guard. Move them in preparation for support for
CONFIG_DEBUG_VIRTUAL.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-12 15:05:39 +00:00
Will Deacon
42d1a731ff Merge branch 'aarch64/for-next/debug-virtual' into aarch64/for-next/core
Merge core DEBUG_VIRTUAL changes from Laura Abbott. Later arm and arm64
support depends on these.

* aarch64/for-next/debug-virtual:
  drivers: firmware: psci: Use __pa_symbol for kernel symbol
  mm/usercopy: Switch to using lm_alias
  mm/kasan: Switch to using __pa_symbol and lm_alias
  kexec: Switch to __pa_symbol
  mm: Introduce lm_alias
  mm/cma: Cleanup highmem check
  lib/Kconfig.debug: Add ARCH_HAS_DEBUG_VIRTUAL
2017-01-12 15:04:29 +00:00
Suzuki K Poulose
4aa8a472c3 arm64: Documentation - Expose CPU feature registers
Documentation for the infrastructure to expose CPU feature
register by emulating MRS.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Dave Martin <dave.martin@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-12 12:31:31 +00:00
Suzuki K Poulose
77c97b4ee2 arm64: cpufeature: Expose CPUID registers by emulation
This patch adds the hook for emulating MRS instruction to
export the 'user visible' value of supported system registers.
We emulate only the following id space for system registers:

 Op0=3, Op1=0, CRn=0, CRm=[0, 4-7]

The rest will fall back to SIGILL. This capability is also
advertised via a new HWCAP_CPUID.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[will: add missing static keyword to enable_mrs_emulation]
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-12 12:31:09 +00:00
Laura Abbott
fa5b6ec9e5 lib/Kconfig.debug: Add ARCH_HAS_DEBUG_VIRTUAL
DEBUG_VIRTUAL currently depends on DEBUG_KERNEL && X86. arm64 is getting
the same support. Rather than add a list of architectures, switch this
to ARCH_HAS_DEBUG_VIRTUAL and let architectures select it as
appropriate.

Acked-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-11 13:56:49 +00:00
Suzuki K Poulose
fe4fbdbcdd arm64: cpufeature: Track user visible fields
Track the user visible fields of a CPU feature register. This will be
used for exposing the value to the userspace. All the user visible
fields of a feature register will be passed on as it is, while the
others would be filled with their respective safe value.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:13:36 +00:00
Suzuki K Poulose
8c2dcbd2c4 arm64: Add helper to decode register from instruction
Add a helper to extract the register field from a given
instruction.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Suzuki K Poulose
c9ee0f9866 arm64: cpufeature: Define helpers for sys_reg id
Define helper macros to extract op0, op1, CRn, CRm & op2
for a given sys_reg id. While at it remove the explicit
masking only used for Op0.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Suzuki K Poulose
156e0d57f8 arm64: cpufeature: Document the rules of safe value for features
Document the rules for choosing the safe value for different types
of features.

Cc: Dave Martin <dave.martin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Suzuki K Poulose
eab43e8873 arm64: cpufeature: Cleanup feature bit tables
This patch does the following clean ups :

1) All undescribed fields of a register are now treated as 'strict'
   with a safe value of 0. Hence we could leave an empty table for
   describing registers which are RAZ.

2) ID_AA64DFR1_EL1 is RAZ and should use the table for RAZ register.

3) ftr_generic32 is used to represent a register with a 32bit feature
   value. Rename this to ftr_singl32 to make it more obvious. Since
   we don't have a 64bit singe feature register, kill ftr_generic.

Based on a patch by Mark Rutland.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Mark Rutland
564279ff6f arm64: cpufeature: remove explicit RAZ fields
We currently have some RAZ fields described explicitly in our
arm64_ftr_bits arrays. These are inconsistently commented, grouped,
and/or applied, and maintaining these is error-prone.

Luckily, we don't need these at all. We'll never need to inspect RAZ
fields to determine feature support, and init_cpu_ftr_reg() will ensure
that any bits without a corresponding arm64_ftr_bits entry are treated
as RES0 with strict matching requirements. In check_update_ftr_reg()
we'll then compare these bits from the relevant cpuinfo_arm64
structures, and need not store them in a arm64_ftr_reg.

This patch removes the unnecessary arm64_ftr_bits entries for RES0 bits.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Mark Rutland
b389d7997a arm64: cpufeature: treat unknown fields as RES0
Any fields not defined in an arm64_ftr_bits entry are propagated to the
system-wide register value in init_cpu_ftr_reg(), and while we require
that these strictly match for the sanity checks, we don't update them in
update_cpu_ftr_reg().

Generally, the lack of an arm64_ftr_bits entry indicates that the bits
are currently RES0 (as is the case for the upper 32 bits of all
supposedly 32-bit registers).

A better default would be to use zero for the system-wide value of
unallocated bits, making all register checking consistent, and allowing
for subsequent simplifications to the arm64_ftr_bits arrays.

This patch updates init_cpu_ftr_reg() to treat unallocated bits as RES0
for the purpose of the system-wide safe value. These bits will still be
sanity checked with strict match requirements, as is currently the case.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 17:11:23 +00:00
Will Deacon
f31deaadff arm64: cpufeature: Don't enforce system-wide SPE capability
The statistical profiling extension (SPE) is an optional feature of
ARMv8.1 and is unlikely to be supported by all of the CPUs in a
heterogeneous system.

This patch updates the cpufeature checks so that such systems are not
tainted as unsupported.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 14:28:01 +00:00
Will Deacon
b20d1ba3cf arm64: cpufeature: allow for version discrepancy in PMU implementations
Perf already supports multiple PMU instances for heterogeneous systems,
so there's no need to be strict in the cpufeature checking, particularly
as the PMU extension is optional in the architecture.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 14:27:56 +00:00
James Morse
c8b06e3fdd arm64: Remove useless UAO IPI and describe how this gets enabled
Since its introduction, the UAO enable call was broken, and useless.
commit 2a6dcb2b5f ("arm64: cpufeature: Schedule enable() calls instead
of calling them via IPI"), fixed the framework so that these calls
are scheduled, so that they can modify PSTATE.

Now it is just useless. Remove it. UAO is enabled by the code patching
which causes get_user() and friends to use the 'ldtr' family of
instructions. This relies on the PSTATE.UAO bit being set to match
addr_limit, which we do in uao_thread_switch() called via __switch_to().

All that is needed to enable UAO is patch the code, and call schedule().
__apply_alternatives_multi_stop() calls stop_machine() when it modifies
the kernel text to enable the alternatives, (including the UAO code in
uao_thread_switch()). Once stop_machine() has finished __switch_to() is
called to reschedule the original task, this causes PSTATE.UAO to be set
appropriately. An explicit enable() call is not needed.

Reported-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
2017-01-10 12:38:06 +00:00
Mark Rutland
510224c2b1 arm64: head.S: fix up stale comments
In commit 23c8a500c2 ("arm64: kernel: use ordinary return/argument
register for el2_setup()"), we stopped using w20 as a global stash of
the boot mode flag, and instead pass this around in w0 as a function
parameter.

Unfortunately, we missed a couple of comments, which still refer to the
old convention of using w20/x20.

This patch fixes up the comments to describe the code as it currently
works.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 12:36:22 +00:00
Mark Rutland
117f5727ae arm64: add missing printk newlines
A few printk calls in arm64 omit a trailing newline, even though there
is no subsequent KERN_CONT printk associated with them, and we actually
want a newline.

This can result in unrelated lines being appended, rather than appearing
on a new line. Additionally, timestamp prefixes may appear in-line. This
makes the logs harder to read than necessary.

Avoid this by adding a trailing newline.

These were found with a shortlist generated by:

$ git grep 'pr\(intk\|_.*\)(.*)' -- arch/arm64 | grep -v pr_fmt | grep -v '\\n"'

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
CC: James Morse <james.morse@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 12:35:27 +00:00
Joel Fernandes
8f4b326d66 arm64: Don't trace __switch_to if function graph tracer is enabled
Function graph tracer shows negative time (wrap around) when tracing
__switch_to if the nosleep-time trace option is enabled.

Time compensation for nosleep-time is done by an ftrace probe on
sched_switch. This doesn't work well for the following events (with
letters representing timestamps):
A - sched switch probe called for task T switch out
B - __switch_to calltime is recorded
C - sched_switch probe called for task T switch in
D - __switch_to rettime is recorded

If C - A > D - B, then we end up over compensating for the time spent in
__switch_to giving rise to negative times in the trace output.

On x86, __switch_to is not traced if function graph tracer is enabled.
Do the same for arm64 as well.

Cc: Todd Kjos <tkjos@google.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Joel Fernandes <joelaf@google.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-01-10 11:05:08 +00:00
Linus Torvalds
08289086b0 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
 "MIPS:
   - fix host kernel crashes when receiving a signal with 64-bit
     userspace

   - flush instruction cache on all vcpus after generating entry code

     (both for stable)

  x86:
   - fix NULL dereference in MMU caused by SMM transitions (for stable)

   - correct guest instruction pointer after emulating some VMX errors

   - minor cleanup"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: VMX: remove duplicated declaration
  KVM: MIPS: Flush KVM entry code from icache globally
  KVM: MIPS: Don't clobber CP0_Status.UX
  KVM: x86: reset MMU on KVM_SET_VCPU_EVENTS
  KVM: nVMX: fix instruction skipping during emulated vm-entry
2017-01-06 15:27:17 -08:00
Linus Torvalds
b1ee51702e Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:

 - re-introduce the arm64 get_current() optimisation

 - KERN_CONT fallout fix in show_pte()

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: restore get_current() optimisation
  arm64: mm: fix show_pte KERN_CONT fallout
2017-01-06 15:18:58 -08:00
Linus Torvalds
2fd8774c79 Merge branch 'stable/for-linus-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb
Pull swiotlb fixes from Konrad Rzeszutek Wilk:
 "This has one fix to make i915 work when using Xen SWIOTLB, and a
  feature from Geert to aid in debugging of devices that can't do DMA
  outside the 32-bit address space.

  The feature from Geert is on top of v4.10 merge window commit
  (specifically you pulling my previous branch), as his changes were
  dependent on the Documentation/ movement patches.

  I figured it would just easier than me trying than to cherry-pick the
  Documentation patches to satisfy git.

  The patches have been soaking since 12/20, albeit I updated the last
  patch due to linux-next catching an compiler error and adding an
  Tested-and-Reported-by tag"

* 'stable/for-linus-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb:
  swiotlb: Export swiotlb_max_segment to users
  swiotlb: Add swiotlb=noforce debug option
  swiotlb: Convert swiotlb_force from int to enum
  x86, swiotlb: Simplify pci_swiotlb_detect_override()
2017-01-06 10:53:21 -08:00
Linus Torvalds
b400792732 Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
 "This is a rather large set of bugfixes, as we just returned from the
  Christmas break. Most of these are relatively unimportant fixes for
  regressions introduced during the merge window, and about half of the
  changes are for mach-omap2.

  A couple of patches are just cleanups and dead code removal that I
  would not normally have considered for merging after -rc2, but I
  decided to take them along with the fixes this time.

  Notable fixes include:

   - removing the skeleton.dtsi include broke a number of machines, and
     we have to put empty /chosen nodes back to be able to pass kernel
     command lines as before

   - enabling Samsung platforms no longer hardwires CONFIG_HZ to 200, as
     it had been for no good reason for a long time"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits)
  MAINTAINERS: extend PSCI entry to cover the newly add PSCI checker code
  drivers: psci: annotate timer on stack to silence odebug messages
  ARM64: defconfig: enable DRM_MESON as module
  ARM64: dts: meson-gx: Add Graphic Controller nodes
  ARM64: dts: meson-gxl: fix GPIO include
  ARM: dts: imx6: Disable "weim" node in the dtsi files
  ARM: dts: qcom: apq8064: Add missing scm clock
  ARM: davinci: da8xx: Fix sleeping function called from invalid context
  ARM: davinci: Make __clk_{enable,disable} functions public
  ARM: davinci: da850: don't add emac clock to lookup table twice
  ARM: davinci: da850: fix infinite loop in clk_set_rate()
  ARM: i.MX: remove map_io callback
  ARM: dts: vf610-zii-dev-rev-b: Add missing newline
  ARM: dts: imx6qdl-nitrogen6x: remove duplicate iomux entry
  ARM: dts: imx31: fix AVIC base address
  ARM: dts: am572x-idk: Add gpios property to control PCIE_RESETn
  arm64: dts: vexpress: Support GICC_DIR operations
  ARM: dts: vexpress: Support GICC_DIR operations
  firmware: arm_scpi: fix reading sensor values on pre-1.0 SCPI firmwares
  arm64: dts: msm8996: Add required memory carveouts
  ...
2017-01-05 10:32:16 -08:00
Linus Torvalds
383378d115 Merge tag 'for-linus-4.10-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull xen fixes and cleanups from Juergen Gross:

 - small fixes for xenbus driver

 - one fix for xen dom0 boot on huge system

 - small cleanups

* tag 'for-linus-4.10-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  Xen: ARM: Zero reserved fields of xatp before making hypervisor call
  xen: events: Replace BUG() with BUG_ON()
  xen: remove stale xs_input_avail() from header
  xen: return xenstore command failures via response instead of rc
  xen: xenbus driver must not accept invalid transaction ids
  xen/evtchn: use rb_entry()
  xen/setup: Don't relocate p2m over existing one
2017-01-05 10:29:40 -08:00
Jan Dakinevich
69130ea1e6 KVM: VMX: remove duplicated declaration
Declaration of VMX_VPID_EXTENT_SUPPORTED_MASK occures twice in the code.
Probably, it was happened after unsuccessful merge.

Signed-off-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-01-05 15:08:48 +01:00
James Hogan
32eb12a6c1 KVM: MIPS: Flush KVM entry code from icache globally
Flush the KVM entry code from the icache on all CPUs, not just the one
that built the entry code.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: <stable@vger.kernel.org> # 3.16.x-
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-01-05 14:56:32 +01:00
James Hogan
4c881451d3 KVM: MIPS: Don't clobber CP0_Status.UX
On 64-bit kernels, MIPS KVM will clear CP0_Status.UX to prevent the
guest (running in user mode) from accessing the 64-bit memory segments.
However the previous value of CP0_Status.UX is never restored when
exiting from the guest.

If the user process uses 64-bit addressing (the n64 ABI) this can result
in address error exceptions from the kernel if it needs to deliver a
signal before returning to user mode, as the kernel will need to write a
sigframe to high user addresses on the user stack which are disallowed
by CP0_Status.UX=0.

This is fixed by explicitly setting SX and UX again when exiting from
the guest, and explicitly clearing those bits when returning to the
guest. Having the SX and UX bits set when handling guest exits (rather
than only when exiting to userland) will be helpful when we support VZ,
since we shouldn't need to directly read or write guest memory, so it
will be valid for cache management IPIs to access host user addresses.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: <stable@vger.kernel.org> # 4.8.x-
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2017-01-05 14:56:32 +01:00
Mark Rutland
9d84fb27fa arm64: restore get_current() optimisation
Commit c02433dd6d ("arm64: split thread_info from task stack")
inverted the relationship between get_current() and
current_thread_info(), with sp_el0 now holding the current task_struct
rather than the current thead_info. The new implementation of
get_current() prevents the compiler from being able to optimize repeated
calls to either, resulting in a noticeable penalty in some
microbenchmarks.

This patch restores the previous optimisation by implementing
get_current() in the same way as our old current_thread_info(), using a
non-volatile asm statement.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Davidlohr Bueso <dbueso@suse.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-01-04 16:26:18 +00:00
Mark Rutland
6ef4fb387d arm64: mm: fix show_pte KERN_CONT fallout
Recent changes made KERN_CONT mandatory for continued lines. In the
absence of KERN_CONT, a newline may be implicit inserted by the core
printk code.

In show_pte, we (erroneously) use printk without KERN_CONT for continued
prints, resulting in output being split across a number of lines, and
not matching the intended output, e.g.

[ff000000000000] *pgd=00000009f511b003
, *pud=00000009f4a80003
, *pmd=0000000000000000

Fix this by using pr_cont() for all the continuations.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-01-04 16:25:50 +00:00
Arnd Bergmann
1b9ec81258 Merge tag 'davinci-fixes-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes
Pull "DaVinci fixes for v4.10" from Sekhar Nori:

This pull request contains fixes for the following issues

1) Fix two instances of infinite loop occurring in
   clock list for DA850. This fixes kernel hangs in some
   instances and so have been marked for stable kernel.

2) Fix for sleeping function called from atomic context
   with USB 2.0 clock management code introduced in v4.10
   merge window.

* tag 'davinci-fixes-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da8xx: Fix sleeping function called from invalid context
  ARM: davinci: Make __clk_{enable,disable} functions public
  ARM: davinci: da850: don't add emac clock to lookup table twice
  ARM: davinci: da850: fix infinite loop in clk_set_rate()
2017-01-04 16:43:00 +01:00
Arnd Bergmann
e9b2aefa88 Merge tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes
Pull "Amlogic fixes for v4.10" from Kevin Hilman:

- DT: GXL: fix GPIO include
- add DT and defconfig for newly merged DRM driver

This pull has one real fix, as a couple non-critical ones.  The DRM
DT/defconfig patches are coming now because I didn't expect the new
driver to make it for the v4.10 merge window, but since it did[1], the
DT and defconfig should go into the same release.

[1] bbbe775ec5 drm: Add support for Amlogic Meson Graphic Controller

* tag 'amlogic-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: defconfig: enable DRM_MESON as module
  ARM64: dts: meson-gx: Add Graphic Controller nodes
  ARM64: dts: meson-gxl: fix GPIO include
2017-01-04 16:42:00 +01:00
Arnd Bergmann
46db9914c3 Merge tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into fixes
Pull "ARMv8 Juno/VExpress fixes for v4.10" from Sudeep Holla:

A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on AEMv8 FVP/RTSM models in order to support split priority drop and
interrupt deactivation.

* tag 'juno-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: vexpress: Support GICC_DIR operations
2017-01-04 16:37:45 +01:00
Arnd Bergmann
f53c1e6464 Merge tag 'vexpress-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into fixes
Pull "ARMv7 VExpress fixes for v4.10" from Sudeep Holla:

A simple fix to extend GICv2 CPU interface registers from 4K to 8K
on VExpress TC1 and TC2 platforms in order to support split priority
drop and interrupt deactivation.

* tag 'vexpress-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress: Support GICC_DIR operations
2017-01-04 16:33:37 +01:00
Arnd Bergmann
ad040d8df6 Merge tag 'imx-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 4.10" from Shawn Guo:

 - A format fix for vf610-zii-dev-rev-b.dts, which has a very odd line
   due to misses a newline.
 - A fix to imx-weim bus error seen on board which doesn't actually use
   the bus.
 - A fix for imx6qdl-nitrogen6x board which has conflicting usage of
   pad NANDF_CS2.
 - A cleanup on i.MX1 machine to remove .map_io callback, which also
   fixes a compiling error for NOMMU build.
 - Fix AVIC base address in i.MX31 device tree source.  The problem was
   shadowed by the AVIC driver, which takes the correct base address
   from a SoC specific header file.

* tag 'imx-fixes-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6: Disable "weim" node in the dtsi files
  ARM: i.MX: remove map_io callback
  ARM: dts: vf610-zii-dev-rev-b: Add missing newline
  ARM: dts: imx6qdl-nitrogen6x: remove duplicate iomux entry
  ARM: dts: imx31: fix AVIC base address
2017-01-04 16:17:46 +01:00
Arnd Bergmann
fcf14b8889 Merge tag 'qcom-arm-fixes-for-4.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into fixes
Pull "Qualcomm ARM DTS Fixes for v4.10-rc2" from Andy Gross:

* Add SCM clock for APQ8064 to fix boot failures

* tag 'qcom-arm-fixes-for-4.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  ARM: dts: qcom: apq8064: Add missing scm clock
2017-01-04 16:17:18 +01:00
Arnd Bergmann
46a3bf8071 Merge tag 'omap-for-v4.10/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "omap fixes for v4.10-rc cycle" from Tony Lindgren:

Fist set of fixes for omaps for v4.10-rc cycle, mostly
to deal with various regressions noticed during the merge
window and to fix various device tree configurations for
boards. Also included is removal of mach-omap2/gpio.c that
is now dead code with device tree based booting that should
be OK for the early -rc cycle:

- A series of fixes to add empty chosen node to fix regressions
  caused for bootloaders that don't create chosen node as the
  decompressor needs the chosen node to merge command line and
  ATAGs into it

- Fix missing logicpd-som-lv-37xx-devkit.dtb entry in Makefile

- Fix regression for am437x timers

- Fix wrong strcat for non-NULL terminated string

- A series of changes to fix tps65217 interrupts to not use
  defines as we don't do that for interrupts

- Two patches to fix USB VBUS detection on am57xx-idk and force it
  to peripheral mode until dwc3 role detection is working

- Add missing dra72-evm-tps65917 missing voltage supplies
  accidentally left out of an earlier patch

- Fix n900 eMMC detection when booted on qemu

- Remove unwanted pr_err on failed memory allocation for
  prm_common.c

- Remove legacy mach-omap2/gpio.c that now is dead code
  since we boot mach-omap2 in device tree only mode

- Fix am572x-idk pcie1 by adding the missing gpio reset pin

* tag 'omap-for-v4.10/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (23 commits)
  ARM: dts: am572x-idk: Add gpios property to control PCIE_RESETn
  ARM: OMAP2+: PRM: Delete an error message for a failed memory allocation
  ARM: dts: n900: Mark eMMC slot with no-sdio and no-sd flags
  ARM: dts: dra72-evm-tps65917: Add voltage supplies to usb_phy, mmc, dss
  ARM: dts: am57xx-idk: Put USB2 port in peripheral mode
  ARM: dts: am57xx-idk: Support VBUS detection on USB2 port
  dt-bindings: input: Specify the interrupt number of TPS65217 power button
  dt-bindings: power/supply: Update TPS65217 properties
  dt-bindings: mfd: Remove TPS65217 interrupts
  ARM: dts: am335x: Fix the interrupt name of TPS65217
  ARM: omap2+: fixing wrong strcat for Non-NULL terminated string
  ARM: omap2+: am437x: rollback to use omap3_gptimer_timer_init()
  ARM: dts: omap3: Add DTS for Logic PD SOM-LV 37xx Dev Kit
  ARM: dts: dra7: Add an empty chosen node to top level DTSI
  ARM: dts: dm816x: Add an empty chosen node to top level DTSI
  ARM: dts: dm814x: Add an empty chosen node to top level DTSI
  ARM: dts: am4372: Add an empty chosen node to top level DTSI
  ARM: dts: am33xx: Add an empty chosen node to top level DTSI
  ARM: dts: omap5: Add an empty chosen node to top level DTSI
  ARM: dts: omap4: Add an empty chosen node to top level DTSI
  ...
2017-01-04 16:14:25 +01:00
Arnd Bergmann
d4032ccc40 Merge tag 'samsung-soc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Samsung mach/soc update for v4.10:

1. Minor cleanup in smp_operations.
2. Another step in switching s3c24xx to new DMA API.
3. Drop fixed requirement for HZ=200 on Samsung platforms.

* tag 'samsung-soc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: Drop fixed 200 Hz timer requirement from Samsung platforms
  ARM: S3C24XX: Add DMA slave maps for remaining s3c24xx SoCs
  ARM: EXYNOS: Remove smp_init_cpus hook from platsmp.c
2017-01-04 16:12:17 +01:00
Arnd Bergmann
cb2cc43681 Merge tag 'qcom-fixes-for-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into fixes
Qualcomm ARM64 Fixes for v4.10-rc1

* Fix instability in MSM8996 due to incorrect carveouts

* tag 'qcom-fixes-for-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: msm8996: Add required memory carveouts
2017-01-04 16:10:38 +01:00
Arnd Bergmann
84cc8ca1fd Merge tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Renesas ARM Based SoC Fixes for v4.10

* Provide sd0_uhs node

* tag 'renesas-fixes-for-v4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: h3ulcb: Provide sd0_uhs node
2017-01-04 16:08:28 +01:00
Linus Torvalds
0f64df3012 Merge branch 'parisc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller:

 - limit usage of processor-internal cr16 clocksource to UP systems only

 - segfault info lines in syslog were too long, split those up

 - drop own TIF_RESTORE_SIGMASK flag and switch to generic code

* 'parisc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: Add line-break when printing segfault info
  parisc: Drop TIF_RESTORE_SIGMASK and switch to generic code
  parisc: Mark cr16 clocksource unstable on SMP systems
2017-01-03 10:50:05 -08:00
Kevin Hilman
fcdaf1a2a7 ARM64: defconfig: enable DRM_MESON as module
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-03 09:31:13 -08:00
Neil Armstrong
fafdbdf767 ARM64: dts: meson-gx: Add Graphic Controller nodes
Add Video Processing Unit and CVBS Output nodes, and enable CVBS on selected
boards.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-03 09:31:02 -08:00
Kevin Hilman
1cf3df8a9c ARM64: dts: meson-gxl: fix GPIO include
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-03 09:29:54 -08:00
Fabio Estevam
116dad7d43 ARM: dts: imx6: Disable "weim" node in the dtsi files
Commit 1be81ea586 ("ARM: dts: imx6: Add imx-weim parameters to
dtsi's") causes the following probe error when the weim node is not
present on the board dts (such as imx6q-sabresd):

imx-weim 21b8000.weim: Invalid 'ranges' configuration
imx-weim: probe of 21b8000.weim failed with error -22

There is no need to always enable the "weim" node on mx6. Do the same
as in the other i.MX dtsi files where "weim" is disabled and only gets
enabled on a per dts basis.

All the imx6 weim dts users explicitily provide 'status = "okay"', so
this change has no impact on current imx6 weim users.

If a board does not use the weim driver it will not describe its 'ranges'
property, so simply disable the 'weim' node in the imx6 dtsi files to
avoid such probe error message.

Fixes: 1be81ea586 ("ARM: dts: imx6: Add imx-weim parameters to dtsi's")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-03 10:59:07 +08:00
Linus Torvalds
74e5c265a4 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Martin Schwidefsky:
 "Two bug fixes for 4.10-rc3"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  s390/kbuild: enable modversions for symbols exported from asm
  s390/vtime: correct system time accounting
2017-01-02 09:08:45 -08:00
Helge Deller
b4a9eb4cd5 parisc: Add line-break when printing segfault info
Add a leading line break else printed line gets too long.

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # v4.9
2017-01-02 18:07:25 +01:00
Linus Torvalds
71a332e560 Merge tag 'openrisc-for-linus' of git://github.com/openrisc/linux
Pull Openrisc fix from Stafford Horne:
 "There was nothing much interesting here except a build fix pointed out
  by the test robots. Highlight:

   - Defined _text symbol to fix build error"

* tag 'openrisc-for-linus' of git://github.com/openrisc/linux:
  openrisc: Add _text symbol to fix ksym build error
2017-01-02 09:00:59 -08:00
Bjorn Andersson
542b9f0759 ARM: dts: qcom: apq8064: Add missing scm clock
As per the device tree binding the apq8064 scm node requires the core
clock to be specified, so add this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-01-02 10:47:10 -06:00
Alexandre Bailon
d1df1e01af ARM: davinci: da8xx: Fix sleeping function called from invalid context
Everytime the usb20 phy is enabled, there is a
"sleeping function called from invalid context" BUG.
In addition, there is a recursive locking happening
because of the recurse call to clk_enable().

clk_enable() from arch/arm/mach-davinci/clock.c uses
spin_lock_irqsave() before to invoke the callback
usb20_phy_clk_enable(). usb20_phy_clk_enable() uses
clk_get() and clk_enable_prepapre() which may sleep.

Replace clk_prepare_enable() by davinci_clk_enable().

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Suggested-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: minor commit description adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-01-02 16:15:07 +05:30
Alexandre Bailon
48cd30b495 ARM: davinci: Make __clk_{enable,disable} functions public
In some cases, there is a need to enable a clock as part of
clock enable callback of a different clock. For example, USB
2.0 PHY clock enable requires USB 2.0 clock to be enabled.
In this case, it is safe to instead call __clk_enable()
since the clock framework lock is already taken. Calling
clk_enable() causes recursive locking error.

A similar case arises in the clock disable path.

To enable such usage, make __clk_{enable,disable} functions
publicly available outside of clock.c. Also, call them
davinci_clk_{enable|disable} now to be consistent with how
other davinci-specific clock functions are named.

Note that these functions are not exported to drivers. They
are meant for usage in platform specific clock management
code.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Suggested-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-01-02 16:10:42 +05:30