Add i2c bindings for the mcp230xx devices. This is quite a lot simpler
than the spi one as there's no funky sub addressing done (one struct
i2c_client per struct gpio_chip).
The mcp23s08_platform_data structure is reused for i2c, even though
only a single mcp23s08_chip_info structure is needed.
To use, simply fill out a platform_data structure and pass it in
i2c_board_info, E.G.:
static const struct mcp23s08_platform_data mcp23017_data = {
.chip[0] = {
.pullups = 0x00ff,
},
.base = 240,
};
static struct i2c_board_info __initdata i2c_devs[] = {
{ I2C_BOARD_INFO("mcp23017", 0x20),
.platform_data = &smartview_mcp23017_data, },
...
};
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Change spi member of struct mcp23s08 to be a ops-specific opaque data
pointer, and move spi specific knowledge out of mcp23s08_probe_one().
No functional change, but is needed to add i2c support.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
There's no in-tree users, and bus notifiers are more generic anyway.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The patch removes all the uses of cpu_is_mx(). Instead, it utilizes
platform_device_id to distinguish the different gpio types, IMX1_GPIO
on i.mx1, IMX21_GPIO on i.mx21 and i.mx27, IMX31_GPIO on all other
i.mx SoCs.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The bgpio_init() function does not initialise the shadow register for
the GPIO direction register. Thus, when configuring the first GPIO with
gpio_set_direction() all other GPIOs of the same bank will be
configured as inputs. Since the bgpio layer cannot know whether the
register is readable, the initialisation should be done by the caller
of bgpio_init().
Also, the 'data' shadow variable that is used inside basic_mmio_gpio
to cache the current value of the GPIO_DR register is initialised from
the GPIO_PSR register within bgpio_init(). Thus when setting the
output value of a certain GPIO, the other GPIO outputs of the same
bank will be set or cleared depending on the pin state of the GPIO
inputs during bgpio_init().
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
GPIO drivers are getting consolidated into drivers/gpio. While at it,
change the driver name to mpc5200-gpio* to avoid collisions.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Engineering names are more stable than marketing names. Hence, use them
for Device Tree compatible properties instead.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds a new routine, of_get_named_gpio_flags(), which takes the
property name as a parameter rather than assuming "gpios".
of_get_gpio_flags() is modified to call of_get_named_gpio_flags() with "gpios"
as the property parameter.
Signed-off-by: John Bonesio <bones@secretlab.ca>
[grant.likely: Tidied up whitespace and tweaked kerneldoc comments.]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
with the "for (; i != 0; i--)" sytax, i-- will be executed after the iteration.
thus dev_err shows wrong i value.
Switch to "while(--i >= 0)" which is better in readability.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The property 'polarity' is handled by the GPIO core, and the 'gpio-base'
should be assigned automatically. It is meaningless in the device-tree,
since GPIO's are identified by the "chip-name"/offset pair.
This way, the whole pca953x_get_alt_pdata() can hopefully soon go away.
We still need to check whether we really want GPIO-interrupt functionality
by simply looking if the I2C node has an interrupts property defined, since
this property is not used for anything else.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
In the case that we obtain device-tree data to fill in platform_data, the new
platform data struct was dynamically allocated, but the pointer to it was not
used everywhere it should. It seems easier to fix this issue by removing the
dynamic allocation altogether since its data is only used during driver
probing.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
It seems that in the normal case, IRQ_NOREQUEST needs to be explicitly
cleared, otherwise claiming the interrupt fails.
In the case of sparse interrupts, the descriptor needs to be allocated
first.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Remove cpu_is_* checks from gpio_show_revision() by passing in the
revision address offset from platform data. SoCs with no revision
register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to
signify no register.
While here, all GPIO banks are assumed to be the same revision, so fix
show_revision() to only show the revision for the first bank it finds.
This removes duplicate GPIO revision prints during boot.
Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s
that were missed in the original patch.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Make _set_gpio_wakeup() generic by removing ifdefs. Code for the
various SoCs/bank-methods was already the same, except for the
non-wakeup GPIO checking. But that flag is set on a per-SoC basis, so
can be used for all SoCs.
While here, use dev_err() and remove GPIO bank calculation assumption
based on subtracting bank pointers.
Signed-off-by: Kevin Hilman <khilman@ti.com>
These functions are useless. They are only called in a few places,
and where they are called, the GPIO has already been converted from an
IRQ or masked, so these functions will never fail.
Signed-off-by: Kevin Hilman <khilman@ti.com>
MPUIO banks have their own dedicated IRQ chip interface, separate from
the "normal" GPIO banks. Convert the MPUIO IRQ chip over to using
the new generic IRQ chip interface.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Cleanup GPIO IRQ enable/disable handling by removing SoC-specific
Also split enable/disable IRQ into separate functions for better
readability and also facilitate potentially moving to generic irq_chip
in the future.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Cleanup IRQ status handling by passing IRQ status register offsets
via platform data.
Cleans up clearing of GPIO IRQ status and GPIO ISR handler.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Add register offset fields to GPIO platform_data for registers.
This patch adds registers that control direction, input and output
data. Using these register offsets in the common driver allows
removal of #ifdefs and greatly improves readability.
Also create dedicated data out functions: one for banks with dedicated
set/clear registers, and another for banks with a single mask
register.
Signed-off-by: Kevin Hilman <khilman@ti.com>
The get_gpio_index() function, littered with cpu_is_* checks can be easily
replaced by using bitops based on the GPIO bank width. Do so.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Rather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific. Note the bank width
is already passed per-bank via platform_data, so current code would
be incorrect if any banks had different width.
Signed-off-by: Kevin Hilman <khilman@ti.com>
Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()
The MPUIOs do not need a register access to ack/clear the IRQ status,
since reading the IRQ status clears it. In addition, the MPUIO
irq_chip has an empty ack method, so _clear_gpio_irqbank() is never
used for MPUIOs.
Signed-off-by: Kevin Hilman <khilman@ti.com>
In commit 78a1a6d341 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.
Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.
Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.
Signed-off-by: Kevin Hilman <khilman@ti.com>
As part of the gpio driver consolidation, this patch moves the Tegra driver
into drivers/gpio
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Colin Cross <ccross@android.com>
The 74x164 GPIO driver has a static inline helper called
gpio_to_chip which clashes with the gpiolib namespace if we
try to expose the function with the same name from gpiolib,
and it's still confusing even if we don't do that. So rename
it to gpio_to_74x164_chip().
Reported-by: H Hartley Sweeten <hartleys@visionengravers.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6:
gpio/basic_mmio: add missing include of spinlock_types.h
gpio/nomadik: fix sleepmode for elder Nomadik
When calling gpio_get_value, the gpio number other than bit offset
should be passed as the argument.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We leak the memory allocated to 'phi' when the variable goes out of scope
in hfcsusb_ph_info().
Signed-off-by: Jesper Juhl <jj@chaosbits.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King said:
>
> So, to summarize what its doing:
>
> 1. It allocates buffers for rx and tx.
> 2. It maps them with dma_map_single().
> This transfers ownership of the buffer to the DMA device.
> 3. In ep93xx_xmit,
> 3a. It copies the data into the buffer with skb_copy_and_csum_dev()
> This violates the DMA buffer ownership rules - the CPU should
> not be writing to this buffer while it is (in principle) owned
> by the DMA device.
> 3b. It then calls dma_sync_single_for_cpu() for the buffer.
> This transfers ownership of the buffer to the CPU, which surely
> is the wrong direction.
> 4. In ep93xx_rx,
> 4a. It calls dma_sync_single_for_cpu() for the buffer.
> This at least transfers the DMA buffer ownership to the CPU
> before the CPU reads the buffer
> 4b. It then uses skb_copy_to_linear_data() to copy the data out.
> At no point does it transfer ownership back to the DMA device.
> 5. When the driver is removed, it dma_unmap_single()'s the buffer.
> This transfers ownership of the buffer to the CPU.
> 6. It frees the buffer.
>
> While it may work on ep93xx, it's not respecting the DMA API rules,
> and with DMA debugging enabled it will probably encounter quite a few
> warnings.
This patch fixes these violations.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: Petr Stetiar <ynezz@true.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commit a197b59ae6 (mm: fail GFP_DMA allocations when ZONE_DMA is not
configured) made page allocator to return NULL if GFP_DMA is set but
CONFIG_ZONE_DMA is disabled.
This causes ep93xx_eth to fail:
WARNING: at mm/page_alloc.c:2251 __alloc_pages_nodemask+0x11c/0x638()
Modules linked in:
[<c0035498>] (unwind_backtrace+0x0/0xf4) from [<c0043da4>] (warn_slowpath_common+0x48/0x60)
[<c0043da4>] (warn_slowpath_common+0x48/0x60) from [<c0043dd8>] (warn_slowpath_null+0x1c/0x24)
[<c0043dd8>] (warn_slowpath_null+0x1c/0x24) from [<c0083b6c>] (__alloc_pages_nodemask+0x11c/0x638)
[<c0083b6c>] (__alloc_pages_nodemask+0x11c/0x638) from [<c00366fc>] (__dma_alloc+0x8c/0x3ec)
[<c00366fc>] (__dma_alloc+0x8c/0x3ec) from [<c0036adc>] (dma_alloc_coherent+0x54/0x60)
[<c0036adc>] (dma_alloc_coherent+0x54/0x60) from [<c0227808>] (ep93xx_open+0x20/0x864)
[<c0227808>] (ep93xx_open+0x20/0x864) from [<c0283144>] (__dev_open+0xb8/0x108)
[<c0283144>] (__dev_open+0xb8/0x108) from [<c0280528>] (__dev_change_flags+0x70/0x128)
[<c0280528>] (__dev_change_flags+0x70/0x128) from [<c0283054>] (dev_change_flags+0x10/0x48)
[<c0283054>] (dev_change_flags+0x10/0x48) from [<c001a720>] (ip_auto_config+0x190/0xf68)
[<c001a720>] (ip_auto_config+0x190/0xf68) from [<c00233b0>] (do_one_initcall+0x34/0x18c)
[<c00233b0>] (do_one_initcall+0x34/0x18c) from [<c0008400>] (kernel_init+0x94/0x134)
[<c0008400>] (kernel_init+0x94/0x134) from [<c0030858>] (kernel_thread_exit+0x0/0x8)
Since there is no restrictions for DMA on ep93xx, we can fix this by just
removing the GFP_DMA flag from the call.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: Petr Stetiar <ynezz@true.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>
We can use simply kmalloc() to allocate the buffers. This also simplifies the
code and allows us to perform DMA sync operations more easily.
Memory is allocated with only GFP_KERNEL since there are no DMA allocation
restrictions on this platform.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: Petr Stetiar <ynezz@true.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>
We shouldn't use NULL for any DMA API functions, unless we are dealing with
ISA or EISA device. So pass correct struct dev pointer to these functions.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix:
/tmp/ccvoZ6h8.s: Assembler messages:
/tmp/ccvoZ6h8.s:284: Warning: register range not in ascending order
/tmp/ccvoZ6h8.s:881: Warning: register range not in ascending order
/tmp/ccvoZ6h8.s:1087: Warning: register range not in ascending order
by ensuring that we have temporary variables placed into specific
registers. Reorder the code a bit to allow the resulting assembly
to be slightly more optimal.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
