Commit Graph

492 Commits

Author SHA1 Message Date
Thomas Gleixner
2e4b28c48f treewide: Update email address
In a vain attempt to consolidate the email zoo switch everything to the
kernel.org account.

Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-01-11 06:09:11 -10:00
Linus Walleij
54de247a0e dt-bindings: Updates Linus Walleij's mail address
My name is stamped into maintainership for a big slew of DT
bindings. Now that it is changing, switch it over to my
kernel.org mail address, which will hopefully be stable for the
rest of my life.

Signed-off-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-16 10:17:59 -06:00
Linus Torvalds
66a1025f7f Merge tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new SoC families update from Arnd Bergmann:
 "These three new families of SoC are split out into a separate branch
  because they touch multiple parts of the source tree and are better
  left separate for the initial merge.

   - Black Sesame Technologies C1200 is an automotive SoC using
     Cortex-A78 CPU cores

   - Anlogic dr1v90 (not to be confused with Amlogic) is an FPGA
     platform using a single nuclei ux900 RISC-V core

   - Tenstorrent Blackhole is a Neural Processing Unit using custom
     "Tensix" cores for computation offload managed by Linux running on
     SiFive X280 RISC-V cores.

  Support for all three is rather rudimentary at the moment and will get
  improved as device drivers are merged through other tree"

* tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
  MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support
  arm64: defconfig: enable BST platform support
  arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
  arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs
  dt-bindings: arm: add Black Sesame Technologies (bst) SoC
  dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
  MAINTAINERS: Setup support for Anlogic tree
  riscv: defconfig: Enable Anlogic SoC
  riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
  riscv: dts: Add initial Anlogic DR1V90 SoC device tree
  riscv: Add Anlogic SoC famly Kconfig support
  dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
  dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
  dt-bindings: riscv: Add Anlogic DR1V90
  dt-bindings: riscv: Add Nuclei UX900 compatibles
  dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
  riscv: defconfig: Enable Tenstorrent SoCs
  riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs
  riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
  dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
  ...
2025-12-05 17:27:12 -08:00
Linus Torvalds
6044a1ee9d Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT bindings:

   - Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma,
     brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions
     Owl SPS, Marvell AP80x System Controller, Marvell CP110 System
     Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema
     format

   - Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
     EEPROM, and Microchip pic64gx PLIC

   - Add missing LGE, AMD Seattle, and APM X-Gene SoC platform
     compatibles

   - Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
     bindings to fix warnings on BCM2712 platforms

   - Drop obsolete db8500-thermal.txt

   - Treewide clean-up of extra blank lines and inconsistent quoting

   - Ensure all .dtbo targets are applied to a base .dtb

   - Speed up dt_binding_check by skipping running validation on empty
     examples

  DT core:

   - Add of_machine_device_match() and of_machine_get_match_data()
     helpers and convert users treewide

   - Fix bounds checking of address properties in FDT code. Rework the
     code to have a single implementation of the bounds checks.

   - Rework of_irq_init() to ignore any implicit interrupt-parent (i.e.
     in a parent node) on nodes without an interrupt. This matches the
     spec description and fixes some RISC-V platforms.

   - Avoid a spurious message on overlay removal

   - Skip DT kunit tests on RISCV+ACPI"

* tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
  dt-bindings: kbuild: Skip validating empty examples
  dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement
  dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712
  dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712
  of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node
  soc: tegra: Simplify with of_machine_device_match()
  soc: qcom: ubwc: Simplify with of_machine_get_match_data()
  powercap: dtpm: Simplify with of_machine_get_match_data()
  platform: surface: Simplify with of_machine_get_match_data()
  irqchip/atmel-aic: Simplify with of_machine_get_match_data()
  firmware: qcom: scm: Simplify with of_machine_device_match()
  cpuidle: big_little: Simplify with of_machine_device_match()
  cpufreq: sun50i: Simplify with of_machine_device_match()
  cpufreq: mediatek: Simplify with of_machine_get_match_data()
  cpufreq: dt-platdev: Simplify with of_machine_get_match_data()
  of: Add wrappers to match root node with OF device ID tables
  dt-bindings: eeprom: at25: Add Anvo ANV32C81W
  of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size()
  of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes()
  of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg()
  ...
2025-12-04 15:50:37 -08:00
Hao-Wen Ting
40caba2bd0 dt-bindings: timer: Add Realtek SYSTIMER
The Realtek SYSTIMER (System Timer) is a 64-bit global hardware counter
operating at a fixed 1MHz frequency. Thanks to its compare match
interrupt capability, the timer natively supports oneshot mode for tick
broadcast functionality.

Signed-off-by: Hao-Wen Ting <haowen.ting@realtek.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patch.msgid.link/20251126060110.198330-2-haowen.ting@realtek.com
2025-11-26 11:25:15 +01:00
Arnd Bergmann
9b418a3bfd Merge tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/newsoc
Initial Anlogic Platform Support

Add bindings for the serial and timer peripherals, and a basic soc dtsi
for the Anlogic dr1v90 SoC. The Milianke MLKPAI FS01 is the first board
for this SoC. Add myself as maintainer for this platform for the time
being.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: Setup support for Anlogic tree
  riscv: defconfig: Enable Anlogic SoC
  riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
  riscv: dts: Add initial Anlogic DR1V90 SoC device tree
  riscv: Add Anlogic SoC famly Kconfig support
  dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
  dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
  dt-bindings: riscv: Add Anlogic DR1V90
  dt-bindings: riscv: Add Nuclei UX900 compatibles
  dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
2025-11-21 21:29:57 +01:00
Rob Herring (Arm)
0b2333183a dt-bindings: Remove extra blank lines
Generally at most 1 blank line is the standard style for DT schema
files. Remove the few cases with more than 1 so that the yamllint check
for this can be enabled.

Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc
Acked-by: Georgi Djakov <djakov@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings
Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-11-17 11:24:50 -06:00
Junhui Liu
ccc3fd3ebe dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
Add MTIMER support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with
a TIMER unit compliant with the ACLINT specification.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12 17:06:56 +00:00
Drew Fustini
b5951b25d7 dt-bindings: timers: Add Tenstorrent Blackhole compatible
Document clint compatible for the Tenstorrent Blackhole SoC.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com>
Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
2025-10-18 10:44:14 -07:00
Linus Torvalds
9792d660a4 Merge tag 'devicetree-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT core:

   - Update dtc to upstream version v1.7.2-35-g52f07dcca47c

   - Add stub for of_get_next_child_with_prefix()

   - Convert of_msi_map_id() callers to of_msi_xlate()

 DT bindings:

   - Convert multiple text board bindings to DT schema format

   - Add bindings for synaptics,synaptics_i2c touchscreen controller,
     innolux,n133hse-ea1 and nlt,nl12880bc20-spwg-24 displays, and NXP
     vf610 reboot controller

   - Add new Arm Cortex-A320/A520AE/A720AE and C1-Nano/Pro/Premium/Ultra
     CPUs. Add missing Applied Micro CPU compatibles. Add pu-supply and
     fsl,soc-operating-points properties for CPU nodes.

   - Add QCom Glymur PDC and tegra264-agic interrupt controllers

   - Add samsung,exynos8890-mali GPU to Arm Mali Midgard

   - Drop Samsung S3C2410 display related bindings

   - Allow separate DP lane and AUX connections in dp-connector

   - Add some missing, undocumented vendor prefixes

   - Add missing '#address-cells' properties in interrupt controller
     bindings which dtc now warns about

   - Drop duplicate socfpga-sdram-edac.txt, moxa,moxart-watchdog.txt,
     fsl/mpic.txt, ti,opa362.txt, and cavium-thunder2.txt legacy text
     bindings which are already covered by existing schemas.

   - Various binding fixes for Mediatek platforms in mailbox, regulator,
     pinctrl, timer, and display

   - Drop work-around for yamllint quoting of values containing ','

   - Various spelling, typo, grammar, and duplicated words fixes in DT
     bindings and docs

   - Add binding guidelines for defining properties at top level of
     schemas, lack of node name ABI, and usage of simple-mfd"

* tag 'devicetree-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (81 commits)
  dt-bindings: arm: altera: Drop socfpga-sdram-edac.txt
  dt-bindings: gpu: Convert nvidia,gk20a to DT schema
  dt-bindings: rng: sparc_sun_oracle_rng: convert to DT schema
  dt-bindings: vendor-prefixes: update regex for properties without a prefix
  dt-bindings: display: bridge: convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml
  scripts: dt_to_config: fix grammar and a typo in --help text
  dt-bindings: fix spelling, typos, grammar, duplicated words
  docs: dt: fix grammar and spelling
  of: base: Add of_get_next_child_with_prefix() stub
  dt-bindings: trivial-devices: Add compatible string synaptics,synaptics_i2c
  dt-bindings: soc: mediatek: pwrap: Add power-domains property
  dt-bindings: pinctrl: mt65xx: Allow gpio-line-names
  dt-bindings: media: Convert MediaTek mt8173-vpu bindings to DT schema
  dt-bindings: arm: mediatek: Support mt8183-audiosys variant
  dt-bindings: mailbox: mediatek,gce-mailbox: Make clock-names optional
  dt-bindings: regulator: mediatek,mt6331: Add missing compatible
  dt-bindings: regulator: mediatek,mt6331: Fix various regulator names
  dt-bindings: regulator: mediatek,mt6332-regulator: Add missing compatible
  dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing base reg
  dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing pwm_ch7_2
  ...
2025-10-01 16:58:24 -07:00
Linus Torvalds
c050daf69f Merge tag 'pwm/for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux
Pull pwm updates from Uwe Kleine-König:
 "The core highlights for this cycle are:

   - The pca9586 driver was converted to the waveform API

   - Waveform drivers automatically provide a gpio chip to make PWMs
     usable as GPIOs (The pca9586 driver did that in a driver specific
     implementation before)

  Otherwise it's the usual mix of fixes and device tree and driver
  changes to support new hardware variants"

* tag 'pwm/for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: (30 commits)
  pwm: cros-ec: Avoid -Wflex-array-member-not-at-end warnings
  dt-bindings: pwm: samsung: add exynos8890 compatible
  dt-bindings: pwm: apple,s5l-fpwm: Add t6020-fpwm compatible
  dt-bindings: pwm: nxp,lpc1850-sct-pwm: Minor whitespace cleanup in example
  pwm: pca9586: Convert to waveform API
  pwm: pca9685: Drop GPIO support
  pwm: pca9685: Make use of register caching in regmap
  pwm: pca9685: Use bulk write to atomicially update registers
  pwm: pca9685: Don't disable hardware in .free()
  pwm: Add the S32G support in the Freescale FTM driver
  dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and s32g3
  pwm: mediatek: Lock and cache clock rate
  pwm: mediatek: Fix various issues in the .apply() callback
  pwm: mediatek: Implement .get_state() callback
  pwm: mediatek: Initialize clks when the hardware is enabled at probe time
  pwm: mediatek: Rework parameters for clk helper function
  pwm: mediatek: Introduce and use a few more register defines
  pwm: mediatek: Simplify representation of channel offsets
  pwm: tiecap: Document behaviour of hardware disable
  pwm: Provide a gpio device for waveform drivers
  ...
2025-10-01 10:33:17 -07:00
AngeloGioacchino Del Regno
c1f7800c9c dt-bindings: timer: mediatek: Add compatible for MT6795 GP Timer
Add a compatible for the General Purpose Timer (GPT) found on the
MediaTek Helio X10 MT6795 SoC which is fully compatible with the
one found in MT6577.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-09-26 14:50:43 -05:00
SungMin Park
45d78cd0bf dt-bindings: timer: exynos4210-mct: Add compatible for ARTPEC-9 SoC
Add Axis ARTPEC-9 mct compatible to the bindings documentation.
The design for the timer is reused from previous Samsung SoCs
like exynos4210 and ARTPEC-8.

Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250917071311.1404-1-ravi.patel@samsung.com
2025-09-24 15:46:27 +02:00
Daniel Lezcano
adaf5b248f dt: bindings: fsl,vf610-pit: Add compatible for s32g2 and s32g3
The Vybrid Family is a NXP (formerly Freescale) platform having a
Programmable Interrupt Timer (PIT). This timer is an IP found also on
the NXP Automotive platform S32G2 and S32G3.

Add the compatible for those platforms to describe the timer.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250804152344.1109310-20-daniel.lezcano@linaro.org
2025-09-23 12:30:11 +02:00
AngeloGioacchino Del Regno
99d19715da dt-bindings: timer: mediatek,timer: Add MediaTek MT8196 compatible
Add a new compatible for the MediaTek MT8196 SoC, fully compatible
with MT6765.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250611110800.458164-2-angelogioacchino.delregno@collabora.com
2025-09-23 10:56:29 +02:00
Frank Li
ffc5870fc4 dt-bindings: timer: Add fsl,timrot.yaml
Add fsl,timrot.yaml for i.MX23/i.MX28 timer.

Also add a generic fallback compatible string "fsl,timrot" for legacy
devices, which have existed for over 15 years.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250528165351.691848-1-Frank.Li@nxp.com
2025-09-23 10:56:05 +02:00
Frank Li
c1ff9e919a dt-bindings: timer: fsl,ftm-timer: use items for reg
The original txt binding doc is:
  reg : Specifies base physical address and size of the register sets for
        the clock event device and clock source device.

And existed dts provide two reg MMIO spaces. So change to use items to
descript reg property.

Update examples.

Fixes: 8fc30d8f8e ("dt-bindings: timer: fsl,ftm-timer: Convert to dtschema")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250523141437.533643-1-Frank.Li@nxp.com
2025-09-23 10:53:37 +02:00
Max Shevchenko
bb7bf8b44d dt-bindings: timer: mediatek: add MT6572
Add a compatible string for timer on the MT6572 SoC.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-3-bde75b7ed445@proton.me
2025-09-23 10:53:12 +02:00
Rob Herring (Arm)
ef0e000cd1 dt-bindings: timer: Convert faraday,fttmr010 to DT schema
Convert the Faraday fttmr010 Timer binding to DT schema format. Adjust
the compatible string values to match what's in use. The number of
interrupts can also be anywhere from 1 to 8. The clock-names order was
reversed compared to what's used.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250611232621.1508116-1-robh@kernel.org
2025-09-23 10:52:51 +02:00
Uwe Kleine-König
09cbe54681 dt-bindings: timer: renesas,rz-mtu3: Use #pwm-cells = <3>
With the goal to unify all PWM bindings to use #pwm-cells = <3> update
the renesas,rz-mtu3 binding accordingly. Keep <2> documented as a
deprecated value at least until the in-tree device trees are fixed
accordingly.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250527205823.377785-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-09-15 11:39:44 +02:00
Linus Torvalds
4df9c0a246 Merge tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new SoC support from Arnd Bergmann:
 "These five newly supported chips come with both devicetree
  descriptions and the changes to wire them up to the build system for
  easier bisection.

  The chips in question are:

   - Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell
     in the product line that started with the Digital StrongARM SA1100
     based PDAs and continued with the Intel PXA2xx that dominated early
     smartphones. This one only made it only into a few products before
     the entire product line was cut in 2015.

   - The QiLai SoC is made by RISC-V core designer Andes Technologies
     and is in the 'Voyager' reference board in MicroATX form factor. It
     uses four in-order AX45MP cores, which is the midrange product from
     Andes.

   - CIX P1 is one of the few Arm chips designed for small workstations,
     and this one uses 12 Cortex-A720/A520 cores, making it also one of
     the only ARMv9.2 machines that one can but at the moment.

   - Axiado AX3000 is an embedded chip with relative small Cortex-A53
     CPU cores described as a "Trusted Control/Compute Unit" that can be
     used as a BMC in servers. In addition to the usual I/O, this one
     comes with 10GBit ethernet and and a 4TOPS NPU.

   - Sophgo SG2000 is an embedded chip that comes with both RISC-V and
     Arm cores that can run Linux. This was already supported for RISC-V
     but now it also works on Arm

  One more chip, the Black Sesame C1200 did not make it in tirm for the
  merge window"

* tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
  arm64: defconfig: Enable rudimentary Sophgo SG2000 support
  arm64: Add SOPHGO SOC family Kconfig support
  arm64: dts: sophgo: Add Duo Module 01 Evaluation Board
  arm64: dts: sophgo: Add Duo Module 01
  arm64: dts: sophgo: Add initial SG2000 SoC device tree
  MAINTAINERS: Add entry for Axiado
  arm64: defconfig: enable the Axiado family
  arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
  arm64: add Axiado SoC family
  dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
  dt-bindings: serial: cdns: add Axiado AX3000 UART controller
  dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
  dt-bindings: gpio: cdns: convert to YAML
  dt-bindings: arm: axiado: add AX3000 EVK compatible strings
  dt-bindings: vendor-prefixes: Add Axiado Corporation
  MAINTAINERS: Add CIX SoC maintainer entry
  arm64: dts: cix: Add sky1 base dts initial support
  dt-bindings: clock: cix: Add CIX sky1 scmi clock id
  arm64: defconfig: Enable CIX SoC
  mailbox: add CIX mailbox driver
  ...
2025-07-29 11:17:24 -07:00
Alexey Charkov
b06d6a1d0c dt-bindings: timer: via,vt8500-timer: Convert to YAML
Rewrite the textual description for the VIA/WonderMedia timer
as YAML schema.

The IP can generate up to four interrupts from four respective match
registers, so reflect that in the schema.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20250521-vt8500-timer-updates-v5-1-7e4bd11df72e@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-22 22:45:01 -05:00
Ben Zong-You Xie
65bbf10b93 dt-bindings: timer: add Andes machine timer
Add the DT binding documentation for Andes machine timer.

The RISC-V architecture defines a machine timer that provides a real-time
counter and generates timer interrupts. Andes machiner timer (PLMT0) is
the implementation of the machine timer, and it contains memory-mapped
registers (mtime and mtimecmp). This device supports up to 32 cores.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 16:51:52 +02:00
Linus Torvalds
bf373e4c78 Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert all remaining interrupt-controller bindings to DT schema

   - Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
     PMC, imx-drm, and ftm-quaddec to DT schema

   - Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
     maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard

   - Add top-level constraints for renesas,vsp1 and renesas,fcp

   - Add missing constraint in amlogic,pinctrl-a4 'group' nodes

   - Adjust the allowed properties for dwc3-xilinx, sony,imx219,
     pci-iommu, and renesas,dsi

   - Add EcoNet vendor prefix

   - Fix the reserved-memory.yaml in fsl,qman-fqd

   - Drop obsolete numa.txt and cpu-topology.txt which are schemas in
     dtschema now

   - Drop Renesas RZ/N1S bindings

   - Ensure Arm cpu nodes don't allow undocumented properties. Add all
     the properties which are in use and undocumented. Drop the Mediatek
     cpufreq binding which is not a binding, but just what DT properties
     the driver uses.

   - Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU

   - Update documentation on defining child nodes with separate schemas

   - Add bindings to PSCI MAINTAINERS entry

  DT core:

   - Add new functions to simplify driver handling of 'memory-region'
     properties. Users to be added next cycle.

   - Simplify of_dma_set_restricted_buffer() to use
     of_for_each_phandle()

   - Add missing unlock on error in unittest_data_add()"

* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
  dt-bindings: timer: Add fsl,vf610-pit.yaml
  dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
  ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
  dt-bindings: arm/cpus: Allow 2 power-domains entries
  dt-bindings: usb: dwc3-xilinx: allow dma-coherent
  media: dt-bindings: sony,imx219: Allow props from video-interface-devices
  dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
  dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
  dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
  dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
  dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
  dt-bindings: trivial-devices: Add VZ89TE to trivial
  media: dt-bindings: renesas,vsp1: add top-level constraints
  media: dt-bindings: renesas,fcp: add top-level constraints
  dt-bindings: trivial-devices: Add Maxim max30208
  dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
  dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
  dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
  dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
  dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
  ...
2025-05-29 08:22:07 -07:00
Frank Li
89ab97de44 dt-bindings: timer: Add fsl,vf610-pit.yaml
Add binding doc fsl,vf610-pit.yaml to fix below CHECK_DTB warnings:

arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dtb:
  /soc/bus@40000000/pit@40037000: failed to match any schema with compatible: ['fsl,vf610-pit']

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250522205710.502779-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-28 09:20:59 -05:00
Linus Torvalds
6376c07706 Merge tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Thomas Gleixner:
 "Updates for clocksource/clockevent drivers:

   - The final conversion of text formatted device tree binding to
     schemas

   - A new driver fot the System Timer Module on S32G NXP SoCs

   - A new driver fot the Econet HPT timer

   - The usual improvements and device tree binding updates"

* tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits)
  clocksource/drivers/renesas-ostm: Unconditionally enable reprobe support
  dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support
  dt-bindings: timer: Convert marvell,armada-370-timer to DT schema
  dt-bindings: timer: Convert ti,keystone-timer to DT schema
  dt-bindings: timer: Convert st,spear-timer to DT schema
  dt-bindings: timer: Convert socionext,milbeaut-timer to DT schema
  dt-bindings: timer: Convert snps,arc-timer to DT schema
  dt-bindings: timer: Convert snps,archs-rtc to DT schema
  dt-bindings: timer: Convert snps,archs-gfrc to DT schema
  dt-bindings: timer: Convert lsi,zevio-timer to DT schema
  dt-bindings: timer: Convert jcore,pit to DT schema
  dt-bindings: timer: Convert img,pistachio-gptimer to DT schema
  dt-bindings: timer: Convert ezchip,nps400-timer to DT schema
  dt-bindings: timer: Convert cirrus,clps711x-timer to DT schema
  dt-bindings: timer: Convert altr,timer-1.0 to DT schema
  dt-bindings: timer: Add ESWIN EIC7700 CLINT
  clocksource/drivers: Add EcoNet Timer HPT driver
  dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer
  dt-bindings: timer: Convert arm,mps2-timer to DT schema
  dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
  ...
2025-05-27 09:01:26 -07:00
Lad Prabhakar
f0e0c37437 dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support
Document support for the Renesas OS Timer (OSTM) found on the Renesas
RZ/V2N (R9A09G056) SoC. The OSTM IP on RZ/V2N is identical to that on
other RZ families, so no driver changes are required as `renesas,ostm`
will be used as fallback compatible.

Also update the bindings to require the "resets" property for RZ/V2N
by inverting the logic: all SoCs except RZ/A1 and RZ/A2 now require
the "resets" property.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250515182207.329176-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 13:33:11 +02:00
Rob Herring (Arm)
4334d83904 dt-bindings: timer: Convert marvell,armada-370-timer to DT schema
Convert the Marvell Armada 37x/380/XP Timer binding to DT schema format.
Update the compatible entries to match what is in use.
"marvell,armada-380-timer" in particular was missing.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250506022301.2588282-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:34 +02:00
Rob Herring (Arm)
4d54b0b401 dt-bindings: timer: Convert ti,keystone-timer to DT schema
Convert the TI Keystone Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022330.2589598-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:34 +02:00
Rob Herring (Arm)
379967d0c7 dt-bindings: timer: Convert st,spear-timer to DT schema
Convert the ST SPEAr Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022326.2589389-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:34 +02:00
Rob Herring (Arm)
7e5ce1944d dt-bindings: timer: Convert socionext,milbeaut-timer to DT schema
Convert the Socionext Milbeaut Timer binding to DT schema format.
It's a straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022322.2589193-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:34 +02:00
Rob Herring (Arm)
960a2f4c7f dt-bindings: timer: Convert snps,arc-timer to DT schema
Convert the Synopsys ARC Local Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022317.2589010-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:34 +02:00
Rob Herring (Arm)
58ac7dc3ca dt-bindings: timer: Convert snps,archs-rtc to DT schema
Convert the Synopsys ARC HS RTC Timer binding to DT schema format.
It's a straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022313.2588796-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
49f2f4d16f dt-bindings: timer: Convert snps,archs-gfrc to DT schema
Convert the Synopsys ARC HS 64-bit Timer binding to DT schema format.
It's a straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022309.2588605-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
e1e9fad149 dt-bindings: timer: Convert lsi,zevio-timer to DT schema
Convert the TI NSPIRE Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022257.2588136-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
f8470be859 dt-bindings: timer: Convert jcore,pit to DT schema
Convert the J-Core PIT Timer binding to DT schema format. It's a
straight-forward conversion.

Since the 'reg' entries are based on number of cores, we can't put
constraints on it.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022253.2587999-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
e7ddb13fa6 dt-bindings: timer: Convert img,pistachio-gptimer to DT schema
Convert the ImgTec Pistachio Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022249.2587839-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
2b3b58f233 dt-bindings: timer: Convert ezchip,nps400-timer to DT schema
Convert the EZChip NPS400 Timer bindings to DT schema format. It's a
straight-forward conversion. The 2 bindings only differ in compatible
and one required property, so the schemas can be combined.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022237.2587355-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
d65a30c30e dt-bindings: timer: Convert cirrus,clps711x-timer to DT schema
Convert the Cirrus CLPS711x timer binding to DT schema format. It's a
straight-forward conversion.

Drop the aliases node and second example which aren't relevant.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022215.2586595-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
60160c4bf6 dt-bindings: timer: Convert altr,timer-1.0 to DT schema
Convert the Altera Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022202.2586157-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Darshan Prajapati
6d1ca2236d dt-bindings: timer: Add ESWIN EIC7700 CLINT
Add compatible string for ESWIN EIC7700 CLINT.

Signed-off-by: Darshan Prajapati <darshan.prajapati@einfochips.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250410152519.1358964-9-pinkesh.vaghela@einfochips.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Caleb James DeLisle
30fddbd532 dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer
Add device tree bindings for the so-called high-precision timer (HPT)
in the EcoNet EN751221 SoC.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250507134500.390547-2-cjd@cjdns.fr
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
7aeeac5565 dt-bindings: timer: Convert arm,mps2-timer to DT schema
Convert the Arm MPS2 Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Link: https://lore.kernel.org/r/20250506022210.2586404-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Inochi Amaoto
f4cc180198 dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
compatible string for SG2044 SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250413223507.46480-3-inochiama@gmail.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
c55cddf620 dt-bindings: timer: Convert cnxt,cx92755-timer to DT schema
Convert the Conexant Digicolor SoCs Timer binding to DT schema format.
It's a straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/20250506022232.2587186-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
c3205f0f85 dt-bindings: timer: Convert csky,gx6605s-timer to DT schema
Convert the C-SKY gx6605s timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250506022224.2586860-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
157265afbd dt-bindings: timer: Convert csky,mptimer to DT schema
Convert the C-SKY Multi-processor timer binding to DT schema format.
It's a straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250506022228.2587029-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
Rob Herring (Arm)
ea1ab43e5c dt-bindings: timer: Convert marvell,orion-timer to DT schema
Convert the Marvell Orion Timer binding to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250506022305.2588431-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:33 +02:00
J. Neuschäfer
eb7bc69201 dt-bindings: timer: Convert fsl,gtm to YAML
Convert fsl,gtm.txt to YAML so that device trees using a Freescale
General-purpose Timers Module can be properly validated.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/r/20250412-gtm-yaml-v2-1-e4d2292ffefc@posteo.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:32 +02:00
Daniel Lezcano
eec34ebb65 dt-bindings: timer: Add NXP System Timer Module
Add the System Timer Module description found on the NXP s32 platform
and the compatible for the s32g2 variant.

Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
Cc: Thomas Fossati <thomas.fossati@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250417151623.121109-2-daniel.lezcano@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-05-16 11:10:32 +02:00