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Author SHA1 Message Date
Linus Torvalds
6190d0fa18 Merge tag 'usb-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb 
Pull USB driver fixes from Greg KH:
 "Here are some small USB driver fixes and new device ids for 6.18-rc3.
  Included in here are:

   - new option serial driver device ids added

   - dt bindings fixes for numerous platforms

   - xhci bugfixes for many reported regressions

   - usbio dependency bugfix

   - dwc3 driver fix

   - raw-gadget bugfix

  All of these have been in linux-next this week with no reported issues"

* tag 'usb-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  USB: serial: option: add Telit FN920C04 ECM compositions
  USB: serial: option: add Quectel RG255C
  tcpm: switch check for role_sw device with fw_node
  usb/core/quirks: Add Huawei ME906S to wakeup quirk
  usb: raw-gadget: do not limit transfer length
  USB: serial: option: add UNISOC UIS7720
  xhci: dbc: enable back DbC in resume if it was enabled before suspend
  xhci: dbc: fix bogus 1024 byte prefix if ttyDBC read races with stall event
  usb: xhci-pci: Fix USB2-only root hub registration
  dt-bindings: usb: qcom,snps-dwc3: Fix bindings for X1E80100
  usb: misc: Add x86 dependency for Intel USBIO driver
  dt-bindings: usb: switch: split out ports definition
  usb: dwc3: Don't call clk_bulk_disable_unprepare() twice
  dt-bindings: usb: dwc3-imx8mp: dma-range is required only for imx8mp
 2025-10-26 10:21:13 -07:00
Martin K. Petersen
4827790660 Merge branch '6.18/scsi-queue' into 6.18/scsi-fixes 
Pull in outstanding SCSI fixes for 6.18.

Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2025-10-13 15:54:13 -04:00
Neil Armstrong
bd8c3ce6d7 dt-bindings: usb: switch: split out ports definition 
The ports definition currently defined in the usb-switch.yaml
fits standards devices which are either recipient of altmode
muxing and orientation switching events or an element of the
USB Super Speed data lanes.

This doesn't necessarely fit combo PHYs like the Qualcomm
USB3/DP Combo which has a different ports representation.

Move the ports definition to a separate usb-switch-ports.yaml
and reference it next to the usb-switch.yaml, except for
the Qualcomm USB3/DP Combo PHY bindings.

Reported-by: Rob Herring <robh@kernel.org>
Closes: https://lore.kernel.org/all/175462129176.394940.16810637795278334342.robh@kernel.org/
Fixes: 3bad7fe227 ("dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to allow mode-switch")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2025-10-13 09:37:28 +02:00
Jingyi Wang
7c3321f3d2 scsi: ufs: phy: dt-bindings: Add QMP UFS PHY compatible for Kaanapali 
Document the QMP UFS PHY compatible for Qualcomm Kaanapali to support
physical layer functionality for UFS found on the SoC. Use fallback to
indicate the compatibility of the QMP UFS PHY on the Kaanapali with that
on the SM8750.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2025-10-06 22:34:45 -04:00
Linus Torvalds
1d1ba4d390 Merge tag 'phy-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 
Pull phy updates from Vinod Koul:
 "The usual bunch of device support and update to drivers.

  New Support
   - Qualcomm SM8750 QMP PCIe PHY dual lane support, PMIV0104 eusb2
     repeater support, QCS8300 eDP PHY support
   - Renesas RZ/T2H and RZ/N2H support and updates to driver for that
   - TI TCAN1051 phy support
   - Rockchip rk3588 dphy support, RK3528 combphy support

  Updates:
   - cadence updates for calibration and polling for ready and enabling
     of lower resolutions, runtime pm support,
   - Rockchip: enable U3 otg port
   - Renesas USXGMII mode support
   - Qualcomm UFS PHY and PLL regulator load support"

* tag 'phy-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (64 commits)
  phy: rockchip: phy-rockchip-inno-csidphy: add support for rk3588 variant
  phy: rockchip: phy-rockchip-inno-csidphy: allow for different reset lines
  phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0
  dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant
  dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required
  phy: cadence: cdns-dphy: Enable lower resolutions in dphy
  phy: renesas: r8a779f0-ether-serdes: add new step added to latest datasheet
  phy: renesas: r8a779f0-ether-serdes: add USXGMII mode
  phy: sophgo: Add USB 2.0 PHY driver for Sophgo CV18XX/SG200X
  dt-bindings: phy: Add Sophgo CV1800 USB phy
  phy: cadence: cdns-dphy: Update calibration wait time for startup state machine
  phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling
  phy: renesas: rcar-gen3-usb2: Fix ID check logic with VBUS valid
  dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051
  phy: lynx-28g: check return value when calling lynx_28g_pll_get
  phy: qcom: m31-eusb2: Fix the error log while enabling clock
  phy: rockchip: usbdp: Remove redundant ternary operators
  phy: renesas: rcar-gen3-usb2: Remove redundant ternary operators
  phy: hisilicon: Remove redundant ternary operators
  phy: qcom-qmp-ufs: Add PHY and PLL regulator load
  ...
 2025-10-06 10:34:22 -07:00
Michael Riesch
5072b8e98e dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant 
The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines.
Add the variant and allow for the additional reset.

While at it, fix the description of the first reset in order to avoid
confusion.

Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-3-a4f340a7f0cf@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-09-10 21:22:28 +05:30
Michael Riesch
c254815b02 dt-bindings: phy: rockchip-inno-csi-dphy: make power-domains non-required 
There are variants of the Rockchip Innosilicon CSI DPHY (e.g., the RK3568
variant) that are powered on by default as they are part of the ALIVE power
domain.
Remove 'power-domains' from the required properties in order to avoid false
positives.

Fixes: 22c8e0a69b ("dt-bindings: phy: add compatible for rk356x to rockchip-inno-csi-dphy")
Cc: stable@kernel.org
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-2-a4f340a7f0cf@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-09-10 21:22:28 +05:30
Inochi Amaoto
cdb2511bf3 dt-bindings: phy: Add Sophgo CV1800 USB phy 
The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
"VBUS_DET" to get the right operation mode. If this pin is not
connected, it only supports setting the mode manually.

Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250708063038.497473-2-inochiama@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-09-10 20:52:42 +05:30
Maud Spierings
3d13e378d4 dt-bindings: phy: ti,tcan104x-can: Document TI TCAN1051 
TCAN1051-Q1 Automotive Fault Protected CAN Transceiver with CAN FD

It is pretty much identical to the TCAN1042, add the compatible with
fallback on the TCAN1042.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250822-can_phy3-v1-1-73b3ba1690ee@gocontroll.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-09-01 21:48:39 +05:30
Yongxing Mou
ce48963596 dt-bindings: phy: Add eDP PHY compatible for QCS8300 
Add compatible string for the supported eDP PHY on QCS8300 platform.
QCS8300 have the same eDP PHY with SA8775P.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
Link: https://lore.kernel.org/r/20250730072725.1433360-1-quic_yongmou@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-20 22:24:28 +05:30
Lad Prabhakar
ab9c8aeb2d dt-bindings: phy: renesas,usb2-phy: Add RZ/T2H and RZ/N2H support 
Document the USB2 PHY controller for the Renesas RZ/T2H (r9a09g077) and
RZ/N2H (r9a09g087) SoCs. These SoCs share the same PHY block, which is
similar to the one on RZ/G2L but differs in clocks, resets, and register
bits. To account for these differences, a new compatible string
`renesas,usb2-phy-r9a09g077` is introduced.

The RZ/N2H SoC uses the same PHY as RZ/T2H, so it reuses the RZ/T2H
compatible string as a fallback.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250808215209.3692744-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-20 22:21:51 +05:30
Neil Armstrong
3bad7fe227 dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to allow mode-switch 
The QMP USB3/DP Combo PHY can work in 3 modes:
- DisplayPort Only
- USB3 Only
- USB3 + DisplayPort Combo mode

In order to switch between those modes, the PHY needs to receive
Type-C events, allow marking to the phy with the mode-switch
property in order to allow the PHY to Type-C events.

Reference usb-switch.yaml as a simpler way to allow the mode-switch
property instead of duplicating the property definition.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14S
Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-20 22:19:08 +05:30
Krishna Chaitanya Chundru
edafd4f3fd dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the SM8750 QMP PCIe PHY Gen3 x2 
Document the QMP PCIe PHY on the SM8750 platform.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250809-pakala-v1-1-abf1c416dbaa@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-19 13:00:56 +05:30
Luca Weiss
5edc405465 dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for PMIV0104 
Add a dt-bindings compatible string for the Qualcomm's PMIV0104 PMIC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-3-b6eff075c097@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-13 12:19:25 +05:30
Luca Weiss
791cfbe1c5 dt-bindings: phy: qcom,snps-eusb2-repeater: Document qcom,tune-res-fsdif 
Document the FS Differential TX Output Resistance Tuning value found on
the eUSB2 repeater on Qualcomm PMICs. The tuning values have special
meanings, being different offsets of the resistance to the default value
in Ohms but the exact meaning is not relevant here, as the correct
tuning is determined by hardware engineers to make sure the electrical
properties are as expected.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-1-b6eff075c097@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-13 12:19:25 +05:30
Yao Zi
b6c02cba32 dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variant 
Rockchip RK3528 ships one naneng-combphy which operates in either PCIe
or USB 3 mode. Document its compatible string.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250728102947.38984-5-ziyao@disroot.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-13 12:19:24 +05:30
Yao Zi
43a9fade69 dt-bindings: phy: rockchip: naneng-combphy: Add power-domains property 
Though isn't described in existing devicetrees, most Rockchip combphys
belong to a specific power-domain of the SoC. Taking RK3588 as example,
combphy 0 and combphy 2 belong to the PD_BUS domain. Document the
power-domains property to allow describing the information correctly
in devicetree.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-13 12:19:24 +05:30
Ziyue Zhang
aac1256a41 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings 
The gcc_aux_clk is required by the PCIe controller but not by the PCIe
PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
gcc_phy_aux_clk.

Fixes: fd2d4e4c19 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY")
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250725102231.3608298-2-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-12 21:38:14 +05:30
Rob Herring (Arm)
5cfdfc6238 dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraints 
In converting marvell,comphy-cp110 to schema, the constraints for clocks on
marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong,
and the phy nodes may have a 'connector' child node:

phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal']
phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$'
phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$'

Fixes: 50355ac70d ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema")
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-12 19:41:28 +05:30
Krzysztof Kozlowski
78a474b5a3 dt-bindings: phy: fsl,imx8mq-usb: Drop 'db' suffix duplicating dtschema 
A common property unit suffix '-db' was added to dtschema, thus
in-kernel bindings should not reference the type.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-2-457301523bb5@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-08-12 15:58:22 +05:30
Linus Torvalds
8582976acc Merge tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 
Pull phy updates from Vinod Koul:
 "New Support:

   - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31
     eUSB2 PHY driver

   - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support

   - Renesas RZ/V2N usb2-phy support

  Updates:

   - Bulk Yaml binding conversion By Rob H (too many to be listed)

   - cadence: Sierra PCIe, USB PHY multilink configuration support

   - Qualcomm refactoring of UFS PHY reset and UFS driver support for
     phy calibrate API"

* tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits)
  phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence
  dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema
  dt-bindings: phy: Convert ti,da830-usb-phy to DT schema
  dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example
  dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties
  phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870
  phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2
  phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence
  dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY
  dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible
  phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal
  phy: rockchip-pcie: Enable all four lanes if required
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615
  phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
  phy: qcom: m31-eusb2: drop registration printk
  phy: qcom: m31-eusb2: fix match data santity check
  phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P
  phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers
  dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values
  phy: mediatek: tphy: Cleanup and document slew calibration
  ...
 2025-08-01 12:31:50 -07:00
Frank Li
5d005cf799 dt-bindings: mfd: Convert lpc1850-creg-clk, pc1850-dmamux and phy-lpc18xx-usb-otg to YAML format 
Combine the following separate plain text based bindings to YAML:

  lpc1850-creg-clk.txt
  pc1850-dmamux.txt
  phy-lpc18xx-usb-otg.txt

Additional changes:

- remove label in example.
- remove dmamux consumer in example.
- remove clock consumer in example.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250602143612.943516-1-Frank.Li@nxp.com
Signed-off-by: Lee Jones <lee@kernel.org>
 2025-07-24 11:26:58 +01:00
Rob Herring (Arm)
4c3d05da59 dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema 
Convert the Broadcom Stingray USB PHY binding to DT schema format. It's
a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250627220126.214577-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 18:58:31 +05:30
Rob Herring (Arm)
99dd7faeb7 dt-bindings: phy: Convert ti,da830-usb-phy to DT schema 
Convert the TI DA830 USB PHY binding to DT schema format. Add "clocks"
and "clock-names" which are already in use. As they are always present,
make them required as well.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250627220107.214162-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 18:58:02 +05:30
Krzysztof Kozlowski
a91ec5efde dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example 
Examples should not have the 'status' property and 'okay' is anyway by
default.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250701063636.23872-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 18:49:00 +05:30
Liu Ying
429efeb190 dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties 
assigned-clock* properties can be used by default now, so allow them.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250707-dt-bindings-phy-mixel-mipi-dsi-phy-allow-assign-clock-properties-v1-1-5e34b257e1ef@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 18:48:31 +05:30
Luca Weiss
bb39f49a43 dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY 
Document the Synopsys eUSB2 PHY on the Milos SoC by using the SM8550 as
fallback.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-2-6c3224085eb6@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 18:05:45 +05:30
Ziyue Zhang
dfef90f298 dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 
QCS615 pcie phy only use 5 clocks, which are aux, cfg_ahb, ref,
ref_gen, pipe. So move "qcom,qcs615-qmp-gen3x1-pcie-phy" compatible
from 6 clocks' list to 5 clocks' list.

Fixes: 1e889f2bd8 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP PCIe PHY Gen3 x1")
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250703095630.669044-2-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-07-22 17:53:11 +05:30
Luca Weiss
db9f3e3ff9 dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values 
The reset default tuning value depends on the PMIC, so remove them from
the doc since they're not accurate for all PMICs.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250617-eusb2-repeater-tuning-v2-1-ed6c484f18ee@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-26 16:36:36 -07:00
Geert Uytterhoeven
05c6f31991 dt-bindings: phy: apm,xgene-phy: Remove trailing whitespace 
Remove trailing whitespace which hurts my eyes.

Fixes: 65ad0d068c ("dt-bindings: phy: Convert apm,xgene-phy to DT schema")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5b8e9b4f645bcac9d50059e513abba4db7e1aaea.1750771156.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-26 16:30:10 -07:00
Wesley Cheng
1166a2ca09 dt-bindings: phy: Add the M31 based eUSB2 PHY bindings 
On SM8750, the M31 eUSB2 PHY is being used to support USB2. Add the
binding definition for the PHY driver.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-2-d58de3b41d34@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 21:58:52 +05:30
Wesley Cheng
439cdb309c dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add SM8750 to QMP PHY 
Add an entry to the compatible field for SM8750 for the QMP combo PHY.
This handles the USB3 path for SM8750.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-1-d58de3b41d34@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 21:58:52 +05:30
Lad Prabhakar
00399bbe02 dt-bindings: phy: renesas,usb2-phy: Document RZ/V2N SoC support 
Document support for the USB2.0 phy found on the Renesas RZ/V2N
(R9A09G056) SoC. The USB2.0 phy is functionally identical to that on the
RZ/V2H(P) SoC, so no driver changes are needed. The existing
`renesas,usb2-phy-r9a09g057` compatible will be used as a fallback
for the RZ/V2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250528133858.168582-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 20:06:04 +05:30
Rob Herring (Arm)
4dcf1632d6 dt-bindings: phy: Convert Marvell MVEBU PHYs to DT schema 
Convert the Marvell Armada-375 USB and MVEBU SATA PHY binding to DT
schema format. It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250607212609.743346-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 20:05:04 +05:30
Rob Herring (Arm)
a5aa04619e dt-bindings: phy: Convert marvell,armada-380-comphy to DT schema 
Convert the Marvell Armada 38x combo PHY binding to DT schema format.
It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250607212541.742427-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 20:04:31 +05:30
Rob Herring (Arm)
222bb02ee6 dt-bindings: phy: Convert ti,keystone-usbphy to DT schema 
Convert the TI Keystone USB PHY binding to DT schema format. Drop the
"#address-cells" and "#size-cells" properties which don't make sense
without any child nodes.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212641.744683-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
35b629b28a dt-bindings: phy: Convert ti,dm816x-usb-phy to DT schema 
Convert the TI DM816x USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212634.744373-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
ea54c9d157 dt-bindings: phy: Convert st,spear1310-miphy to DT schema 
Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212629.744191-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
3ed7be1275 dt-bindings: phy: Convert qca,ar7100-usb-phy to DT schema 
Convert the Qualcomm-Atheros AR7100 USB PHY binding to DT schema format.
It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212625.744008-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
90647aa7e6 dt-bindings: phy: Convert motorola,mapphone-mdm6600 to DT schema 
Convert the Motorola Mapphone MDM6600 USB PHY binding to DT schema
format. It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212621.743859-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
351d6b70c1 dt-bindings: phy: Convert motorola,cpcap-usb-phy to DT schema 
Convert the Motorola CPCAP PMIC USB PHY binding to DT schema format.
It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212616.743674-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
fbcc493763 dt-bindings: phy: Convert marvell,mmp2-usb-phy to DT schema 
Convert the Marvell MMP2 USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212613.743515-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:02 +05:30
Rob Herring (Arm)
50355ac70d dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema 
Convert the Marvell CP110 combo PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212605.743176-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
08a9bc357a dt-bindings: phy: Convert marvell,berlin2-usb-phy to DT schema 
Convert the Marvell Berlin2 USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212554.742884-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
f4b522ce6a dt-bindings: phy: Convert marvell,berlin2-sata-phy to DT schema 
Convert the Marvell Berlin2 SATA PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212545.742617-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
85d6af3b73 dt-bindings: phy: Convert lantiq,ase-usb2-phy to DT schema 
Convert the Lantiq XWAY USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212537.742287-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
66acaf8f6b dt-bindings: phy: Convert img,pistachio-usb-phy to DT schema 
Convert the Imagination Pistachio USB PHY binding to DT schema format.
It's a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212531.742082-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
7cc5efcd94 dt-bindings: phy: Convert hisilicon,inno-usb2-phy to DT schema 
Convert the HiSilicon INNO USB2 PHY binding to DT schema format. It's a
straight forward conversion.

Add the undocumented "hisilicon,hi3798mv100-usb2-phy" compatible.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212527.741915-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
40f1d82142 dt-bindings: phy: Convert hisilicon,hi6220-usb-phy to DT schema 
Convert the HiSilicon HI6220 USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212524.741770-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30
Rob Herring (Arm)
1fac100a4d dt-bindings: phy: Convert hisilicon,hix5hd2-sata-phy to DT schema 
Convert the HiSilicon HIX5HD2 SATA PHY binding to DT schema format. It's
a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212520.741588-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2025-06-15 19:59:01 +05:30