Document two Loongson-1 boards:
- loongson,ls1b-demo: a board based on Loongson-1B
- loongson,cq-t300b: a board based on Loongson-1C
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Document MIPS 34Kc device tree bindings. It is used in the Realtek
RTL930x SoC.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Pull MIPS updates from Thomas Bogendoerfer:
- Added support for EcoNet platform
- Added support for parallel CPU bring up on EyeQ
- Other cleanups and fixes
* tag 'mips_6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (23 commits)
MIPS: loongson2ef: lemote-2f: add missing function prototypes
MIPS: loongson2ef: cs5536: add missing function prototypes
MIPS: SMP: Move the AP sync point before the calibration delay
mips: econet: Fix incorrect Kconfig dependencies
MAINTAINERS: Add entry for newly added EcoNet platform.
mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board
dt-bindings: vendor-prefixes: Add SmartFiber
mips: Add EcoNet MIPS platform support
dt-bindings: mips: Add EcoNet platform binding
MIPS: bcm63xx: nvram: avoid inefficient use of crc32_le_combine()
mips: dts: pic32: pic32mzda: Rename the sdhci nodename to match with common mmc-controller binding
MIPS: SMP: Move the AP sync point before the non-parallel aware functions
MIPS: Replace strcpy() with strscpy() in vpe_elfload()
MIPS: BCM63XX: Replace strcpy() with strscpy() in board_prom_init()
mips: ptrace: Improve code formatting and indentation
MIPS: SMP: Implement parallel CPU bring up for EyeQ
mips: Add -std= flag specified in KBUILD_CFLAGS to vdso CFLAGS
MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a
mips: dts: realtek: Add MDIO controller
MIPS: txx9: gpio: use new line value setter callbacks
...
The CM3.5 used on EyeQ6 reports that Hardware Cache Initialization is
complete, but in reality it's not the case. It also incorrectly
indicates that Hardware Cache Initialization is supported. This new
compatible string allows warning about this broken feature that cannot
be detected at runtime.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add device tree binding documentation for MIPS Coherence Manager. This
component enables support for SMP by providing each processor in the
system with a uniform view of memory. The Coherence Manager is
responsible for establishing the global ordering of requests from all
elements of the system and sending the correct data back to the
requester.
Based on the work of Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Document brcm,bmips-cbr-reg property.
Some SoC suffer from a BUG where CBR(Core Base Register)
address might be badly or never initialized by the Bootloader
or reading it from co-processor registers, if the system boots
from secondary CPU, results in invalid address.
The CBR address is always the same on the SoC.
Usage of this property is to give an address also in these broken
configuration/bootloader.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The Devicetree bindings document does not have to say in the title that
it is a "Devicetree binding", but instead just describe the hardware.
Drop trailing "Devicetree bindings" in various forms (also with
trailing full stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Document the Lantiq Xway SoC DMA Controller DT bindings.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Document the Lantiq Xway SoC series External Bus Unit (EBU) bindings.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Document the Lantiq Xway SoC series Clock Generation Unit (CGU) bindings.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Document the Lantiq Xway SoC series Power Management Unit (PMU) bindings.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Pull MIPS updates from Thomas Bogendoerfer:
- enable GCOV
- rework setup of protection map
- add support for more MSCC platforms
- add sysfs boardinfo for Loongson64
- enable KASLR for Loogson64
- add reset controller for BCM63xx
- cleanups and fixes
* tag 'mips_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (70 commits)
mips: fix Section mismatch in reference
MAINTAINERS: Add linux-mips mailing list to JZ47xx entries
MAINTAINERS: Remove JZ4780 DMA driver entry
MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.org
MIPS: Octeon: irq: Alloc desc before configuring IRQ
MIPS: mm: Add back define for PAGE_SHARED
MIPS: Select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL to enable sysfs memblock debug
mips: lib: uncached: fix non-standard usage of variable 'sp'
MIPS: DTS: img: Fix schema warnings for pwm-leds
MIPS: KASLR: Avoid endless loop in sync_icache if synci_step is zero
MIPS: Move memblock_dump_all() to the end of setup_arch()
MIPS: SMP-CPS: Add support for irq migration when CPU offline
MIPS: OCTEON: Don't add kernel sections into memblock allocator
MIPS: Don't round up kernel sections size for memblock_add()
MIPS: Enable GCOV
MIPS: configs: drop unused BACKLIGHT_GENERIC option
MIPS: Loongson64: Fix up reserving kernel memory range
MIPS: mm: Remove unused is_aligned_hugepage_range
MIPS: No need to check CPU 0 in {loongson3,bmips,octeon}_cpu_disable()
mips: cdmm: fix use-after-free in mips_cdmm_bus_discover
...
Pull MIPS updates from Thomas Bogendoerfer:
- removed support for PNX833x alias NXT_STB22x
- included Ingenic SoC support into generic MIPS kernels
- added support for new Ingenic SoCs
- converted workaround selection to use Kconfig
- replaced old boot mem functions by memblock_*
- enabled COP2 usage in kernel for Loongson64 to make use
of 16byte load/stores possible
- cleanups and fixes
* tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (92 commits)
MIPS: DEC: Restore bootmem reservation for firmware working memory area
MIPS: dec: fix section mismatch
bcm963xx_tag.h: fix duplicated word
mips: ralink: enable zboot support
MIPS: ingenic: Remove CPU_SUPPORTS_HUGEPAGES
MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit
MIPS: cpu-probe: introduce exclusive R3k CPU probe
MIPS: cpu-probe: move fpu probing/handling into its own file
MIPS: replace add_memory_region with memblock
MIPS: Loongson64: Clean up numa.c
MIPS: Loongson64: Select SMP in Kconfig to avoid build error
mips: octeon: Add Ubiquiti E200 and E220 boards
MIPS: SGI-IP28: disable use of ll/sc in kernel
MIPS: tx49xx: move tx4939_add_memory_regions into only user
MIPS: pgtable: Remove used PAGE_USERIO define
MIPS: alchemy: Share prom_init implementation
MIPS: alchemy: Fix build breakage, if TOUCHSCREEN_WM97XX is disabled
MIPS: process: include exec.h header in process.c
MIPS: process: Add prototype for function arch_dup_task_struct
MIPS: idle: Add prototype for function check_wait
...
1.Add bindings for Ingenic X1830 based board, prepare for later dts.
2.The CU1000-Neo board actually uses X1000E instead of X1000, so
the wrongly written "ingenic,x1000" in bindings should be changed
to "ingenic,x1000e", the corresponding dts file modification will
be made in a patch later in this series.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming
in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit
Loongson processors are called Loongson64C (C for classic, pre Loongson-
3A R4), and the new 64bit Loongson processors are called Loongson64G (G
for generic, Loongson-3A R4+). To keep consistency and make extensible,
we rename the classic "loongson3" prefix to "loongson64c", and the new
prefix for Loongson-3A R4+ will be "loongson64g".
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
While applying commit 9909bc43a2 ("dt-bindings: MIPS: Document Ingenic
SoCs binding.") I've messed up by "fixing" indentation in a C style,
which is wrong for yaml files. Replace tabs back to spaces.
Fixes: 9909bc43a2 ("dt-bindings: MIPS: Document Ingenic SoCs binding.")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
All devicetree board files list a compatible string for the SoC after
the compatible string of the board.
Enhance the YAML format so that these SoC compatible strings appear
aside each supported Ingenic board.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Rob Herring <robh@kernel.org>
