Commit Graph

62866 Commits

Author SHA1 Message Date
Daniel Vetter
c7581a414d drm: Use EOPNOTSUPP, not ENOTSUPP
- it's what we recommend in our docs:

https://dri.freedesktop.org/docs/drm/gpu/drm-uapi.html#recommended-ioctl-return-values

- it's the overwhelmingly used error code for "operation not
  supported", at least in drm core (slightly less so in drivers):

$ git grep EOPNOTSUPP -- drivers/gpu/drm/*c | wc -l
83
$ git grep ENOTSUPP -- drivers/gpu/drm/*c | wc -l
5

- include/linux/errno.h makes it fairly clear that these are for nfsv3
  (plus they also have error codes above 512, which is the block with
  some special behaviour ...)

/* Defined for the NFSv3 protocol */

If the above isn't reflecting current practice, then I guess we should
at least update the docs.

Noralf commented:

Ben Hutchings made this comment[1] in a thread about use of ENOTSUPP in
drivers:

  glibc's strerror() returns these strings for ENOTSUPP and EOPNOTSUPP
  respectively:

  "Unknown error 524"
  "Operation not supported"

So at least for errors returned to userspace EOPNOTSUPP makes sense.

José asked:

> Hopefully this will not break any userspace

None of the functions in drm_edid.c affected by this reach userspace,
it's all driver internal.

Same for the mipi function, that error code should be handled by
drivers. Drivers are supposed to remap "the hw is on fire" to EIO when
reporting up to userspace, but I think if a driver sees this it would
be a driver bug.
v2: Augment commit message with comments from Noralf and José

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Noralf Trønnes <noralf@tronnes.org>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Sean Paul <sean@poorly.run>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Andres Rodriguez <andresx7@gmail.com>
Cc: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904143942.31756-1-daniel.vetter@ffwll.ch
2019-09-06 11:56:48 +02:00
Dave Airlie
9a60b2990d Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next
single etnaviv fix for an error path.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Lucas Stach <l.stach@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/4ae00cfb47c8e6fffca5dbb45ae9370cd4e5eaf4.camel@pengutronix.de
2019-09-06 16:58:10 +10:00
Dave Airlie
9ed45a209a Merge tag 'drm-next-5.4-2019-08-30' of git://people.freedesktop.org/~agd5f/linux into drm-next
drm-next-5.4-2019-08-30:

amdgpu:
- Add DC support for Renoir
- Add some GPUVM hw bug workarounds
- add support for the smu11 i2c controller
- GPU reset vram lost bug fixes
- Navi1x powergating fixes
- Navi12 power fixes
- Renoir power fixes
- Misc bug fixes and cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190830212650.5055-1-alexander.deucher@amd.com
2019-09-06 16:40:28 +10:00
Dave Airlie
1e19ec6c3c Merge tag 'drm-misc-fixes-2019-09-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes
drm-misc-fixes for v5.3 final:
- Make ingenic panel type DPI insteado f unknown.
- Fixes for command line parser modes.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/606d87b2-1840-c893-eb30-d6c471c9e50a@linux.intel.com
2019-09-06 16:27:46 +10:00
Dave Airlie
7610bb0bde Merge branch 'vmwgfx-fixes-5.3' of git://people.freedesktop.org/~thomash/linux into drm-fixes
Single vmwgfx double free fix.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2019-09-06 16:24:56 +10:00
Weinan Li
4a5322560a drm/i915/gvt: update RING_START reg of vGPU when the context is submitted to i915
The guest may use this register to identify the running state of one
context. Emulate it as the value in context image as if the context runs
on the GPU hardware.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2019-09-06 13:39:09 +08:00
Xiaolin Zhang
0a3242bdb4 drm/i915/gvt: update vgpu workload head pointer correctly
when creating a vGPU workload, the guest context head pointer should
be updated correctly by comparing with the exsiting workload in the
guest worklod queue including the current running context.

in some situation, there is a running context A and then received 2 new
vGPU workload context B and A. in the new workload context A, it's head
pointer should be updated with the running context A's tail.

v2: walk through guest workload list in backward way.

Cc: stable@vger.kernel.org
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2019-09-06 13:38:51 +08:00
Gerd Hoffmann
84f6fec42e drm/virtio: fix command submission with objects but without fence.
Only call virtio_gpu_array_add_fence if we actually have a fence.

Fixes: da758d5196 ("drm/virtio: rework virtio_gpu_execbuffer_ioctl fencing")
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190904074828.32502-1-kraxel@redhat.com
2019-09-06 07:23:37 +02:00
José Roberto de Souza
aaef851083 drm/i915/mst: Do not hardcoded the crtcs that encoder can connect
Tiger Lake has up to 4 pipes so the mask would need to be 0xf instead of
0x7. Do not hardcode the mask so it allows the fake MST encoders to
connect to all pipes no matter how many the platform has.

Iterating over all pipes to keep consistent with intel_ddi_init().

Initialy this patch was replaced by commit 4eaceea3a0 ("drm/i915:
Fix DP-MST crtc_mask") but userspace it not correctly using
encoder.possible_crtcs and it was reverted by
commit e838bfa8e1 ("Revert "drm/i915: Fix DP-MST crtc_mask"")

Userspace should be fixed but it might take a while, so bringing this
patch back for now.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904230241.20638-2-jose.souza@intel.com
2019-09-05 10:13:53 -07:00
José Roberto de Souza
d10e0cb759 drm/i915: Apply FBC WA for TGL too
WA 1409120013 is also valid for TGL, so lets check for ">= 11".

BSpec: 52890

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904230241.20638-1-jose.souza@intel.com
2019-09-05 10:13:52 -07:00
Dan Carpenter
08b0c89160 drm/vmwgfx: Fix double free in vmw_recv_msg()
We recently added a kfree() after the end of the loop:

	if (retries == RETRIES) {
		kfree(reply);
		return -EINVAL;
	}

There are two problems.  First the test is wrong and because retries
equals RETRIES if we succeed on the last iteration through the loop.
Second if we fail on the last iteration through the loop then the kfree
is a double free.

When you're reading this code, please note the break statement at the
end of the while loop.  This patch changes the loop so that if it's not
successful then "reply" is NULL and we can test for that afterward.

Cc: <stable@vger.kernel.org>
Fixes: 6b7c3b86f0 ("drm/vmwgfx: fix memory leak when too many retries have occurred")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2019-09-05 14:44:28 +02:00
Lucas De Marchi
5b548ae63d drm/i915/tgl: add gen12 to stolen initialization
Add case for gen == 12 and add MISSING_CASE() for future gens. We were
already handling gen12 as the default, so this doesn't change the
current behavior.

BSpec: 19481 and 44980

Cc: CQ Tang <cq.tang@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-7-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-09-04 17:08:23 -07:00
Lucas De Marchi
8ffa4392a3 drm/i915/tgl: disable SAGV temporarily
SAGV is not currently working for Tiger Lake. We better disable it until
the implementation is stabilized and we can enable it.

HSDES: 1409542895 2208191909

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-6-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-09-04 17:08:11 -07:00
Lucas De Marchi
4444df6e20 drm/i915/tgl: move DP_TP_* to transcoder
Gen 12 onwards moves the DP_TP_* registers to be transcoder-based rather
than port-based. This adds the new register addresses and changes all
the callers to use the register saved in intel_dp->regs.*. This is
filled out when preparing to enable the port so we take into account if
we should use the transcoder or the port.

v2: reimplement by stashing the registers we want to access under
intel_dp->reg. Now they are initialized when enabling the port.
Ville suggested to store the transcoder to be used exclusively
by TGL+. After implementing I thought just storing the register directly
made it cleaner.

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-5-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-09-04 17:07:57 -07:00
Lucas De Marchi
e468ff0615 drm/i915: protect access to DP_TP_* on non-dp
DP_TP_{CTL,STATUS} should only be programmed when the encoder is intel_dp.
Checking its current usages intel_disable_ddi_buf() is the only
offender, with other places being protected by checks like
pipe_config->fec_enable that is only set by intel_dp.

v3 (José):
- Using intel_crtc_has_dp_encoder() instead of intel_encoder_is_dp()
(Ville)

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-4-jose.souza@intel.com
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-09-04 17:07:38 -07:00
José Roberto de Souza
8241cfbe67 drm/i915/tgl: Access the right register when handling PSR interruptions
For older gens PSR IIR and IMR have fixed addresses. From TGL onwards those
registers moved to each transcoder offset. The bits for the registers
are defined without an offset per transcoder as right now we have one
register per transcoder. So add a fake "trans_shift" when calculating
the bits offsets: it will be 0 for gen12+ and psr.transcoder otherwise.

v2 (Lucas): change the implementation to use trans_shift instead of
getting each bit value with a different macro

Cc: Imre Deak <imre.deak@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-3-jose.souza@intel.com
2019-09-04 17:03:35 -07:00
José Roberto de Souza
2f3b87124b drm/i915/psr: Only handle interruptions of the transcoder in use
It was enabling and checking PSR interruptions in every transcoder
while it should keep the interruptions on the non-used transcoders
masked.

While doing this it gives us trouble on Tiger Lake if we are
reading/writing to registers of disabled transcoders since from gen12
onwards the registers are relative to the transcoder. Instead of forcing
them ON to access those registers, just avoid the accesses as they are
not needed.

v2 (Lucas):
  - Explain why we can't keep accessing all transcoders
  - Remove TODO about extending the irq handling to multiple instances:
    when/if implementing multiple instances it's pretty clear by the
    singleton psr that it needs to be extended
  - Fix intel_psr_debug_set() calling psr_irq_control() with
    psr.transcoder not set yet (from Imre). Now we only set the debug
    register right away if psr is already enabled. Otherwise we just
    record the value to be set when enabling the source.
  - Do not depend on the value of TRANSCODER_A. Just be relative to it
    (from Imre)
  - handle psr error last so we don't schedule the work before handling
    the other flags

v3:
  - Adding a warning about setting reserverd bits on EDP_PSR_IMR

Cc: Imre Deak <imre.deak@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904213419.27547-2-jose.souza@intel.com
2019-09-04 17:03:34 -07:00
Linus Walleij
88537ddbbe drm/mcde: Fix DSI transfers
There were bugs in the DSI transfer (read and write) function
as it was only tested with displays ever needing a single byte
to be written. Fixed it up and tested so we can now write
messages of up to 16 bytes and read up to 4 bytes from the
display.

Tested with a Sony ACX424AKP display: this display now self-
identifies and can control backlight in command mode.

Reported-by: kbuild test robot <lkp@intel.com>
Fixes: 5fc537bfd0 ("drm/mcde: Add new driver for ST-Ericsson MCDE")
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190903170804.17053-1-linus.walleij@linaro.org
2019-09-04 22:05:34 +02:00
Daniel Vetter
ab01691498 drm/i915: disable set/get_tiling ioctl on gen12+
The cpu (de)tiler hw is gone, this stopped being useful. Plus it never
supported any of the fancy new tiling formats, which means userspace
also stopped using the magic side-channel this provides.

This would totally break a lot of the igts, but they're already broken
for the same reasons as userspace on gen12 would be.

v2: Look at ggtt->num_fences instead, that also avoids the need for a
comment (Chris). This also means that gen12 support really needs to
make sure num_fences is set to 0. There is a patch for that, but it
checks for HAS_MAPPABLE_APERTURE, which I'm not sure is the right
thing really. Adding relevant people.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190820195451.15671-1-daniel.vetter@ffwll.ch
2019-09-04 12:31:12 -07:00
Rob Clark
9f614197c7 drm/msm: Use the correct dma_sync calls harder
Looks like the dma_sync calls don't do what we want on armv7 either.
Fixes:

  Unable to handle kernel paging request at virtual address 50001000
  pgd = (ptrval)
  [50001000] *pgd=00000000
  Internal error: Oops: 805 [#1] SMP ARM
  Modules linked in:
  CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.3.0-rc6-00271-g9f159ae07f07 #4
  Hardware name: Freescale i.MX53 (Device Tree Support)
  PC is at v7_dma_clean_range+0x20/0x38
  LR is at __dma_page_cpu_to_dev+0x28/0x90
  pc : [<c011c76c>]    lr : [<c01181c4>]    psr: 20000013
  sp : d80b5a88  ip : de96c000  fp : d840ce6c
  r10: 00000000  r9 : 00000001  r8 : d843e010
  r7 : 00000000  r6 : 00008000  r5 : ddb6c000  r4 : 00000000
  r3 : 0000003f  r2 : 00000040  r1 : 50008000  r0 : 50001000
  Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
  Control: 10c5387d  Table: 70004019  DAC: 00000051
  Process swapper/0 (pid: 1, stack limit = 0x(ptrval))

Signed-off-by: Rob Clark <robdclark@chromium.org>
Fixes: 3de433c5b3 ("drm/msm: Use the correct dma_sync calls in msm_gem")
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-09-04 10:05:05 -07:00
Ville Syrjälä
e838bfa8e1 Revert "drm/i915: Fix DP-MST crtc_mask"
This reverts commit 4eaceea3a0.

Several userspace clients (modesetting ddx and mutter+wayland at least)
handle encoder.possible_crtcs incorrectly. What they essentially do is
the following:

possible_crtcs = ~0;
for_each_possible_encoder(connector)
	possible_crtcs &= encoder->possible_crtcs;

Ie. they calculate the intersection of the possible_crtcs
for the connector when they really should be calculating the
union instead.

In our case each MST encoder now has just one unique bit set,
and so the intersection is always zero. The end result is that
MST connectors can't be lit up because no crtc can be found to
drive them.

I've submitted a fix for the modesetting ddx [1], and complained
on #wayland about mutter, so hopefully the situation will improve
in the future. In the meantime we have regression, and so must go
back to the old way of misconfiguring possible_crtcs in the kernel.

[1] https://gitlab.freedesktop.org/xorg/xserver/merge_requests/277

Cc: Jonas Ådahl <jadahl@gmail.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111507
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190903154018.26357-1-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-09-04 18:46:40 +03:00
Denis Efremov
c044e86f54 drm/msm: remove unlikely() from WARN_ON() conditions
"unlikely(WARN_ON(x))" is excessive. WARN_ON() already uses unlikely()
internally.

Signed-off-by: Denis Efremov <efremov@linux.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>
Cc: Joe Perches <joe@perches.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-04 08:42:45 -07:00
Masahiro Yamada
54b8ae66ae kbuild: change *FLAGS_<basetarget>.o to take the path relative to $(obj)
Kbuild provides per-file compiler flag addition/removal:

  CFLAGS_<basetarget>.o
  CFLAGS_REMOVE_<basetarget>.o
  AFLAGS_<basetarget>.o
  AFLAGS_REMOVE_<basetarget>.o
  CPPFLAGS_<basetarget>.lds
  HOSTCFLAGS_<basetarget>.o
  HOSTCXXFLAGS_<basetarget>.o

The <basetarget> is the filename of the target with its directory and
suffix stripped.

This syntax comes into a trouble when two files with the same basename
appear in one Makefile, for example:

  obj-y += foo.o
  obj-y += dir/foo.o
  CFLAGS_foo.o := <some-flags>

Here, the <some-flags> applies to both foo.o and dir/foo.o

The real world problem is:

  scripts/kconfig/util.c
  scripts/kconfig/lxdialog/util.c

Both files are compiled into scripts/kconfig/mconf, but only the
latter should be given with the ncurses flags.

It is more sensible to use the relative path to the Makefile, like this:

  obj-y += foo.o
  CFLAGS_foo.o := <some-flags>
  obj-y += dir/foo.o
  CFLAGS_dir/foo.o := <other-flags>

At first, I attempted to replace $(basetarget) with $*. The $* variable
is replaced with the stem ('%') part in a pattern rule. This works with
most of cases, but does not for explicit rules.

For example, arch/ia64/lib/Makefile reuses rule_as_o_S in its own
explicit rules, so $* will be empty, resulting in ignoring the per-file
AFLAGS.

I introduced a new variable, target-stem, which can be used also from
explicit rules.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Marc Zyngier <maz@kernel.org>
2019-09-04 23:12:50 +09:00
Chris Wilson
9d7b01e935 drm/i915: Restore relaxed padding (OCL_OOB_SUPPRES_ENABLE) for skl+
This bit was fliped on for "syncing dependencies between camera and
graphics". BSpec has no recollection why, and it is causing
unrecoverable GPU hangs with Vulkan compute workloads.

From BSpec, setting bit5 to 0 enables relaxed padding requirements for
buffers, 1D and 2D non-array, non-MSAA, non-mip-mapped linear surfaces;
and *must* be set to 0h on skl+ to ensure "Out of Bounds" case is
suppressed.

Reported-by: Jason Ekstrand <jason@jlekstrand.net>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110998
Fixes: 8424171e13 ("drm/i915/gen9: h/w w/a: syncing dependencies between camera and graphics")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: denys.kostin@globallogic.com
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.1+
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190904100707.7377-1-chris@chris-wilson.co.uk
2019-09-04 12:43:20 +01:00
Christoph Hellwig
212836a992 dma-mapping: remove dma_{alloc,free,mmap}_writecombine
We can already use DMA_ATTR_WRITE_COMBINE or the _wc prefixed version,
so remove the third way of doing things.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2019-09-04 11:13:19 +02:00
Swati Sharma
4bb6a9d5d9 drm/i915/display: Extract glk_read_luts()
For glk, add hw read out to create hw blob of gamma
lut values.

v4: -No need to initialize *blob [Jani]
    -Removed right shifts [Jani]
    -Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally within the
     function [Ville]
    -Renamed glk_get_color_config() to glk_read_luts() [Ville]
    -Added degamma validation [Ville]
v9: -80 character limit [Uma]
    -Made read func para as const [Ville, Uma]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-8-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:50 +03:00
Swati Sharma
6b97b118d4 drm/i915/display: Extract ilk_read_luts()
For ilk, add hw read out to create hw blob of gamma
lut values.

v4:  -No need to initialize *blob [Jani]
     -Removed right shifts [Jani]
     -Dropped dev local var [Jani]
v5:  -Returned blob instead of assigning it internally within the
      function [Ville]
     -Renamed ilk_get_color_config() to ilk_read_luts() [Ville]
v9:  -80 character limit [Uma]
     -Made read func para as const [Ville, Uma]
     -Renamed ilk_read_gamma_lut() to ilk_read_lut_10() [Uma, Ville]
v10: -Made ilk_read_luts() static [Jani]
     -ilk_load_lut_10 has lut_size, not (lut_size - 1) [Jani]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-7-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:47 +03:00
Swati Sharma
1af2238382 drm/i915/display: Extract i9xx_read_luts()
For the legacy(gen < 4) gamma, add hw read out to create hw blob of gamma
lut values. Also, add function intel_color_lut_pack to convert hw value
with given bit precision to lut property val.

v4:  -No need to initialize *blob [Jani]
     -Removed right shifts [Jani]
     -Dropped dev local var [Jani]
v5:  -Returned blob instead of assigning it internally within the
      function [Ville]
     -Renamed function i9xx_get_color_config() to i9xx_read_luts()
     -Renamed i9xx_get_config_internal() to i9xx_read_lut_8() [Ville]
v9:  -Change in commit message [Jani, Uma]
     -Wrap commit within 75 characters [Uma]
     -Use macro for 256 [Uma]
     -Made read func para as const [Ville, Uma]
v10: -Made i9xx_read_luts() static [Jani]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-6-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:45 +03:00
Swati Sharma
7e764059cf drm/i915/display: Add macro to compare gamma hw/sw lut
Add macro to compare hw/sw gamma lut values. First need to
check whether hw/sw gamma mode matches or not. If not
no need to compare lut values, if matches then only compare
lut entries.

v5: -Called PIPE_CONF_CHECK_COLOR_LUT inside if (!adjust) [Jani]
    -Added #undef PIPE_CONF_CHECK_COLOR_LUT [Jani]
v8: -Added check for gamma mode before gamma lut entry comparison
     [Jani]
    -Split patch 3 into 4 patches

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-5-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:35 +03:00
Swati Sharma
e9c8f59144 drm/i915/display: Add func to compare hw/sw gamma lut
Add func intel_color_lut_equal() to compare hw/sw gamma
lut values. Since hw/sw gamma lut sizes and lut entries comparison
will be different for different gamma modes, add gamma mode dependent
checks.

v3:  -Rebase
v4:  -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani]
     -Added the default label above the correct label [Jani]
     -Corrected smatch warn "variable dereferenced before check"
      [Dan Carpenter]
v5:  -Added condition (!blob1 && !blob2) return true [Jani]
v6:  -Made patch11 as patch3 [Jani]
v8:  -Split patch 3 into 4 patches
     -Optimized blob check condition [Ville]
v9:  -Exclude spilt gamma mode (bdw and ivb platforms)
      as there is exception in way gamma values are written in
      hardware [Ville]
     -Added exception made in commit [Uma]
     -Dropped else, character limit and indentation [Uma]
     -Added multi segmented gama mode for icl+ platforms [Uma]
v10: -Dropped multi segmented mode for icl+ platforms [Jani]
     -Removed references of sw and hw state in compare code [Jani]
     -Dropped inline from func [Jani]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-4-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:30 +03:00
Swati Sharma
145450f6a4 drm/i915/display: Add func to get gamma bit precision
Each platform supports different gamma modes and each gamma mode
has different bit precision. Here bit precision corresponds
to number of bits the hw LUT supports.

Add func per platform to return bit precision corresponding to gamma mode
which will be later used as a parameter in lut comparison function
intel_color_lut_equal().

This is done for legacy, ilk, glk and their variant platforms.

v6:  -Added func intel_color_get_bit_precision() to get bit precision for
      gamma and degamma lut readout depending upon platform and
      corresponding to load_luts() [Ankit]
     -Made patch11 as patch3 [Jani]
v7:  -Renamed func intel_color_get_bit_precision() to
      intel_color_get_gamma_bit_precision()
     -Added separate function/platform for gamma bit precision [Ville]
     -Corrected checkpatch warnings
v8:  -Split patch 3 into 4 separate patches
v9:  -Changed commit message, gave more info [Uma]
     -Added precision func for icl+ platform
v10: -Removed precision func for chv and icl+ platforms [Jani]
     -Added gamma_enable check once [Jani]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-2-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:22 +03:00
Swati Sharma
b1a4383d1e drm/i915/display: Add debug log for color parameters
Add debug log for color related parameters like gamma_mode, gamma_enable,
csc_enable, etc inside intel_dump_pipe_config().

v6: -Added debug log for color para in intel_dump_pipe_config [Jani]
v7: -Split patch 3 into 4 patches
v8: -Corrected alignment [Uma]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-3-git-send-email-swati2.sharma@intel.com
2019-09-04 11:55:17 +03:00
Gerd Hoffmann
f0c6cef7e7 drm/virtio: add worker for object release
Move object release into a separate worker.  Releasing objects requires
sending commands to the host.  Doing that in the dequeue worker will
cause deadlocks in case the command queue gets filled up, because the
dequeue worker is also the one which will free up slots in the command
queue.

Reported-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190830060116.10476-1-kraxel@redhat.com
2019-09-04 06:54:12 +02:00
Gerd Hoffmann
12afce08ed drm/virtio: add fence sanity check
Make sure we don't leak half-initialized fences outside the driver.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-19-kraxel@redhat.com
2019-09-04 06:54:12 +02:00
Gerd Hoffmann
6e3372508d drm/virtio: drop virtio_gpu_object_{reserve, unreserve}
No users left.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-18-kraxel@redhat.com
2019-09-04 06:54:12 +02:00
Gerd Hoffmann
fe16537ddb drm/virtio: drop virtio_gpu_object_{ref,unref}
No users left.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-17-kraxel@redhat.com
2019-09-04 06:54:11 +02:00
Gerd Hoffmann
2e0d9ee457 drm/virtio: remove virtio_gpu_alloc_object
Thin wrapper around virtio_gpu_object_create(),
but calling that directly works equally well.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-16-kraxel@redhat.com
2019-09-04 06:54:11 +02:00
Gerd Hoffmann
c66df701e7 drm/virtio: switch from ttm to gem shmem helpers
virtio-gpu basically needs a sg_table for the bo, to tell the host where
the backing pages for the object are.  So the gem shmem helpers are a
perfect fit.  Some drm_gem_object_funcs need thin wrappers to update the
host state, but otherwise the helpers handle everything just fine.

Once the fencing was sorted the switch was surprisingly easy and for the
most part just removing the ttm code.

v4: fix drm_gem_object_funcs name.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-15-kraxel@redhat.com
2019-09-04 06:54:11 +02:00
Gerd Hoffmann
ad75f4f057 drm/virtio: drop virtio_gpu_object_list_validate/virtio_gpu_unref_list
No users left.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-14-kraxel@redhat.com
2019-09-04 06:54:11 +02:00
Gerd Hoffmann
93c38d15ee drm/virtio: rework virtio_gpu_cmd_context_{attach, detach}_resource
Switch to the virtio_gpu_array_* helper workflow.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-13-kraxel@redhat.com
2019-09-04 06:54:10 +02:00
Gerd Hoffmann
3d3bdbc0bd drm/virtio: rework virtio_gpu_transfer_to_host_ioctl fencing
Switch to the virtio_gpu_array_* helper workflow.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-12-kraxel@redhat.com
2019-09-04 06:54:10 +02:00
Gerd Hoffmann
375f156a5e drm/virtio: rework virtio_gpu_transfer_from_host_ioctl fencing
Switch to the virtio_gpu_array_* helper workflow.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-11-kraxel@redhat.com
2019-09-04 06:54:10 +02:00
Gerd Hoffmann
e2324300f4 drm/virtio: rework virtio_gpu_object_create fencing
Rework fencing workflow.  Stop using ttm helpers, use the
virtio_gpu_array_* helpers instead.

Due to using the gem reservation object it is initialized and ready for
use before calling ttm_bo_init.  So we can simply use the standard
fencing workflow and drop the tricky logic which checks whenever the
command is in flight still.

v6: rewrite most of the patch.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-10-kraxel@redhat.com
2019-09-04 06:54:09 +02:00
Gerd Hoffmann
da758d5196 drm/virtio: rework virtio_gpu_execbuffer_ioctl fencing
Rework fencing workflow, starting with virtio_gpu_execbuffer_ioctl.
Stop using ttm helpers, use the virtio_gpu_array_* helpers (which work
on the reservation objects directly) instead.

Also store the object array in struct virtio_gpu_vbuffer, so we
explicitly keep a reference of all buffers used instead of depending
on ttm_bo_put() checking whenever the object is actually idle before
releasing it.

New workflow:

 (1) All gem objects needed by a command are added to a
     virtio_gpu_object_array.
 (2) All reservation objects will be locked (virtio_gpu_array_lock_resv).
 (3) virtio_gpu_fence_emit() completes fence initialization.
 (4) fence gets added to the objects, reservation objects are unlocked
     (virtio_gpu_array_add_fence, virtio_gpu_array_unlock_resv).
 (5) virtio command is submitted to the host.
 (6) The completion callback (virtio_gpu_dequeue_ctrl_func)
     will drop object references and free virtio_gpu_object_array.

v6: rewrite most of the patch.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-9-kraxel@redhat.com
2019-09-04 06:54:09 +02:00
Gerd Hoffmann
98abe21d07 drm/virtio: add virtio_gpu_object_array & helpers
Some helper functions to manage an array of gem objects.

v9: use dma_resv_lock_interruptible.
v6:
 - add ticket to struct virtio_gpu_object_array.
 - add virtio_gpu_array_{lock,unlock}_resv helpers.
 - add virtio_gpu_array_add_fence helper.
v5: some small optimizations (Chia-I Wu).
v4: make them virtio-private instead of generic helpers.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-8-kraxel@redhat.com
2019-09-04 06:54:09 +02:00
Gerd Hoffmann
cde14fd4a6 drm/virtio: remove ttm calls from in virtio_gpu_object_{reserve, unreserve}
Call reservation_object_* directly instead
of using ttm_bo_{reserve,unreserve}.

v4: check for EINTR only.
v3: check for EINTR too.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-7-kraxel@redhat.com
2019-09-04 06:54:09 +02:00
Gerd Hoffmann
23a0e88eba drm/virtio: drop no_wait argument from virtio_gpu_object_reserve
All callers pass no_wait = false.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-6-kraxel@redhat.com
2019-09-04 06:54:08 +02:00
Gerd Hoffmann
191ab21995 drm/virtio: remove virtio_gpu_object_wait
No users left.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-5-kraxel@redhat.com
2019-09-04 06:54:08 +02:00
Gerd Hoffmann
620f9c5e30 drm/virtio: simplify cursor updates
No need to do the reservation dance,
we can just wait on the fence directly.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-4-kraxel@redhat.com
2019-09-04 06:54:08 +02:00
Gerd Hoffmann
29cf12394c drm/virtio: switch virtio_gpu_wait_ioctl() to gem helper.
Use drm_gem_reservation_object_wait() in virtio_gpu_wait_ioctl().
This also makes the ioctl run lockless.

v9: fix return value.
v5: handle lookup failure.
v2: use reservation_object_test_signaled_rcu for VIRTGPU_WAIT_NOWAIT.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20190829103301.3539-3-kraxel@redhat.com
2019-09-04 06:54:08 +02:00