mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-11 01:53:20 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,182,511 Commits 1 Branch 930 Tags
1e098dec61ba342c8cebbfdf0fcdcd9ce54f7fa1
Commit Graph

9298 Commits

Author SHA1 Message Date
Dmitry Baryshkov
3f1c24b967 clk: qcom: gcc-msm8939: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-7-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
a2a796c1d6 clk: qcom: camcc-sm8450: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-6-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
17f0b48f8d clk: qcom: camcc-sc7280: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-5-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
0e042233bd clk: qcom: dispcc-sm6375: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-4-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
a9e46af171 clk: qcom: dispcc-sc7180: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-3-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Dmitry Baryshkov
5c0df30cb3 clk: qcom: dispcc-sm8450: switch to parent_hws 
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-2-dmitry.baryshkov@linaro.org
 2023-01-10 15:58:59 -06:00
Neil Armstrong
90114ca114 clk: qcom: add SM8550 DISPCC driver 
Add support for the display clock controller found in SM8550
based devices.

This clock controller feeds the Multimedia Display SubSystem (MDSS).
This driver is based on the SM8450 support.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-3-8a03d348c572@linaro.org
 2023-01-10 12:19:19 -06:00
Neil Armstrong
494162c739 clk: qcom: clk-alpha-pll: define alias of LUCID OLE reset ops to EVO reset ops 
Add an alias of LUCID OLE reset ops to EVO reset ops similar
to other aliases.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-2-8a03d348c572@linaro.org
 2023-01-10 12:19:19 -06:00
Bjorn Andersson
d578dd8045 Merge tag '1672656511-1931-1-git-send-email-quic_akhilpo@quicinc.com' into clk-for-6.3 
v6.2-rc1 + 1672656511-1931-1-git-send-email-quic_akhilpo@quicinc.com
 2023-01-10 11:08:13 -06:00
Akhil P Oommen
8b6af3b58c clk: qcom: gdsc: Support 'synced_poweroff' genpd flag 
Add support for the newly added 'synced_poweroff' genpd flag. This allows
some clients (like adreno gpu driver) to request gdsc driver to ensure
a votable gdsc (like gpucc cx gdsc) has collapsed at hardware.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102161757.v5.2.Ic128c1df50b7fc9a6b919932a3b41a799b5ed5e8@changeid
 2023-01-10 11:07:10 -06:00
Abel Vesa
99c0f7d35c clk: qcom: sdm845: Use generic clk_sync_state_disable_unused callback 
By adding the newly added clk_sync_state_disable_unused as sync_state
callback to all sdm845 clock providers, we make sure that no clock
belonging to these providers gets disabled on clk_disable_unused,
but rather they are disabled on sync_state, when it is safe, since
all the consumers build as modules have had their chance of enabling
their own clocks.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227204528.1899863-2-abel.vesa@linaro.org
 2023-01-10 11:04:50 -06:00
Abel Vesa
26b36df751 clk: Add generic sync_state callback for disabling unused clocks 
There are unused clocks that need to remain untouched by clk_disable_unused,
and most likely could be disabled later on sync_state. So provide a generic
sync_state callback for the clock providers that register such clocks.
Then, use the same mechanism as clk_disable_unused from that generic
callback, but pass the device to make sure only the clocks belonging to
the current clock provider get disabled, if unused. Also, during the
default clk_disable_unused, if the driver that registered the clock has
the generic clk_sync_state_disable_unused callback set for sync_state,
skip disabling its clocks.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227204528.1899863-1-abel.vesa@linaro.org
 2023-01-10 11:04:50 -06:00
Bartosz Golaszewski
ce273e690d clk: qcom: rpmh: add clocks for sa8775p 
Extend the driver with a description of clocks for sa8775p platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109174511.1740856-6-brgl@bgdev.pl
 2023-01-10 10:19:38 -06:00
Yang Yingliang
3b36713d69 clk: qcom: krait-cc: fix wrong pointer passed to IS_ERR() 
It should be 'mux' passed to IS_ERR/PTR_ERR().

Fixes: 56a655e1c4 ("clk: qcom: krait-cc: convert to parent_data API")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104080235.1748953-1-yangyingliang@huawei.com
 2023-01-10 09:29:02 -06:00
Claudiu Beznea
80519d8ccc clk: at91: do not compile dt-compat.c for sama7g5 and sam9x60 
There is no need to have dt-compat.c compiled for SAMA7G5 and SAM9X60
as there is no in kernel device tree that could use it. Thus avoid
compiling dt-compat.c for them.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-4-claudiu.beznea@microchip.com
 2023-01-09 14:05:41 +02:00
Claudiu Beznea
68b3b6f177 clk: at91: mark ddr clocks as critical 
Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
 2023-01-09 14:05:41 +02:00
Fabien Poussin
e6f2ffeaf5 clk: sunxi-ng: d1: Add CAN bus gates and resets 
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Signed-off-by: Fabien Poussin <fabien.poussin@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221231231429.18357-7-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 22:06:10 +01:00
András Szemző
6ec1c73f1b clk: sunxi-ng: d1: Mark cpux clock as critical 
Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU.
In that case, the CPUs are driven from the 'cpux' clock, so it needs
to be marked as critical, since there is no consumer when DVFS is
disabled. This matches the drivers for other SoCs, and the "riscv"
clock in this driver.

Signed-off-by: András Szemző <szemzo.andras@gmail.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221231231429.18357-5-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 22:06:10 +01:00
Samuel Holland
f1404c72b6 clk: sunxi-ng: d1: Allow building for R528/T113 
Allwinner released some 32-bit ARM (sun8i) SoCs which use the same CCU
as D1. Allow them to reuse the driver.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221231231429.18357-4-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 22:06:10 +01:00
Samuel Holland
0ff347db4c clk: sunxi-ng: Move SoC driver conditions to dependencies 
Do not duplicate the same expression on the `default` line, so the two
lines do not need to be kept in sync. Drivers stay disabled under
COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU.

Three drivers had no conditions.
 - SUN6I_RTC_CCU and SUN8I_DE2_CCU are used on current hardware
   regardless of CPU architecture.
 - SUN8I_R_CCU is only used on pre-H6 SoCs, which means no RISCV SoCs.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221231231429.18357-3-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 22:06:10 +01:00
Samuel Holland
a26dc096f6 clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies 
SUNXI_CCU already depends on ARCH_SUNXI, so adding the dependency to
individual SoC drivers is redundant. Drivers stay disabled under
COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221231231429.18357-2-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 22:06:10 +01:00
Samuel Holland
657f477a89 clk: sunxi-ng: Avoid computing the rate twice 
The ccu_*_find_best() functions already compute a best_rate at the same
time as the other factors. Return this value so the caller does not need
to duplicate the computation.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20221231173055.42384-1-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 21:55:17 +01:00
Samuel Holland
5ee541ae71 clk: sunxi-ng: h3/h5: Model H3 CLK_DRAM as a fixed clock 
The DRAM controller clock is only allowed to change frequency while the
DRAM chips are in self-refresh. To support this, changes to the CLK_DRAM
mux and divider have no effect until acknowledged by the memory dynamic
frequency scaling (MDFS) hardware inside the DRAM controller. (There is
a SDRCLK_UPD bit in DRAM_CFG_REG which should serve a similar purpose,
but this bit actually does nothing.)

However, the MDFS hardware in H3 appears to be broken. Triggering a
frequency change using the procedure from similar SoCs (A64/H5) hangs
the hardware. Additionally, the vendor BSP specifically avoids using the
MDFS hardware on H3, instead performing all DRAM PHY parameter updates
and resets in software.

Thus, it is effectively impossible to change the CLK_DRAM mux/divider,
so those features should not be modeled. Add CLK_SET_RATE_PARENT so
frequency changes apply to PLL_DDR instead.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221229042230.24532-1-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 21:54:09 +01:00
Randy Dunlap
5dc6470273 clk: sunxi-ng: fix ccu_mmc_timing.c kernel-doc issues 
Use '-' to separate the function name and its description.
Use '%' on constants in kernel-doc notation.
Use the kernel-doc Return: format for function return values.

Fixes this warning:
ccu_mmc_timing.c:21: warning: No description found for return value of 'sunxi_ccu_set_mmc_timing_mode'

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Yang Li <yang.lee@linux.alibaba.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@lists.linux.dev
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20221122184844.6794-1-rdunlap@infradead.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
 2023-01-08 21:32:26 +01:00
Abel Vesa
e9a7b78b20 clk: qcom: Add TCSR clock driver for SM8550 
The TCSR clock controller found on SM8550 provides refclks
for PCIE, USB and UFS. Add clock driver for it.

This patch is based on initial code downstream.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-5-abel.vesa@linaro.org
 2023-01-06 11:10:37 -06:00
Abel Vesa
478a573be7 clk: qcom: rpmh: Add support for SM8550 rpmh clocks 
Adds the RPMH clocks present in SM8550 SoC.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-4-abel.vesa@linaro.org
 2023-01-06 11:10:37 -06:00
Marijn Suijten
c045154c30 clk: qcom: dispcc-sm6125: Fix compatible string to match bindings 
According to generic rules the SoC name should be first:

        arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: clock-controller@5f00000: compatible: 'oneOf' conditional failed, one must be fixed:
                'qcom,dispcc-sm6125' does not match '^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$'

And this is already reflected by the bindings submitted prior to the
addition of this driver.  Any DTS following these rules will end up with
a non-probing driver because of this mismatch.

Fixes: 6e87c8f074 ("clk: qcom: Add display clock controller driver for SM6125")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222210140.278077-1-marijn.suijten@somainline.org
 2022-12-29 10:57:25 -06:00
Konrad Dybcio
80f5451d9a clk: qcom: Add camera clock controller driver for SM6350 
Add support for the camera clock controller found on SM6350.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213152617.296426-2-konrad.dybcio@linaro.org
 2022-12-28 12:32:51 -06:00
Dmitry Baryshkov
e330694136 clk: qcom: smd-rpm: remove usage of platform name 
Now that all clocks have individual names, remove the names of SoCs from
the SMD RPM clock definitions. Replace it with the common clk_smd_rpm_ prefix.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-20-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:15 -06:00
Dmitry Baryshkov
5982612946 clk: qcom: smd-rpm: rename SMD_RPM_BUS clocks 
Add special macro for the clocks of QCOM_SMD_RPM_BUS_CLK type. Use it to
insert the _bus_N part into the clock symbol name. The system (and
userspace) name of these clocks remains intact.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-19-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:15 -06:00
Dmitry Baryshkov
2b8ddf6b82 clk: qcom: smd-rpm: rename the qcm2290 rf_clk3 clocks 
Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it
from the common (19.2 MHz) rf_clk3. The system (and userspace) name of
these clocks remains intact.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-18-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:15 -06:00
Dmitry Baryshkov
74419b8869 clk: qcom: smd-rpm: rename SMD_RPM_BRANCH clock symbols 
To ease distinguishing between branch and non-branch clocks (e.g.
aggre1_noc, aggre2_noc and qdss) add '_branch' to all SMD_RPM_BRANCH*
clocks. The system (and userspace) name of these clocks remains intact.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-17-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:15 -06:00
Dmitry Baryshkov
e3c88f236e clk: qcom: smd-rpm: simplify SMD_RPM/_BRANCH/_QDSS clock definitions 
Remove the duplication between the names of the normal and active-only
clocks by moving common sufixes to the clock definition macros. This
simplifies adding new clock definitions and reviewing existing defs.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-16-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:15 -06:00
Dmitry Baryshkov
ff2cd7401d clk: qcom: smd-rpm: simplify XO_BUFFER clocks definitions 
Remove the duplication between the names of the normal and active-only
XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to
add _a suffix.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-15-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
786f8d18a8 clk: qcom: smd-rpm: rename some msm8974 active-only clocks 
Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to
move the _a suffix to the end of the name. This follows the pattern used
by other active-only clocks and thus makes it possible to simplify clock
definitions.
This changes the userspace-visible names for this clocks.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-14-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
57d44ccecc clk: qcom: smd-rpm: move clock definitions together 
To ease review and reuse group all clock definitions together.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-13-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
262caca770 clk: qcom: smd-rpm: fix alignment of line breaking backslashes 
The commit 52a436e0b7 ("clk: qcom: smd-rpm: Switch to parent_data")
introduced ragged right alignment for the line breaking backslash. Fix
it to make the code look consistently.

Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-12-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
406f0577b0 clk: qcom: smd-rpm: drop the rpm_status_id field 
The rpm_status_id field is a leftover from the non-SMD clocks. It is of
no use for the SMD-RPM clock driver and is always equal to zero. Drop it
completely.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-11-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
3ab58304f5 clk: qcom: smd-rpm: add XO_BUFFER clock for each XO_BUFFER_PINCTRL clock 
For each XO_BUFFER_PINCTRL there is a corresponding XO_BUFFER clock.
Add them automatically to drop the duplication between the clock
definitions.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-10-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
b1c6f902c0 clk: qcom: smd-rpm: remove duplication between sm6375 and sm6125 clocks 
Reuse sm6125's MMAXI clocks for sm6375.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-9-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
e5ca1b251d clk: qcom: smd-rpm: rename msm8992_ln_bb_* clocks to qcs404_ln_bb_* 
For each of XO_BUFFER_PINCTRL clocks there is a corresponding XO_BUFFER clock
with the similar name (e.g. msm8998_ln_bb_clk3_pin vs
msm8998_ln_bb_clk3). For qcs404_ln_bb_clk_pin there is no
qcs404_ln_bb_clk, since the msm8992_ln_bb_clk was used instead (even for
qcs404 platform).

Follow the usual practice and rename msm8992_ln_bb_clk clocks to
qcs404_ln_bb_clk (and rename active-only clock in a similar way).

This is a preparation step for the next patch, which will merge
XO_BUFFER and XO_BUFFER_PINCTRL definitions.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-8-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
cf202f8118 clk: qcom: smd-rpm: use msm8998_ln_bb_clk2 for qcm2290 SoC 
The qcm2290's ln_bb_clk2 is identical to the freshly added msm8998's
ln_bb_clk2 one. Use the latter and drop the SoC-specific version.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-7-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
63793efbe6 clk: qcom: smd-rpm: add missing ln_bb_clkN clocks 
Newer platforms (msm8998, sdm660, sm6125) have low noise LN_BB_CLKn
clocks. The driver already uses proper clock indices
(RPM_SMD_LN_BB_CLKn). Fix clock names used by these platforms.

Fixes: a0384ecfe2 ("clk: qcom: smd-rpm: De-duplicate identical entries")
Fixes: edeb2ca747 ("clk: qcom: smd: Add support for SM6125 rpm clocks")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-6-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
1bf68a5d68 clk: qcom: smd-rpm: remove duplication between qcs404 and qcm2290 clocks 
Reuse qcs404's QPIC and BIMC_GPU clock for qcm2290.

Fixes: 78b727d028 ("clk: qcom: smd-rpm: Add QCM2290 RPM clock support")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-5-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
c941b98781 clk: qcom: smd-rpm: remove duplication between MMXI and MMAXI defines 
The commit 644c422955 ("clk: qcom: smd: Add SM6375 clocks") added a
duplicate of the existing define QCOM_SMD_RPM_MMAXI_CLK, drop it now.

Fixes: 644c422955 ("clk: qcom: smd: Add SM6375 clocks")
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-4-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Dmitry Baryshkov
76318d779c clk: qcom: smd-rpm: enable pin-controlled ln_bb_clk clocks on qcs404 
The commit eaeee28db2 ("clk: qcom: smd: Add support for QCS404 rpm
clocks") defined the pin-controlled ln_bb_clk clocks, but didn't add
them to the qcs404_clks array. Add them to make these clocks usable to
platform devices.

Fixes: eaeee28db2 ("clk: qcom: smd: Add support for QCS404 rpm clocks")
Reviewed-by: Alex Elder <elder@linaro.org?
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-3-dmitry.baryshkov@linaro.org
 2022-12-28 12:26:14 -06:00
Konrad Dybcio
85d4e6ea08 clk: qcom: gcc-sm6115: Use floor_ops for SDCC1/2 core clk 
Just like in case of other SoCs change SDCC1/SDCC2 ops
to floor to avoid overclocking the controller.

Fixes: cbe63bfdc5 ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Iskren Chernev <me@iskren.info>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209123910.178609-1-konrad.dybcio@linaro.org
 2022-12-27 21:26:16 -06:00
Dmitry Baryshkov
230d4d815d clk: qcom: gcc-qcs404: add support for GDSCs 
Add support for two GDSCs provided by this clock controller.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-13-dmitry.baryshkov@linaro.org
 2022-12-27 11:59:10 -06:00
Dmitry Baryshkov
2ce81afa0c clk: qcom: gcc-qcs404: sort out the cxo clock 
The GCC driver registers the cxo clock as a thin wrapper around board's
xo_board clock. Nowadays we can use the xo_board directly in all the
clocks that use it. Use the fw_name "cxo" for this clock.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-12-dmitry.baryshkov@linaro.org
 2022-12-27 11:59:10 -06:00
Dmitry Baryshkov
9847a90c7c clk: qcom: gcc-qcs404: use parent_hws/_data instead of parent_names 
Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names. Use parent_hws where possible to refer parent
clocks directly, skipping the lookup.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-11-dmitry.baryshkov@linaro.org
 2022-12-27 11:59:10 -06:00