Add support for QCM2290 including a few prep changes.
* icc-qcm2290
interconnect: icc-rpm: Define ICC device type
interconnect: icc-rpm: Add QNOC type QoS support
interconnect: icc-rpm: Support child NoC device probe
dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
interconnect: qcom: Add QCM2290 driver support
Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
It adds interconnect driver support for QCM2290 platform. The topology
consists of 3 NoCs: BIMC, Config NoC (CNOC) and System NoC (SNOC). SNOC
is a QCOM_ICC_QNOC type device, as well as its 3 virtual child devices,
QUP, MMNRT and MMRT. QUP is owned by RPM and thus has no .regmap_cfg,
while the other 2 share the same .regmap_cfg with SNOC (parent).
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-6-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add driver for the Qualcomm interconnect buses found in SM8350 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Generated from downstream interconnect driver written by David Dai
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210318094617.951212-3-vkoul@kernel.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Introduce a driver for the Qualcomm interconnect busses found in
the SDM630/SDM636/SDM660 SoCs.
The topology consists of several NoCs that are controlled by a
remote processor that collects the aggregated bandwidth for each
master-slave pairs.
On a note, these chips are managing the "bus QoS" in a "hybrid"
fashion: some of the paths in the topology are managed through
(and by, of course) the RPM uC, while some others are "AP Owned",
meaning that the AP shall do direct writes to the appropriate
QoS registers for the specific paths and ports, instead of sending
an indication to the RPM and leaving the job to that one.
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Link: https://lore.kernel.org/r/20201017133718.31327-3-kholk11@gmail.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add RPM based interconnect driver implements the set and aggregate
functionalities that translates bandwidth requests into RPM messages.
These modules provide a common set of functionalities for all
Qualcomm RPM based interconnect providers and should help reduce code
duplication when adding new providers.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Link: https://lore.kernel.org/r/20201204075345.5161-2-jun.nie@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the Qualcomm interconnect buses found in SM8250 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Based on SC7180 driver and generated from downstream dts.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-6-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the Qualcomm interconnect buses found in SM8150 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Based on SC7180 driver and generated from downstream dts.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-5-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the Qualcomm interconnect buses found in MSM8916 based
platforms. The topology consists of three NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Add driver for the interconnect buses found in Qualcomm QCS404-based
platforms. The topology consists of three NoCs that are controlled by
a remote processor. This remote processor collects the aggregated
bandwidth for each master-slave pairs.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
