From d7197d56c9cf3620ec086550386df3be2c90ae4d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 28 Aug 2021 11:27:55 +0200 Subject: [PATCH 1/5] ARM: dts: rockchip: add adc-keys node to rk3066a-mk808 The MK808 has a button inside the cover for the boot loader to do some action. Add the adc-keys node to the rk3066a-mk808.dts file. The rk3066 has a higher maximum DC supply voltage for the analog part of SAR-ADC VDDA_SARADC of 2.75V then other Rockchip SoCs. For the "rockchip,saradc" node is a vref-supply property required, so add a regulator for it as well. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210828092755.24560-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-mk808.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts index 9790bc63b50a..667d57a4ff45 100644 --- a/arch/arm/boot/dts/rk3066a-mk808.dts +++ b/arch/arm/boot/dts/rk3066a-mk808.dts @@ -4,6 +4,7 @@ */ /dts-v1/; +#include #include "rk3066a.dtsi" / { @@ -24,6 +25,20 @@ memory@60000000 { device_type = "memory"; }; + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <2500000>; + poll-interval = <100>; + + recovery { + label = "recovery"; + linux,code = ; + press-threshold-microvolt = <0>; + }; + }; + gpio-leds { compatible = "gpio-leds"; @@ -46,6 +61,13 @@ hdmi_con_in: endpoint { }; }; + vcc_2v5: vcc-2v5 { + compatible = "regulator-fixed"; + regulator-name = "vcc_2v5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + vcc_io: vcc-io { compatible = "regulator-fixed"; regulator-name = "vcc_io"; @@ -164,6 +186,11 @@ wifi_pwr: wifi-pwr { }; }; +&saradc { + vref-supply = <&vcc_2v5>; + status = "okay"; +}; + &uart2 { status = "okay"; }; From f0f56c11447b7c77ba07f05fb07ddb00c3ae42b1 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 28 Aug 2021 13:42:40 +0200 Subject: [PATCH 2/5] ARM: dts: rockchip: change rv1108 gmac nodename The rv1108 gmac node is checked with rockchip-dwmac.yaml, snps,dwmac.yaml and ethernet-controller.yaml. The nodename should have a pattern: "^ethernet(@.*)?$", so change to nodename. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210828114240.12231-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rv1108.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 24d56849af46..80f4a31a21d3 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -557,7 +557,7 @@ sfc: spi@301c0000 { status = "disabled"; }; - gmac: eth@30200000 { + gmac: ethernet@30200000 { compatible = "rockchip,rv1108-gmac"; reg = <0x30200000 0x10000>; interrupts = , From 33a2a4b2b9fe503b09871cd097ce93bb9a785b1c Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 28 Aug 2021 11:45:12 +0200 Subject: [PATCH 3/5] ARM: dts: rockchip: rename opp-table node names After the conversion to YAML of the Operating Performance Points(OPP) binding the operating-points-v2 property expects the nodename to have the '^opp-table(-[a-z0-9]+)?$' format, so rename all Rockchip ARM dts opp-table node names. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v2.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210828094512.26862-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 2 +- arch/arm/boot/dts/rk3229.dtsi | 2 +- arch/arm/boot/dts/rk322x.dtsi | 2 +- arch/arm/boot/dts/rk3288.dtsi | 4 ++-- arch/arm/boot/dts/rv1108.dtsi | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 2c606494b78c..d6a946a2a92a 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -54,7 +54,7 @@ cpu3: cpu@3 { }; }; - cpu0_opp_table: opp_table0 { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; diff --git a/arch/arm/boot/dts/rk3229.dtsi b/arch/arm/boot/dts/rk3229.dtsi index cb7d3fad8e60..c340fb30e775 100644 --- a/arch/arm/boot/dts/rk3229.dtsi +++ b/arch/arm/boot/dts/rk3229.dtsi @@ -10,7 +10,7 @@ / { /delete-node/ opp-table0; - cpu0_opp_table: opp_table0 { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 75af99c76d7e..4021e92e0fdc 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -68,7 +68,7 @@ cpu3: cpu@f03 { }; }; - cpu0_opp_table: opp_table0 { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 4dcdcf17c977..1ded2aabeb11 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -100,7 +100,7 @@ cpu3: cpu@503 { }; }; - cpu_opp_table: cpu-opp-table { + cpu_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -1278,7 +1278,7 @@ gpu: gpu@ffa30000 { status = "disabled"; }; - gpu_opp_table: gpu-opp-table { + gpu_opp_table: opp-table-1 { compatible = "operating-points-v2"; opp-100000000 { diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 80f4a31a21d3..0380c3fa4577 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -40,7 +40,7 @@ cpu0: cpu@f00 { }; }; - cpu_opp_table: opp_table { + cpu_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-408000000 { From e220e0b00febcad6352dbe22da49ab08a4da4a82 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 28 Aug 2021 11:12:33 +0200 Subject: [PATCH 4/5] ARM: dts: rockchip: add more angle brackets to operating-points property on rk3066a After the conversion to YAML of the Operating Performance Points(OPP) binding the operating-points property expects values in a uint32-matrix with 2 items, so fix the notifications by adding angle brackets. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v1.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210828091233.19992-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index ae4055428c5e..cc701a4e046d 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -23,16 +23,15 @@ cpu0: cpu@0 { compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x0>; - operating-points = < + operating-points = /* kHz uV */ - 1416000 1300000 - 1200000 1175000 - 1008000 1125000 - 816000 1125000 - 600000 1100000 - 504000 1100000 - 312000 1075000 - >; + <1416000 1300000>, + <1200000 1175000>, + <1008000 1125000>, + <816000 1125000>, + <600000 1100000>, + <504000 1100000>, + <312000 1075000>; clock-latency = <40000>; clocks = <&cru ARMCLK>; }; From 3e6f8124a78840d074fab36853ee1f5a2e7cffe5 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 28 Aug 2021 12:26:59 +0200 Subject: [PATCH 5/5] ARM: dts: rockchip: swap timer clock-names With the conversion of rockchip,rk-timer.yaml the clock-names order was set to "pclk", "timer", but nothing was fixed in the ARM dts section of the mainline kernel, so the swap timer clock-names that don't fit. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 4 ++-- arch/arm/boot/dts/rk322x.dtsi | 4 ++-- arch/arm/boot/dts/rv1108.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index ffa9bc7ed3d0..6864b8668ec0 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -416,8 +416,8 @@ timer: timer@20044000 { compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer"; reg = <0x20044000 0x20>; interrupts = ; - clocks = <&xin24m>, <&cru PCLK_TIMER>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER>, <&xin24m>; + clock-names = "pclk", "timer"; }; pwm0: pwm@20050000 { diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 4021e92e0fdc..dea025a6469f 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -477,8 +477,8 @@ timer: timer@110c0000 { compatible = "rockchip,rk3228-timer", "rockchip,rk3288-timer"; reg = <0x110c0000 0x20>; interrupts = ; - clocks = <&xin24m>, <&cru PCLK_TIMER>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER>, <&xin24m>; + clock-names = "pclk", "timer"; }; cru: clock-controller@110e0000 { diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 0380c3fa4577..668fb15137cc 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -300,8 +300,8 @@ timer: timer@10350000 { compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer"; reg = <0x10350000 0x20>; interrupts = ; - clocks = <&xin24m>, <&cru PCLK_TIMER>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER>, <&xin24m>; + clock-names = "pclk", "timer"; }; watchdog: watchdog@10360000 {