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remove the v850 port

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Trying to compile the v850 port brings many compile errors, one of them exists
since at least kernel 2.6.19.

There also seems to be noone willing to bring this port back into a usable
state.

This patch therefore removes the v850 port.

If anyone ever decides to revive the v850 port the code will still be
available from older kernels, and it wouldn't be impossible for the port to
reenter the kernel if it would become actively maintained again.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Adrian Bunk
2008-07-23 21:28:50 -07:00
committed by Linus Torvalds
parent 99764fa4ce
commit f606ddf42f
204 changed files with 5 additions and 18406 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
include/asm-v850/Kbuild
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@@ -1 +0,0 @@
include include/asm-generic/Kbuild.asm

21
include/asm-v850/a.out.h
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@@ -1,21 +0,0 @@
#ifndef __V850_A_OUT_H__
#define __V850_A_OUT_H__
struct exec
{
unsigned long a_info; /* Use macros N_MAGIC, etc for access */
unsigned a_text; /* length of text, in bytes */
unsigned a_data; /* length of data, in bytes */
unsigned a_bss; /* length of uninitialized data area for file, in bytes */
unsigned a_syms; /* length of symbol table data in file, in bytes */
unsigned a_entry; /* start address */
unsigned a_trsize; /* length of relocation info for text, in bytes */
unsigned a_drsize; /* length of relocation info for data, in bytes */
};
#define N_TRSIZE(a) ((a).a_trsize)
#define N_DRSIZE(a) ((a).a_drsize)
#define N_SYMSIZE(a) ((a).a_syms)
#endif /* __V850_A_OUT_H__ */

137
include/asm-v850/anna.h
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@@ -1,137 +0,0 @@
/*
* include/asm-v850/anna.h -- Anna V850E2 evaluation cpu chip/board
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_ANNA_H__
#define __V850_ANNA_H__
#include <asm/v850e2.h> /* Based on V850E2 core. */
#define CPU_MODEL "v850e2/anna"
#define CPU_MODEL_LONG "NEC V850E2/Anna"
#define PLATFORM "anna"
#define PLATFORM_LONG "NEC/Midas lab V850E2/Anna evaluation board"
#define CPU_CLOCK_FREQ 200000000 /* 200MHz */
#define SYS_CLOCK_FREQ 33300000 /* 33.3MHz */
/* 1MB of static RAM. This memory is mirrored 64 times. */
#define SRAM_ADDR 0x04000000
#define SRAM_SIZE 0x00100000 /* 1MB */
/* 64MB of DRAM. */
#define SDRAM_ADDR 0x08000000
#define SDRAM_SIZE 0x04000000 /* 64MB */
/* For <asm/page.h> */
#define PAGE_OFFSET SRAM_ADDR
/* We use on-chip RAM, for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. The Anna chip has
128K of `dLB' ram nominally located at 0xFFF00000, but it's mirrored
every 128K, so we can use the `last mirror' (except for the portion at
the top which is overridden by I/O space). In addition, the early
sample chip we're using has lots of memory errors in the dLB ram, so we
use a specially chosen location that has at least 20 bytes of contiguous
valid memory (xxxF0020 - xxxF003F). */
#define R0_RAM_ADDR 0xFFFF8020
/* Anna specific control registers. */
#define ANNA_ILBEN_ADDR 0xFFFFF7F2
#define ANNA_ILBEN (*(volatile u16 *)ANNA_ILBEN_ADDR)
/* I/O port P0-P3. */
/* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */
#define ANNA_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2)
#define ANNA_PORT_IO(n) (*(volatile u8 *)ANNA_PORT_IO_ADDR(n))
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ANNA_PORT_PM_ADDR(n) (0xFFFFF410 + (n) * 2)
#define ANNA_PORT_PM(n) (*(volatile u8 *)ANNA_PORT_PM_ADDR(n))
/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
#define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts 0-15 */
#define IRQ_INTP_NUM 16
#define IRQ_INTOV(n) (0x10 + (n)) /* 0-2 */
#define IRQ_INTOV_NUM 2
#define IRQ_INTCCC(n) (0x12 + (n))
#define IRQ_INTCCC_NUM 4
#define IRQ_INTCMD(n) (0x16 + (n)) /* interval timer interrupts 0-5 */
#define IRQ_INTCMD_NUM 6
#define IRQ_INTDMA(n) (0x1C + (n)) /* DMA interrupts 0-3 */
#define IRQ_INTDMA_NUM 4
#define IRQ_INTDMXER 0x20
#define IRQ_INTSRE(n) (0x21 + (n)*3) /* UART 0-1 reception error */
#define IRQ_INTSRE_NUM 2
#define IRQ_INTSR(n) (0x22 + (n)*3) /* UART 0-1 reception completion */
#define IRQ_INTSR_NUM 2
#define IRQ_INTST(n) (0x23 + (n)*3) /* UART 0-1 transmission completion */
#define IRQ_INTST_NUM 2
#define NUM_CPU_IRQS 64
#ifndef __ASSEMBLY__
/* Initialize chip interrupts. */
extern void anna_init_irqs (void);
#endif
/* Anna UART details (basically the same as the V850E/MA1, but 2 channels). */
#define V850E_UART_NUM_CHANNELS 2
#define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 2)
#define V850E_UART_CHIP_NAME "V850E2/NA85E2A"
/* This is the UART channel that's actually connected on the board. */
#define V850E_UART_CONSOLE_CHANNEL 1
/* This is a function that gets called before configuring the UART. */
#define V850E_UART_PRE_CONFIGURE anna_uart_pre_configure
#ifndef __ASSEMBLY__
extern void anna_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
/* CTS for UART channel 1 is pin P37 (bit 7 of port 3). */
#define V850E_UART_CTS(chan) ((chan) == 1 ? !(ANNA_PORT_IO(3) & 0x80) : 1)
/* RTS for UART channel 1 is pin P07 (bit 7 of port 0). */
#define V850E_UART_SET_RTS(chan, val) \
do { \
if (chan == 1) { \
unsigned old = ANNA_PORT_IO(0); \
if (val) \
ANNA_PORT_IO(0) = old & ~0x80; \
else \
ANNA_PORT_IO(0) = old | 0x80; \
} \
} while (0)
/* Timer C details. */
#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
/* Timer D details (the Anna actually has 5 of these; should change later). */
#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
#define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ
#define V850E_TIMER_D_TMCD_CS_MIN 1 /* min 2^1 divider */
#endif /* __V850_ANNA_H__ */

152
include/asm-v850/as85ep1.h
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@@ -1,152 +0,0 @@
/*
* include/asm-v850/as85ep1.h -- AS85EP1 evaluation CPU chip/board
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_AS85EP1_H__
#define __V850_AS85EP1_H__
#include <asm/v850e.h>
#define CPU_MODEL "as85ep1"
#define CPU_MODEL_LONG "NEC V850E/AS85EP1"
#define PLATFORM "AS85EP1"
#define PLATFORM_LONG "NEC V850E/AS85EP1 evaluation board"
#define CPU_CLOCK_FREQ 96000000 /* 96MHz */
#define SYS_CLOCK_FREQ CPU_CLOCK_FREQ
/* 1MB of static RAM. */
#define SRAM_ADDR 0x00400000
#define SRAM_SIZE 0x00100000 /* 1MB */
/* About 58MB of DRAM. This can actually be at one of two positions,
determined by jump JP3; we have to use the first position because the
second is partially out of processor instruction addressing range
(though in the second position there's actually 64MB available). */
#define SDRAM_ADDR 0x00600000
#define SDRAM_SIZE 0x039F8000 /* approx 58MB */
/* For <asm/page.h> */
#define PAGE_OFFSET SRAM_ADDR
/* We use on-chip RAM, for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. The AS85EP1 chip
16K of internal RAM located slightly before I/O space. */
#define R0_RAM_ADDR 0xFFFF8000
/* AS85EP1 specific control registers. */
#define AS85EP1_CSC_ADDR(n) (0xFFFFF060 + (n) * 2)
#define AS85EP1_CSC(n) (*(volatile u16 *)AS85EP1_CSC_ADDR(n))
#define AS85EP1_BSC_ADDR 0xFFFFF066
#define AS85EP1_BSC (*(volatile u16 *)AS85EP1_BSC_ADDR)
#define AS85EP1_BCT_ADDR(n) (0xFFFFF480 + (n) * 2)
#define AS85EP1_BCT(n) (*(volatile u16 *)AS85EP1_BCT_ADDR(n))
#define AS85EP1_DWC_ADDR(n) (0xFFFFF484 + (n) * 2)
#define AS85EP1_DWC(n) (*(volatile u16 *)AS85EP1_DWC_ADDR(n))
#define AS85EP1_BCC_ADDR 0xFFFFF488
#define AS85EP1_BCC (*(volatile u16 *)AS85EP1_BCC_ADDR)
#define AS85EP1_ASC_ADDR 0xFFFFF48A
#define AS85EP1_ASC (*(volatile u16 *)AS85EP1_ASC_ADDR)
#define AS85EP1_BCP_ADDR 0xFFFFF48C
#define AS85EP1_BCP (*(volatile u16 *)AS85EP1_BCP_ADDR)
#define AS85EP1_LBS_ADDR 0xFFFFF48E
#define AS85EP1_LBS (*(volatile u16 *)AS85EP1_LBS_ADDR)
#define AS85EP1_BMC_ADDR 0xFFFFF498
#define AS85EP1_BMC (*(volatile u16 *)AS85EP1_BMC_ADDR)
#define AS85EP1_PRC_ADDR 0xFFFFF49A
#define AS85EP1_PRC (*(volatile u16 *)AS85EP1_PRC_ADDR)
#define AS85EP1_SCR_ADDR(n) (0xFFFFF4A0 + (n) * 4)
#define AS85EP1_SCR(n) (*(volatile u16 *)AS85EP1_SCR_ADDR(n))
#define AS85EP1_RFS_ADDR(n) (0xFFFFF4A2 + (n) * 4)
#define AS85EP1_RFS(n) (*(volatile u16 *)AS85EP1_RFS_ADDR(n))
#define AS85EP1_IRAMM_ADDR 0xFFFFF80A
#define AS85EP1_IRAMM (*(volatile u8 *)AS85EP1_IRAMM_ADDR)
/* I/O port P0-P13. */
/* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */
#define AS85EP1_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2)
#define AS85EP1_PORT_IO(n) (*(volatile u8 *)AS85EP1_PORT_IO_ADDR(n))
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define AS85EP1_PORT_PM_ADDR(n) (0xFFFFF420 + (n) * 2)
#define AS85EP1_PORT_PM(n) (*(volatile u8 *)AS85EP1_PORT_PM_ADDR(n))
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define AS85EP1_PORT_PMC_ADDR(n) (0xFFFFF440 + (n) * 2)
#define AS85EP1_PORT_PMC(n) (*(volatile u8 *)AS85EP1_PORT_PMC_ADDR(n))
/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
#define IRQ_INTCCC(n) (0x0C + (n))
#define IRQ_INTCCC_NUM 8
#define IRQ_INTCMD(n) (0x14 + (n)) /* interval timer interrupts 0-5 */
#define IRQ_INTCMD_NUM 6
#define IRQ_INTSRE(n) (0x1E + (n)*3) /* UART 0-1 reception error */
#define IRQ_INTSRE_NUM 2
#define IRQ_INTSR(n) (0x1F + (n)*3) /* UART 0-1 reception completion */
#define IRQ_INTSR_NUM 2
#define IRQ_INTST(n) (0x20 + (n)*3) /* UART 0-1 transmission completion */
#define IRQ_INTST_NUM 2
#define NUM_CPU_IRQS 64
#ifndef __ASSEMBLY__
/* Initialize chip interrupts. */
extern void as85ep1_init_irqs (void);
#endif
/* AS85EP1 UART details (basically the same as the V850E/MA1, but 2 channels). */
#define V850E_UART_NUM_CHANNELS 2
#define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 4)
#define V850E_UART_CHIP_NAME "V850E/NA85E"
/* This is a function that gets called before configuring the UART. */
#define V850E_UART_PRE_CONFIGURE as85ep1_uart_pre_configure
#ifndef __ASSEMBLY__
extern void as85ep1_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
/* CTS for UART channel 1 is pin P54 (bit 4 of port 5). */
#define V850E_UART_CTS(chan) ((chan) == 1 ? !(AS85EP1_PORT_IO(5) & 0x10) : 1)
/* RTS for UART channel 1 is pin P53 (bit 3 of port 5). */
#define V850E_UART_SET_RTS(chan, val) \
do { \
if (chan == 1) { \
unsigned old = AS85EP1_PORT_IO(5); \
if (val) \
AS85EP1_PORT_IO(5) = old & ~0x8; \
else \
AS85EP1_PORT_IO(5) = old | 0x8; \
} \
} while (0)
/* Timer C details. */
#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
/* Timer D details (the AS85EP1 actually has 5 of these; should change later). */
#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
#define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ
#define V850E_TIMER_D_TMCD_CS_MIN 2 /* min 2^2 divider */
#endif /* __V850_AS85EP1_H__ */

32
include/asm-v850/asm.h
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@@ -1,32 +0,0 @@
/*
* include/asm-v850/asm.h -- Macros for writing assembly code
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#define G_ENTRY(name) \
.balign 4; \
.globl name; \
.type name,@function; \
name
#define G_DATA(name) \
.globl name; \
.type name,@object; \
name
#define END(name) \
.size name,.-name
#define L_ENTRY(name) \
.balign 4; \
.type name,@function; \
name
#define L_DATA(name) \
.type name,@object; \
name

131
include/asm-v850/atomic.h
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@@ -1,131 +0,0 @@
/*
* include/asm-v850/atomic.h -- Atomic operations
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_ATOMIC_H__
#define __V850_ATOMIC_H__
#include <asm/system.h>
#ifdef CONFIG_SMP
#error SMP not supported
#endif
typedef struct { int counter; } atomic_t;
#define ATOMIC_INIT(i) { (i) }
#ifdef __KERNEL__
#define atomic_read(v) ((v)->counter)
#define atomic_set(v,i) (((v)->counter) = (i))
static inline int atomic_add_return (int i, volatile atomic_t *v)
{
unsigned long flags;
int res;
local_irq_save (flags);
res = v->counter + i;
v->counter = res;
local_irq_restore (flags);
return res;
}
static __inline__ int atomic_sub_return (int i, volatile atomic_t *v)
{
unsigned long flags;
int res;
local_irq_save (flags);
res = v->counter - i;
v->counter = res;
local_irq_restore (flags);
return res;
}
static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *addr)
{
unsigned long flags;
local_irq_save (flags);
*addr &= ~mask;
local_irq_restore (flags);
}
#endif
#define atomic_add(i, v) atomic_add_return ((i), (v))
#define atomic_sub(i, v) atomic_sub_return ((i), (v))
#define atomic_dec_return(v) atomic_sub_return (1, (v))
#define atomic_inc_return(v) atomic_add_return (1, (v))
#define atomic_inc(v) atomic_inc_return (v)
#define atomic_dec(v) atomic_dec_return (v)
/*
* atomic_inc_and_test - increment and test
* @v: pointer of type atomic_t
*
* Atomically increments @v by 1
* and returns true if the result is zero, or false for all
* other cases.
*/
#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
#define atomic_sub_and_test(i,v) (atomic_sub_return ((i), (v)) == 0)
#define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0)
#define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0)
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
int ret;
unsigned long flags;
local_irq_save(flags);
ret = v->counter;
if (likely(ret == old))
v->counter = new;
local_irq_restore(flags);
return ret;
}
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
static inline int atomic_add_unless(atomic_t *v, int a, int u)
{
int ret;
unsigned long flags;
local_irq_save(flags);
ret = v->counter;
if (ret != u)
v->counter += a;
local_irq_restore(flags);
return ret != u;
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
/* Atomic operations are already serializing on ARM */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __V850_ATOMIC_H__ */

4
include/asm-v850/auxvec.h
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@@ -1,4 +0,0 @@
#ifndef __V850_AUXVEC_H__
#define __V850_AUXVEC_H__
#endif /* __V850_AUXVEC_H__ */

161
include/asm-v850/bitops.h
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@@ -1,161 +0,0 @@
/*
* include/asm-v850/bitops.h -- Bit operations
*
* Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
* Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
* Copyright (C) 1992 Linus Torvalds.
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*/
#ifndef __V850_BITOPS_H__
#define __V850_BITOPS_H__
#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif
#include <linux/compiler.h> /* unlikely */
#include <asm/byteorder.h> /* swab32 */
#include <asm/system.h> /* interrupt enable/disable */
#ifdef __KERNEL__
#include <asm-generic/bitops/ffz.h>
/*
* The __ functions are not atomic
*/
/* In the following constant-bit-op macros, a "g" constraint is used when
we really need an integer ("i" constraint). This is to avoid
warnings/errors from the compiler in the case where the associated
operand _isn't_ an integer, and shouldn't produce bogus assembly because
use of that form is protected by a guard statement that checks for
constants, and should otherwise be removed by the optimizer. This
_usually_ works -- however, __builtin_constant_p returns true for a
variable with a known constant value too, and unfortunately gcc will
happily put the variable in a register and use the register for the "g"
constraint'd asm operand. To avoid the latter problem, we add a
constant offset to the operand and subtract it back in the asm code;
forcing gcc to do arithmetic on the value is usually enough to get it
to use a real constant value. This is horrible, and ultimately
unreliable too, but it seems to work for now (hopefully gcc will offer
us more control in the future, so we can do a better job). */
#define __const_bit_op(op, nr, addr) \
({ __asm__ (op " (%0 - 0x123), %1" \
:: "g" (((nr) & 0x7) + 0x123), \
"m" (*((char *)(addr) + ((nr) >> 3))) \
: "memory"); })
#define __var_bit_op(op, nr, addr) \
({ int __nr = (nr); \
__asm__ (op " %0, [%1]" \
:: "r" (__nr & 0x7), \
"r" ((char *)(addr) + (__nr >> 3)) \
: "memory"); })
#define __bit_op(op, nr, addr) \
((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
? __const_bit_op (op, nr, addr) \
: __var_bit_op (op, nr, addr))
#define __set_bit(nr, addr) __bit_op ("set1", nr, addr)
#define __clear_bit(nr, addr) __bit_op ("clr1", nr, addr)
#define __change_bit(nr, addr) __bit_op ("not1", nr, addr)
/* The bit instructions used by `non-atomic' variants are actually atomic. */
#define set_bit __set_bit
#define clear_bit __clear_bit
#define change_bit __change_bit
#define __const_tns_bit_op(op, nr, addr) \
({ int __tns_res; \
__asm__ __volatile__ ( \
"tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2" \
: "=&r" (__tns_res) \
: "g" (((nr) & 0x7) + 0x123), \
"m" (*((char *)(addr) + ((nr) >> 3))) \
: "memory"); \
__tns_res; \
})
#define __var_tns_bit_op(op, nr, addr) \
({ int __nr = (nr); \
int __tns_res; \
__asm__ __volatile__ ( \
"tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]" \
: "=&r" (__tns_res) \
: "r" (__nr & 0x7), \
"r" ((char *)(addr) + (__nr >> 3)) \
: "memory"); \
__tns_res; \
})
#define __tns_bit_op(op, nr, addr) \
((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
? __const_tns_bit_op (op, nr, addr) \
: __var_tns_bit_op (op, nr, addr))
#define __tns_atomic_bit_op(op, nr, addr) \
({ int __tns_atomic_res, __tns_atomic_flags; \
local_irq_save (__tns_atomic_flags); \
__tns_atomic_res = __tns_bit_op (op, nr, addr); \
local_irq_restore (__tns_atomic_flags); \
__tns_atomic_res; \
})
#define __test_and_set_bit(nr, addr) __tns_bit_op ("set1", nr, addr)
#define test_and_set_bit(nr, addr) __tns_atomic_bit_op ("set1", nr, addr)
#define __test_and_clear_bit(nr, addr) __tns_bit_op ("clr1", nr, addr)
#define test_and_clear_bit(nr, addr) __tns_atomic_bit_op ("clr1", nr, addr)
#define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr)
#define test_and_change_bit(nr, addr) __tns_atomic_bit_op ("not1", nr, addr)
#define __const_test_bit(nr, addr) \
({ int __test_bit_res; \
__asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0" \
: "=r" (__test_bit_res) \
: "g" (((nr) & 0x7) + 0x123), \
"m" (*((const char *)(addr) + ((nr) >> 3)))); \
__test_bit_res; \
})
static inline int __test_bit (int nr, const void *addr)
{
int res;
__asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0"
: "=r" (res)
: "r" (nr & 0x7), "r" (addr + (nr >> 3)));
return res;
}
#define test_bit(nr,addr) \
((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
? __const_test_bit ((nr), (addr)) \
: __test_bit ((nr), (addr)))
/* clear_bit doesn't provide any barrier for the compiler. */
#define smp_mb__before_clear_bit() barrier ()
#define smp_mb__after_clear_bit() barrier ()
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/__ffs.h>
#include <asm-generic/bitops/find.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/lock.h>
#include <asm-generic/bitops/ext2-non-atomic.h>
#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
#include <asm-generic/bitops/minix.h>
#endif /* __KERNEL__ */
#endif /* __V850_BITOPS_H__ */

25
include/asm-v850/bug.h
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@@ -1,25 +0,0 @@
/*
* include/asm-v850/bug.h -- Bug reporting
*
* Copyright (C) 2003 NEC Electronics Corporation
* Copyright (C) 2003 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_BUG_H__
#define __V850_BUG_H__
#ifdef CONFIG_BUG
extern void __bug (void) __attribute__ ((noreturn));
#define BUG() __bug()
#define HAVE_ARCH_BUG
#endif
#include <asm-generic/bug.h>
#endif /* __V850_BUG_H__ */

16
include/asm-v850/bugs.h
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@@ -1,16 +0,0 @@
/*
* include/asm-v850e/bugs.h
*
* Copyright (C) 1994 Linus Torvalds
*/
/*
* This is included by init/main.c to check for architecture-dependent bugs.
*
* Needs:
* void check_bugs(void);
*/
static void check_bugs(void)
{
}

48
include/asm-v850/byteorder.h
View File

@@ -1,48 +0,0 @@
/*
* include/asm-v850/byteorder.h -- Endian id and conversion ops
*
* Copyright (C) 2001 NEC Corporation
* Copyright (C) 2001 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_BYTEORDER_H__
#define __V850_BYTEORDER_H__
#include <asm/types.h>
#include <linux/compiler.h>
#ifdef __GNUC__
static __inline__ __attribute_const__ __u32 ___arch__swab32 (__u32 word)
{
__u32 res;
__asm__ ("bsw %1, %0" : "=r" (res) : "r" (word));
return res;
}
static __inline__ __attribute_const__ __u16 ___arch__swab16 (__u16 half_word)
{
__u16 res;
__asm__ ("bsh %1, %0" : "=r" (res) : "r" (half_word));
return res;
}
#define __arch__swab32(x) ___arch__swab32(x)
#define __arch__swab16(x) ___arch__swab16(x)
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#endif /* __GNUC__ */
#include <linux/byteorder/little_endian.h>
#endif /* __V850_BYTEORDER_H__ */

26
include/asm-v850/cache.h
View File

@@ -1,26 +0,0 @@
/*
* include/asm-v850/cache.h -- Cache operations
*
* Copyright (C) 2001,05 NEC Corporation
* Copyright (C) 2001,05 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_CACHE_H__
#define __V850_CACHE_H__
/* All cache operations are machine-dependent. */
#include <asm/machdep.h>
#ifndef L1_CACHE_BYTES
/* This processor has no cache, so just choose an arbitrary value. */
#define L1_CACHE_BYTES 16
#define L1_CACHE_SHIFT 4
#endif
#endif /* __V850_CACHE_H__ */

70
include/asm-v850/cacheflush.h
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@@ -1,70 +0,0 @@
/*
* include/asm-v850/cacheflush.h
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_CACHEFLUSH_H__
#define __V850_CACHEFLUSH_H__
/* Somebody depends on this; sigh... */
#include <linux/mm.h>
#include <asm/machdep.h>
/* The following are all used by the kernel in ways that only affect
systems with MMUs, so we don't need them. */
#define flush_cache_all() ((void)0)
#define flush_cache_mm(mm) ((void)0)
#define flush_cache_dup_mm(mm) ((void)0)
#define flush_cache_range(vma, start, end) ((void)0)
#define flush_cache_page(vma, vmaddr, pfn) ((void)0)
#define flush_dcache_page(page) ((void)0)
#define flush_dcache_mmap_lock(mapping) ((void)0)
#define flush_dcache_mmap_unlock(mapping) ((void)0)
#define flush_cache_vmap(start, end) ((void)0)
#define flush_cache_vunmap(start, end) ((void)0)
#ifdef CONFIG_NO_CACHE
/* Some systems have no cache at all, in which case we don't need these
either. */
#define flush_icache() ((void)0)
#define flush_icache_range(start, end) ((void)0)
#define flush_icache_page(vma,pg) ((void)0)
#define flush_icache_user_range(vma,pg,adr,len) ((void)0)
#define flush_cache_sigtramp(vaddr) ((void)0)
#else /* !CONFIG_NO_CACHE */
struct page;
struct mm_struct;
struct vm_area_struct;
/* Otherwise, somebody had better define them. */
extern void flush_icache (void);
extern void flush_icache_range (unsigned long start, unsigned long end);
extern void flush_icache_page (struct vm_area_struct *vma, struct page *page);
extern void flush_icache_user_range (struct vm_area_struct *vma,
struct page *page,
unsigned long adr, int len);
extern void flush_cache_sigtramp (unsigned long addr);
#endif /* CONFIG_NO_CACHE */
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { memcpy(dst, src, len); \
flush_icache_user_range(vma, page, vaddr, len); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
memcpy(dst, src, len)
#endif /* __V850_CACHEFLUSH_H__ */

112
include/asm-v850/checksum.h
View File

@@ -1,112 +0,0 @@
/*
* include/asm-v850/checksum.h -- Checksum ops
*
* Copyright (C) 2001,2005 NEC Corporation
* Copyright (C) 2001,2005 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_CHECKSUM_H__
#define __V850_CHECKSUM_H__
/*
* computes the checksum of a memory block at buff, length len,
* and adds in "sum" (32-bit)
*
* returns a 32-bit number suitable for feeding into itself
* or csum_tcpudp_magic
*
* this function must be called with even lengths, except
* for the last fragment, which may be odd
*
* it's best to have buff aligned on a 32-bit boundary
*/
extern __wsum csum_partial(const void *buff, int len, __wsum sum);
/*
* the same as csum_partial, but copies from src while it
* checksums
*
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
extern __wsum csum_partial_copy_nocheck(const void *src,
void *dst, int len, __wsum sum);
/*
* the same as csum_partial_copy, but copies from user space.
*
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
extern __wsum csum_partial_copy_from_user (const void *src,
void *dst,
int len, __wsum sum,
int *csum_err);
__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
/*
* Fold a partial checksum
*/
static inline __sum16 csum_fold (__wsum sum)
{
unsigned int result;
/*
%0 %1
hsw %1, %0 H L L H
add %1, %0 H L H+L+C H+L
*/
asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum));
return (__force __sum16)(~result >> 16);
}
/*
* computes the checksum of the TCP/UDP pseudo-header
* returns a 16-bit checksum, already complemented
*/
static inline __wsum
csum_tcpudp_nofold (__be32 saddr, __be32 daddr,
unsigned short len,
unsigned short proto, __wsum sum)
{
int __carry;
__asm__ ("add %2, %0;"
"setf c, %1;"
"add %1, %0;"
"add %3, %0;"
"setf c, %1;"
"add %1, %0;"
"add %4, %0;"
"setf c, %1;"
"add %1, %0"
: "=&r" (sum), "=&r" (__carry)
: "r" (daddr), "r" (saddr),
"r" ((len + proto) << 8),
"0" (sum));
return sum;
}
static inline __sum16
csum_tcpudp_magic (__be32 saddr, __be32 daddr,
unsigned short len,
unsigned short proto, __wsum sum)
{
return csum_fold (csum_tcpudp_nofold (saddr, daddr, len, proto, sum));
}
/*
* this routine is used for miscellaneous IP-like checksums, mainly
* in icmp.c
*/
extern __sum16 ip_compute_csum(const void *buff, int len);
#endif /* __V850_CHECKSUM_H__ */

26
include/asm-v850/clinkage.h
View File

@@ -1,26 +0,0 @@
/*
* include/asm-v850/clinkage.h -- Macros to reflect C symbol-naming conventions
*
* Copyright (C) 2001,02 NEC Corporatione
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_CLINKAGE_H__
#define __V850_CLINKAGE_H__
#include <asm/macrology.h>
#include <asm/asm.h>
#define C_SYMBOL_NAME(name) macrology_paste(_, name)
#define C_SYMBOL_STRING(name) macrology_stringify(C_SYMBOL_NAME(name))
#define C_ENTRY(name) G_ENTRY(C_SYMBOL_NAME(name))
#define C_DATA(name) G_DATA(C_SYMBOL_NAME(name))
#define C_END(name) END(C_SYMBOL_NAME(name))
#endif /* __V850_CLINKAGE_H__ */

6
include/asm-v850/cputime.h
View File

@@ -1,6 +0,0 @@
#ifndef __V850_CPUTIME_H
#define __V850_CPUTIME_H
#include <asm-generic/cputime.h>
#endif /* __V850_CPUTIME_H */

47
include/asm-v850/current.h
View File

@@ -1,47 +0,0 @@
/*
* include/asm-v850/current.h -- Current task
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_CURRENT_H__
#define __V850_CURRENT_H__
#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */
#include <linux/thread_info.h>
#endif
#include <asm/macrology.h>
/* Register used to hold the current task pointer while in the kernel.
Any `call clobbered' register without a special meaning should be OK,
but check asm/v850/kernel/entry.S to be sure. */
#define CURRENT_TASK_REGNUM 16
#define CURRENT_TASK macrology_paste (r, CURRENT_TASK_REGNUM)
#ifdef __ASSEMBLY__
/* Put a pointer to the current task structure into REG. */
#define GET_CURRENT_TASK(reg) \
GET_CURRENT_THREAD(reg); \
ld.w TI_TASK[reg], reg
#else /* !__ASSEMBLY__ */
/* A pointer to the current task. */
register struct task_struct *current \
__asm__ (macrology_stringify (CURRENT_TASK));
#endif /* __ASSEMBLY__ */
#endif /* _V850_CURRENT_H */

47
include/asm-v850/delay.h
View File

@@ -1,47 +0,0 @@
/*
* include/asm-v850/delay.h -- Delay routines, using a pre-computed
* "loops_per_second" value
*
* Copyright (C) 2001,03 NEC Corporation
* Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
* Copyright (C) 1994 Hamish Macdonald
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*/
#ifndef __V850_DELAY_H__
#define __V850_DELAY_H__
#include <asm/param.h>
static inline void __delay(unsigned long loops)
{
if (loops)
__asm__ __volatile__ ("1: add -1, %0; bnz 1b"
: "=r" (loops) : "0" (loops));
}
/*
* Use only for very small delays ( < 1 msec). Should probably use a
* lookup table, really, as the multiplications take much too long with
* short delays. This is a "reasonable" implementation, though (and the
* first constant multiplications gets optimized away if the delay is
* a constant)
*/
extern unsigned long loops_per_jiffy;
static inline void udelay(unsigned long usecs)
{
register unsigned long full_loops, part_loops;
full_loops = ((usecs * HZ) / 1000000) * loops_per_jiffy;
usecs %= (1000000 / HZ);
part_loops = (usecs * HZ * loops_per_jiffy) / 1000000;
__delay(full_loops + part_loops);
}
#endif /* __V850_DELAY_H__ */

7
include/asm-v850/device.h
View File

@@ -1,7 +0,0 @@
/*
* Arch specific extensions to struct device
*
* This file is released under the GPLv2
*/
#include <asm-generic/device.h>

1
include/asm-v850/div64.h
View File

@@ -1 +0,0 @@
#include <asm-generic/div64.h>

11
include/asm-v850/dma-mapping.h
View File

@@ -1,11 +0,0 @@
#ifndef __V850_DMA_MAPPING_H__
#define __V850_DMA_MAPPING_H__
#ifdef CONFIG_PCI
#include <asm-generic/dma-mapping.h>
#else
#include <asm-generic/dma-mapping-broken.h>
#endif
#endif /* __V850_DMA_MAPPING_H__ */

18
include/asm-v850/dma.h
View File

@@ -1,18 +0,0 @@
#ifndef __V850_DMA_H__
#define __V850_DMA_H__
/* What should this be? */
#define MAX_DMA_ADDRESS 0xFFFFFFFF
/* reserve a DMA channel */
extern int request_dma (unsigned int dmanr, const char * device_id);
/* release it again */
extern void free_dma (unsigned int dmanr);
#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy (0)
#endif
#endif /* __V850_DMA_H__ */

99
include/asm-v850/elf.h
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@@ -1,99 +0,0 @@
#ifndef __V850_ELF_H__
#define __V850_ELF_H__
/*
* ELF register definitions..
*/
#include <asm/ptrace.h>
#include <asm/user.h>
#include <asm/byteorder.h>
typedef unsigned long elf_greg_t;
#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef struct user_fpu_struct elf_fpregset_t;
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
#define elf_check_arch(x) \
((x)->e_machine == EM_V850 || (x)->e_machine == EM_CYGNUS_V850)
/* v850 relocation types. */
#define R_V850_NONE 0
#define R_V850_9_PCREL 1
#define R_V850_22_PCREL 2
#define R_V850_HI16_S 3
#define R_V850_HI16 4
#define R_V850_LO16 5
#define R_V850_32 6
#define R_V850_16 7
#define R_V850_8 8
#define R_V850_SDA_16_16_OFFSET 9 /* For ld.b, st.b, set1, clr1,
not1, tst1, movea, movhi */
#define R_V850_SDA_15_16_OFFSET 10 /* For ld.w, ld.h, ld.hu, st.w, st.h */
#define R_V850_ZDA_16_16_OFFSET 11 /* For ld.b, st.b, set1, clr1,
not1, tst1, movea, movhi */
#define R_V850_ZDA_15_16_OFFSET 12 /* For ld.w, ld.h, ld.hu, st.w, st.h */
#define R_V850_TDA_6_8_OFFSET 13 /* For sst.w, sld.w */
#define R_V850_TDA_7_8_OFFSET 14 /* For sst.h, sld.h */
#define R_V850_TDA_7_7_OFFSET 15 /* For sst.b, sld.b */
#define R_V850_TDA_16_16_OFFSET 16 /* For set1, clr1, not1, tst1,
movea, movhi */
#define R_V850_NUM 17
/*
* These are used to set parameters in the core dumps.
*/
#define ELF_CLASS ELFCLASS32
#ifdef __LITTLE_ENDIAN__
#define ELF_DATA ELFDATA2LSB
#else
#define ELF_DATA ELFDATA2MSB
#endif
#define ELF_ARCH EM_V850
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 4096
#define ELF_CORE_COPY_REGS(_dest,_regs) \
memcpy((char *) &_dest, (char *) _regs, \
sizeof(struct pt_regs));
/* This yields a mask that user programs can use to figure out what
instruction set this CPU supports. This could be done in user space,
but it's not easy, and we've already done it here. */
#define ELF_HWCAP (0)
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
intent than poking at uname or /proc/cpuinfo.
For the moment, we have only optimizations for the Intel generations,
but that could change... */
#define ELF_PLATFORM (NULL)
#define ELF_PLAT_INIT(_r, load_addr) \
do { \
_r->gpr[0] = _r->gpr[1] = _r->gpr[2] = _r->gpr[3] = \
_r->gpr[4] = _r->gpr[5] = _r->gpr[6] = _r->gpr[7] = \
_r->gpr[8] = _r->gpr[9] = _r->gpr[10] = _r->gpr[11] = \
_r->gpr[12] = _r->gpr[13] = _r->gpr[14] = _r->gpr[15] = \
_r->gpr[16] = _r->gpr[17] = _r->gpr[18] = _r->gpr[19] = \
_r->gpr[20] = _r->gpr[21] = _r->gpr[22] = _r->gpr[23] = \
_r->gpr[24] = _r->gpr[25] = _r->gpr[26] = _r->gpr[27] = \
_r->gpr[28] = _r->gpr[29] = _r->gpr[30] = _r->gpr[31] = \
0; \
} while (0)
#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
#endif /* __V850_ELF_H__ */

6
include/asm-v850/emergency-restart.h
View File

@@ -1,6 +0,0 @@
#ifndef _ASM_EMERGENCY_RESTART_H
#define _ASM_EMERGENCY_RESTART_H
#include <asm-generic/emergency-restart.h>
#endif /* _ASM_EMERGENCY_RESTART_H */

113
include/asm-v850/entry.h
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@@ -1,113 +0,0 @@
/*
* include/asm-v850/entry.h -- Definitions used by low-level trap handlers
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_ENTRY_H__
#define __V850_ENTRY_H__
#include <asm/ptrace.h>
#include <asm/machdep.h>
/* These are special variables using by the kernel trap/interrupt code
to save registers in, at a time when there are no spare registers we
can use to do so, and we can't depend on the value of the stack
pointer. This means that they must be within a signed 16-bit
displacement of 0x00000000. */
#define KERNEL_VAR_SPACE_ADDR R0_RAM_ADDR
#ifdef __ASSEMBLY__
#define KERNEL_VAR(addr) addr[r0]
#else
#define KERNEL_VAR(addr) (*(volatile unsigned long *)(addr))
#endif
/* Kernel stack pointer, 4 bytes. */
#define KSP_ADDR (KERNEL_VAR_SPACE_ADDR + 0)
#define KSP KERNEL_VAR (KSP_ADDR)
/* 1 if in kernel-mode, 0 if in user mode, 1 byte. */
#define KM_ADDR (KERNEL_VAR_SPACE_ADDR + 4)
#define KM KERNEL_VAR (KM_ADDR)
/* Temporary storage for interrupt handlers, 4 bytes. */
#define INT_SCRATCH_ADDR (KERNEL_VAR_SPACE_ADDR + 8)
#define INT_SCRATCH KERNEL_VAR (INT_SCRATCH_ADDR)
/* Where the stack-pointer is saved when jumping to various sorts of
interrupt handlers. ENTRY_SP is used by everything except NMIs,
which have their own location. Higher-priority NMIs can clobber the
value written by a lower priority NMI, since they can't be disabled,
but that's OK, because only NMI0 (the lowest-priority one) is allowed
to return. */
#define ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 12)
#define ENTRY_SP KERNEL_VAR (ENTRY_SP_ADDR)
#define NMI_ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 16)
#define NMI_ENTRY_SP KERNEL_VAR (NMI_ENTRY_SP_ADDR)
#ifdef CONFIG_RESET_GUARD
/* Used to detect unexpected resets (since the v850 has no MMU, any call
through a null pointer will jump to the reset vector). We detect
such resets by checking for a magic value, RESET_GUARD_ACTIVE, in
this location. Properly resetting the machine stores zero there, so
it shouldn't trigger the guard; the power-on value is uncertain, but
it's unlikely to be RESET_GUARD_ACTIVE. */
#define RESET_GUARD_ADDR (KERNEL_VAR_SPACE_ADDR + 28)
#define RESET_GUARD KERNEL_VAR (RESET_GUARD_ADDR)
#define RESET_GUARD_ACTIVE 0xFAB4BEEF
#endif /* CONFIG_RESET_GUARD */
#ifdef CONFIG_V850E_HIGHRES_TIMER
#define HIGHRES_TIMER_SLOW_TICKS_ADDR (KERNEL_VAR_SPACE_ADDR + 32)
#define HIGHRES_TIMER_SLOW_TICKS KERNEL_VAR (HIGHRES_TIMER_SLOW_TICKS_ADDR)
#endif /* CONFIG_V850E_HIGHRES_TIMER */
#ifndef __ASSEMBLY__
#ifdef CONFIG_RESET_GUARD
/* Turn off reset guard, so that resetting the machine works normally.
This should be called in the various machine_halt, etc., functions. */
static inline void disable_reset_guard (void)
{
RESET_GUARD = 0;
}
#endif /* CONFIG_RESET_GUARD */
#endif /* !__ASSEMBLY__ */
/* A `state save frame' is a struct pt_regs preceded by some extra space
suitable for a function call stack frame. */
/* Amount of room on the stack reserved for arguments and to satisfy the
C calling conventions, in addition to the space used by the struct
pt_regs that actually holds saved values. */
#define STATE_SAVE_ARG_SPACE (6*4) /* Up to six arguments. */
#ifdef __ASSEMBLY__
/* The size of a state save frame. */
#define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
#else /* !__ASSEMBLY__ */
/* The size of a state save frame. */
#define STATE_SAVE_SIZE (sizeof (struct pt_regs) + STATE_SAVE_ARG_SPACE)
#endif /* __ASSEMBLY__ */
/* Offset of the struct pt_regs in a state save frame. */
#define STATE_SAVE_PT_OFFSET STATE_SAVE_ARG_SPACE
#endif /* __V850_ENTRY_H__ */

6
include/asm-v850/errno.h
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@@ -1,6 +0,0 @@
#ifndef __V850_ERRNO_H__
#define __V850_ERRNO_H__
#include <asm-generic/errno.h>
#endif /* __V850_ERRNO_H__ */

12
include/asm-v850/fb.h
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@@ -1,12 +0,0 @@
#ifndef _ASM_FB_H_
#define _ASM_FB_H_
#include <linux/fb.h>
#define fb_pgprotect(...) do {} while (0)
static inline int fb_is_primary_device(struct fb_info *info)
{
return 0;
}
#endif /* _ASM_FB_H_ */

11
include/asm-v850/fcntl.h
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@@ -1,11 +0,0 @@
#ifndef __V850_FCNTL_H__
#define __V850_FCNTL_H__
#define O_DIRECTORY 040000 /* must be a directory */
#define O_NOFOLLOW 0100000 /* don't follow links */
#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
#define O_LARGEFILE 0400000
#include <asm-generic/fcntl.h>
#endif /* __V850_FCNTL_H__ */

133
include/asm-v850/flat.h
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@@ -1,133 +0,0 @@
/*
* include/asm-v850/flat.h -- uClinux flat-format executables
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_FLAT_H__
#define __V850_FLAT_H__
/* The amount by which a relocation can exceed the program image limits
without being regarded as an error. On the v850, the relocations of
some base-pointers can be offset by 0x8000 (to allow better usage of the
space offered by 16-bit signed offsets -- in most cases the offsets used
with such a base-pointer will be negative). */
#define flat_reloc_valid(reloc, size) ((reloc) <= (size + 0x8000))
#define flat_stack_align(sp) /* nothing needed */
#define flat_argvp_envp_on_stack() 0
#define flat_old_ram_flag(flags) (flags)
#define flat_set_persistent(relval, p) 0
/* We store the type of relocation in the top 4 bits of the `relval.' */
/* Convert a relocation entry into an address. */
static inline unsigned long
flat_get_relocate_addr (unsigned long relval)
{
return relval & 0x0fffffff; /* Mask out top 4-bits */
}
#define flat_v850_get_reloc_type(relval) ((relval) >> 28)
#define FLAT_V850_R_32 0 /* Normal 32-bit reloc */
#define FLAT_V850_R_HI16S_LO15 1 /* High 16-bits + signed 15-bit low field */
#define FLAT_V850_R_HI16S_LO16 2 /* High 16-bits + signed 16-bit low field */
/* Extract the address to be relocated from the symbol reference at RP;
RELVAL is the raw relocation-table entry from which RP is derived.
For the v850, RP should always be half-word aligned. */
static inline unsigned long flat_get_addr_from_rp (unsigned long *rp,
unsigned long relval,
unsigned long flags,
unsigned long *persistent)
{
short *srp = (short *)rp;
switch (flat_v850_get_reloc_type (relval))
{
case FLAT_V850_R_32:
/* Simple 32-bit address. */
return srp[0] | (srp[1] << 16);
case FLAT_V850_R_HI16S_LO16:
/* The high and low halves of the address are in the 16
bits at RP, and the 2nd word of the 32-bit instruction
following that, respectively. The low half is _signed_
so we have to sign-extend it and add it to the upper
half instead of simply or-ing them together.
Unlike most relocated address, this one is stored in
native (little-endian) byte-order to avoid problems with
trashing the low-order bit, so we have to convert to
network-byte-order before returning, as that's what the
caller expects. */
return htonl ((srp[0] << 16) + srp[2]);
case FLAT_V850_R_HI16S_LO15:
/* The high and low halves of the address are in the 16
bits at RP, and the upper 15 bits of the 2nd word of the
32-bit instruction following that, respectively. The
low half is _signed_ so we have to sign-extend it and
add it to the upper half instead of simply or-ing them
together. The lowest bit is always zero.
Unlike most relocated address, this one is stored in
native (little-endian) byte-order to avoid problems with
trashing the low-order bit, so we have to convert to
network-byte-order before returning, as that's what the
caller expects. */
return htonl ((srp[0] << 16) + (srp[2] & ~0x1));
default:
return ~0; /* bogus value */
}
}
/* Insert the address ADDR into the symbol reference at RP;
RELVAL is the raw relocation-table entry from which RP is derived.
For the v850, RP should always be half-word aligned. */
static inline void flat_put_addr_at_rp (unsigned long *rp, unsigned long addr,
unsigned long relval)
{
short *srp = (short *)rp;
switch (flat_v850_get_reloc_type (relval)) {
case FLAT_V850_R_32:
/* Simple 32-bit address. */
srp[0] = addr & 0xFFFF;
srp[1] = (addr >> 16);
break;
case FLAT_V850_R_HI16S_LO16:
/* The high and low halves of the address are in the 16
bits at RP, and the 2nd word of the 32-bit instruction
following that, respectively. The low half is _signed_
so we must carry its sign bit to the upper half before
writing the upper half. */
srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
srp[2] = addr & 0xFFFF;
break;
case FLAT_V850_R_HI16S_LO15:
/* The high and low halves of the address are in the 16
bits at RP, and the upper 15 bits of the 2nd word of the
32-bit instruction following that, respectively. The
low half is _signed_ so we must carry its sign bit to
the upper half before writing the upper half. The
lowest bit we preserve from the existing instruction. */
srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
srp[2] = (addr & 0xFFFE) | (srp[2] & 0x1);
break;
}
}
#endif /* __V850_FLAT_H__ */

82
include/asm-v850/fpga85e2c.h
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@@ -1,82 +0,0 @@
/*
* include/asm-v850/fpga85e2c.h -- Machine-dependent defs for
* FPGA implementation of V850E2/NA85E2C
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_FPGA85E2C_H__
#define __V850_FPGA85E2C_H__
#include <asm/v850e2.h>
#include <asm/clinkage.h>
#define CPU_MODEL "v850e2/fpga85e2c"
#define CPU_MODEL_LONG "NEC V850E2/NA85E2C"
#define PLATFORM "fpga85e2c"
#define PLATFORM_LONG "NA85E2C FPGA implementation"
/* `external ram'. */
#define ERAM_ADDR 0
#define ERAM_SIZE 0x00100000 /* 1MB */
/* FPGA specific control registers. */
/* Writing a non-zero value to FLGREG(0) will signal the controlling CPU
to stop execution. */
#define FLGREG_ADDR(n) (0xFFE80100 + 2*(n))
#define FLGREG(n) (*(volatile unsigned char *)FLGREG_ADDR (n))
#define FLGREG_NUM 2
#define CSDEV_ADDR(n) (0xFFE80110 + 2*(n))
#define CSDEV(n) (*(volatile unsigned char *)CSDEV_ADDR (n))
/* Timer interrupts 0-3, interrupt at intervals from CLK/4096 to CLK/16384. */
#define IRQ_RPU(n) (60 + (n))
#define IRQ_RPU_NUM 4
/* For <asm/irq.h> */
#define NUM_CPU_IRQS 64
/* General-purpose timer. */
/* control/status register (can only be read/written via bit insns) */
#define RPU_GTMC_ADDR 0xFFFFFB00
#define RPU_GTMC (*(volatile unsigned char *)RPU_GTMC_ADDR)
#define RPU_GTMC_CE_BIT 7 /* clock enable (control) */
#define RPU_GTMC_OV_BIT 6 /* overflow (status) */
#define RPU_GTMC_CLK_BIT 1 /* 0 = .5 MHz CLK, 1 = 1 Mhz (control) */
/* 32-bit count (8 least-significant bits are always zero). */
#define RPU_GTM_ADDR 0xFFFFFB28
#define RPU_GTM (*(volatile unsigned long *)RPU_GTMC_ADDR)
/* For <asm/page.h> */
#define PAGE_OFFSET ERAM_ADDR /* minimum allocatable address */
/* For <asm/entry.h> */
/* `R0 RAM', used for a few miscellaneous variables that must be accessible
using a load instruction relative to R0. The FPGA implementation
actually has no on-chip RAM, so we use part of main ram just after the
interrupt vectors. */
#ifdef __ASSEMBLY__
#define R0_RAM_ADDR lo(C_SYMBOL_NAME(_r0_ram))
#else
extern char _r0_ram;
#define R0_RAM_ADDR ((unsigned long)&_r0_ram);
#endif
#endif /* __V850_FPGA85E2C_H__ */

6
include/asm-v850/futex.h
View File

@@ -1,6 +0,0 @@
#ifndef _ASM_FUTEX_H
#define _ASM_FUTEX_H
#include <asm-generic/futex.h>
#endif

97
include/asm-v850/gbus_int.h
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@@ -1,97 +0,0 @@
/*
* include/asm-v850/gbus_int.h -- Midas labs GBUS interrupt support
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_GBUS_INT_H__
#define __V850_GBUS_INT_H__
/* The GBUS interrupt interface has 32 interrupts shared among 4
processor interrupts. The 32 GBUS interrupts are divided into two
sets of 16 each, for allocating among control registers, etc (there
are two of each control register, with bits 0-15 controlling an
interrupt each). */
/* The GBUS interrupts themselves. */
#define IRQ_GBUS_INT(n) (GBUS_INT_BASE_IRQ + (n))
#define IRQ_GBUS_INT_NUM 32
/* Control registers. */
#define GBUS_INT_STATUS_ADDR(w) (GBUS_INT_BASE_ADDR + (w)*0x40)
#define GBUS_INT_STATUS(w) (*(volatile u16 *)GBUS_INT_STATUS_ADDR(w))
#define GBUS_INT_CLEAR_ADDR(w) (GBUS_INT_BASE_ADDR + 0x10 + (w)*0x40)
#define GBUS_INT_CLEAR(w) (*(volatile u16 *)GBUS_INT_CLEAR_ADDR(w))
#define GBUS_INT_EDGE_ADDR(w) (GBUS_INT_BASE_ADDR + 0x20 + (w)*0x40)
#define GBUS_INT_EDGE(w) (*(volatile u16 *)GBUS_INT_EDGE_ADDR(w))
#define GBUS_INT_POLARITY_ADDR(w) (GBUS_INT_BASE_ADDR + 0x30 + (w)*0x40)
#define GBUS_INT_POLARITY(w) (*(volatile u16 *)GBUS_INT_POLARITY_ADDR(w))
/* This allows enabling interrupt bits in word W for interrupt GINTn. */
#define GBUS_INT_ENABLE_ADDR(w, n) \
(GBUS_INT_BASE_ADDR + 0x100 + (w)*0x10 + (n)*0x20)
#define GBUS_INT_ENABLE(w, n) (*(volatile u16 *)GBUS_INT_ENABLE_ADDR(w, n))
/* Mapping between kernel interrupt numbers and hardware control regs/bits. */
#define GBUS_INT_BITS_PER_WORD 16
#define GBUS_INT_NUM_WORDS (IRQ_GBUS_INT_NUM / GBUS_INT_BITS_PER_WORD)
#define GBUS_INT_IRQ_WORD(irq) (((irq) - GBUS_INT_BASE_IRQ) >> 4)
#define GBUS_INT_IRQ_BIT(irq) (((irq) - GBUS_INT_BASE_IRQ) & 0xF)
#define GBUS_INT_IRQ_MASK(irq) (1 << GBUS_INT_IRQ_BIT(irq))
/* Possible priorities for GBUS interrupts. */
#define GBUS_INT_PRIORITY_HIGH 2
#define GBUS_INT_PRIORITY_MEDIUM 4
#define GBUS_INT_PRIORITY_LOW 6
#ifndef __ASSEMBLY__
/* Enable interrupt handling for interrupt IRQ. */
extern void gbus_int_enable_irq (unsigned irq);
/* Disable interrupt handling for interrupt IRQ. Note that any
interrupts received while disabled will be delivered once the
interrupt is enabled again, unless they are explicitly cleared using
`gbus_int_clear_pending_irq'. */
extern void gbus_int_disable_irq (unsigned irq);
/* Return true if interrupt handling for interrupt IRQ is enabled. */
extern int gbus_int_irq_enabled (unsigned irq);
/* Disable all GBUS irqs. */
extern void gbus_int_disable_irqs (void);
/* Clear any pending interrupts for IRQ. */
extern void gbus_int_clear_pending_irq (unsigned irq);
/* Return true if interrupt IRQ is pending (but disabled). */
extern int gbus_int_irq_pending (unsigned irq);
struct gbus_int_irq_init {
const char *name; /* name of interrupt type */
/* Range of kernel irq numbers for this type:
BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */
unsigned base, num, interval;
unsigned priority; /* interrupt priority to assign */
};
struct hw_interrupt_type; /* fwd decl */
/* Initialize HW_IRQ_TYPES for GBUS irqs described in array
INITS (which is terminated by an entry with the name field == 0). */
extern void gbus_int_init_irq_types (struct gbus_int_irq_init *inits,
struct hw_interrupt_type *hw_irq_types);
/* Initialize GBUS interrupts. */
extern void gbus_int_init_irqs (void);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_GBUS_INT_H__ */

28
include/asm-v850/hardirq.h
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@@ -1,28 +0,0 @@
#ifndef __V850_HARDIRQ_H__
#define __V850_HARDIRQ_H__
#include <linux/threads.h>
#include <linux/cache.h>
#include <asm/irq.h>
typedef struct {
unsigned int __softirq_pending;
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
#define HARDIRQ_BITS 8
/*
* The hardirq mask has to be large enough to have
* space for potentially all IRQ sources in the system
* nesting on a single CPU:
*/
#if (1 << HARDIRQ_BITS) < NR_IRQS
# error HARDIRQ_BITS is too low!
#endif
void ack_bad_irq(unsigned int irq);
#endif /* __V850_HARDIRQ_H__ */

44
include/asm-v850/highres_timer.h
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@@ -1,44 +0,0 @@
/*
* include/asm-v850/highres_timer.h -- High resolution timing routines
*
* Copyright (C) 2001,03 NEC Electronics Corporation
* Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_HIGHRES_TIMER_H__
#define __V850_HIGHRES_TIMER_H__
#ifndef __ASSEMBLY__
#include <linux/time.h>
#endif
#include <asm/entry.h>
/* Frequency of the `slow ticks' (one tick each time the fast-tick
counter overflows). */
#define HIGHRES_TIMER_SLOW_TICK_RATE 25
/* Which timer in the V850E `Timer D' we use. */
#define HIGHRES_TIMER_TIMER_D_UNIT 3
#ifndef __ASSEMBLY__
extern void highres_timer_start (void), highres_timer_stop (void);
extern void highres_timer_reset (void);
extern void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks);
extern void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks,
struct timeval *tv);
extern void highres_timer_read (struct timeval *tv);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_HIGHRES_TIMER_H__ */

4
include/asm-v850/hw_irq.h
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@@ -1,4 +0,0 @@
#ifndef __V850_HW_IRQ_H__
#define __V850_HW_IRQ_H__
#endif /* __V850_HW_IRQ_H__ */

142
include/asm-v850/io.h
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@@ -1,142 +0,0 @@
/*
* include/asm-v850/io.h -- Misc I/O operations
*
* Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
* Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_IO_H__
#define __V850_IO_H__
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define readb(addr) \
({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
#define readw(addr) \
({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
#define readl(addr) \
({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; })
#define readb_relaxed(a) readb(a)
#define readw_relaxed(a) readw(a)
#define readl_relaxed(a) readl(a)
#define writeb(val, addr) \
(void)((*(volatile unsigned char *) (addr)) = (val))
#define writew(val, addr) \
(void)((*(volatile unsigned short *) (addr)) = (val))
#define writel(val, addr) \
(void)((*(volatile unsigned int *) (addr)) = (val))
#define __raw_readb readb
#define __raw_readw readw
#define __raw_readl readl
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel
#define inb(addr) readb (addr)
#define inw(addr) readw (addr)
#define inl(addr) readl (addr)
#define outb(x, addr) ((void) writeb (x, addr))
#define outw(x, addr) ((void) writew (x, addr))
#define outl(x, addr) ((void) writel (x, addr))
#define inb_p(port) inb((port))
#define outb_p(val, port) outb((val), (port))
#define inw_p(port) inw((port))
#define outw_p(val, port) outw((val), (port))
#define inl_p(port) inl((port))
#define outl_p(val, port) outl((val), (port))
static inline void insb (unsigned long port, void *dst, unsigned long count)
{
unsigned char *p = dst;
while (count--)
*p++ = inb (port);
}
static inline void insw (unsigned long port, void *dst, unsigned long count)
{
unsigned short *p = dst;
while (count--)
*p++ = inw (port);
}
static inline void insl (unsigned long port, void *dst, unsigned long count)
{
unsigned long *p = dst;
while (count--)
*p++ = inl (port);
}
static inline void
outsb (unsigned long port, const void *src, unsigned long count)
{
const unsigned char *p = src;
while (count--)
outb (*p++, port);
}
static inline void
outsw (unsigned long port, const void *src, unsigned long count)
{
const unsigned short *p = src;
while (count--)
outw (*p++, port);
}
static inline void
outsl (unsigned long port, const void *src, unsigned long count)
{
const unsigned long *p = src;
while (count--)
outl (*p++, port);
}
/* Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to
long before casting it to a pointer to avoid compiler warnings. */
#define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr))
#define iounmap(addr) ((void)0)
#define ioremap_nocache(physaddr, size) ioremap (physaddr, size)
#define ioremap_writethrough(physaddr, size) ioremap (physaddr, size)
#define ioremap_fullcache(physaddr, size) ioremap (physaddr, size)
#define ioread8(addr) readb (addr)
#define ioread16(addr) readw (addr)
#define ioread32(addr) readl (addr)
#define iowrite8(val, addr) writeb (val, addr)
#define iowrite16(val, addr) writew (val, addr)
#define iowrite32(val, addr) writel (val, addr)
#define mmiowb()
#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
#if 0
/* This is really stupid; don't define it. */
#define page_to_bus(page) page_to_phys (page)
#endif
/* Conversion between virtual and physical mappings. */
#define phys_to_virt(addr) ((void *)__phys_to_virt (addr))
#define virt_to_phys(addr) ((unsigned long)__virt_to_phys (addr))
#define memcpy_fromio(dst, src, len) memcpy (dst, (void *)src, len)
#define memcpy_toio(dst, src, len) memcpy ((void *)dst, src, len)
/*
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
* access
*/
#define xlate_dev_mem_ptr(p) __va(p)
/*
* Convert a virtual cached pointer to an uncached pointer
*/
#define xlate_dev_kmem_ptr(p) p
#endif /* __V850_IO_H__ */

1
include/asm-v850/ioctl.h
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@@ -1 +0,0 @@
#include <asm-generic/ioctl.h>

84
include/asm-v850/ioctls.h
View File

@@ -1,84 +0,0 @@
#ifndef __V850_IOCTLS_H__
#define __V850_IOCTLS_H__
#include <asm/ioctl.h>
/* 0x54 is just a magic number to make these relatively unique ('T') */
#define TCGETS 0x5401
#define TCSETS 0x5402
#define TCSETSW 0x5403
#define TCSETSF 0x5404
#define TCGETA 0x5405
#define TCSETA 0x5406
#define TCSETAW 0x5407
#define TCSETAF 0x5408
#define TCSBRK 0x5409
#define TCXONC 0x540A
#define TCFLSH 0x540B
#define TIOCEXCL 0x540C
#define TIOCNXCL 0x540D
#define TIOCSCTTY 0x540E
#define TIOCGPGRP 0x540F
#define TIOCSPGRP 0x5410
#define TIOCOUTQ 0x5411
#define TIOCSTI 0x5412
#define TIOCGWINSZ 0x5413
#define TIOCSWINSZ 0x5414
#define TIOCMGET 0x5415
#define TIOCMBIS 0x5416
#define TIOCMBIC 0x5417
#define TIOCMSET 0x5418
#define TIOCGSOFTCAR 0x5419
#define TIOCSSOFTCAR 0x541A
#define FIONREAD 0x541B
#define TIOCINQ FIONREAD
#define TIOCLINUX 0x541C
#define TIOCCONS 0x541D
#define TIOCGSERIAL 0x541E
#define TIOCSSERIAL 0x541F
#define TIOCPKT 0x5420
#define FIONBIO 0x5421
#define TIOCNOTTY 0x5422
#define TIOCSETD 0x5423
#define TIOCGETD 0x5424
#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
#define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x5429 /* Return the session ID of FD */
#define TCGETS2 _IOR('T',0x2A, struct termios2)
#define TCSETS2 _IOW('T',0x2B, struct termios2)
#define TCSETSW2 _IOW('T',0x2C, struct termios2)
#define TCSETSF2 _IOW('T',0x2D, struct termios2)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
#define FIOCLEX 0x5451
#define FIOASYNC 0x5452
#define TIOCSERCONFIG 0x5453
#define TIOCSERGWILD 0x5454
#define TIOCSERSWILD 0x5455
#define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457
#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
#define TIOCSERGETLSR 0x5459 /* Get line status register */
#define TIOCSERGETMULTI 0x545A /* Get multiport config */
#define TIOCSERSETMULTI 0x545B /* Set multiport config */
#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
#define FIOQSIZE 0x545E
/* Used for packet mode */
#define TIOCPKT_DATA 0
#define TIOCPKT_FLUSHREAD 1
#define TIOCPKT_FLUSHWRITE 2
#define TIOCPKT_STOP 4
#define TIOCPKT_START 8
#define TIOCPKT_NOSTOP 16
#define TIOCPKT_DOSTOP 32
#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
#endif /* __V850_IOCTLS_H__ */

29
include/asm-v850/ipcbuf.h
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@@ -1,29 +0,0 @@
#ifndef __V850E_IPCBUF_H__
#define __V850E_IPCBUF_H__
/*
* The user_ipc_perm structure for v850e architecture.
* Note extra padding because this structure is passed back and forth
* between kernel and user space.
*
* Pad space is left for:
* - 32-bit mode_t and seq
* - 2 miscellaneous 32-bit values
*/
struct ipc64_perm
{
__kernel_key_t key;
__kernel_uid32_t uid;
__kernel_gid32_t gid;
__kernel_uid32_t cuid;
__kernel_gid32_t cgid;
__kernel_mode_t mode;
unsigned short __pad1;
unsigned short seq;
unsigned short __pad2;
unsigned long __unused1;
unsigned long __unused2;
};
#endif /* __V850E_IPCBUF_H__ */

55
include/asm-v850/irq.h
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@@ -1,55 +0,0 @@
/*
* include/asm-v850/irq.h -- Machine interrupt handling
*
* Copyright (C) 2001,02,04 NEC Electronics Corporation
* Copyright (C) 2001,02,04 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_IRQ_H__
#define __V850_IRQ_H__
#include <asm/machdep.h>
/* Default NUM_MACH_IRQS. */
#ifndef NUM_MACH_IRQS
#define NUM_MACH_IRQS NUM_CPU_IRQS
#endif
/* NMIs have IRQ numbers from FIRST_NMI to FIRST_NMI+NUM_NMIS-1. */
#define FIRST_NMI NUM_MACH_IRQS
#define IRQ_NMI(n) (FIRST_NMI + (n))
/* v850 processors have 3 non-maskable interrupts. */
#define NUM_NMIS 3
/* Includes both maskable and non-maskable irqs. */
#define NR_IRQS (NUM_MACH_IRQS + NUM_NMIS)
#ifndef __ASSEMBLY__
struct pt_regs;
struct hw_interrupt_type;
struct irqaction;
#define irq_canonicalize(irq) (irq)
/* Initialize irq handling for IRQs.
BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL
to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */
extern void
init_irq_handlers (int base_irq, int num, int interval,
struct hw_interrupt_type *irq_type);
/* Handle interrupt IRQ. REGS are the registers at the time of ther
interrupt. */
extern unsigned int handle_irq (int irq, struct pt_regs *regs);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_IRQ_H__ */

1
include/asm-v850/irq_regs.h
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@@ -1 +0,0 @@
#include <asm-generic/irq_regs.h>

1
include/asm-v850/kdebug.h
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@@ -1 +0,0 @@
#include <asm-generic/kdebug.h>

19
include/asm-v850/kmap_types.h
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@@ -1,19 +0,0 @@
#ifndef __V850_KMAP_TYPES_H__
#define __V850_KMAP_TYPES_H__
enum km_type {
KM_BOUNCE_READ,
KM_SKB_SUNRPC_DATA,
KM_SKB_DATA_SOFTIRQ,
KM_USER0,
KM_USER1,
KM_BIO_SRC_IRQ,
KM_BIO_DST_IRQ,
KM_PTE0,
KM_PTE1,
KM_IRQ0,
KM_IRQ1,
KM_TYPE_NR
};
#endif /* __V850_KMAP_TYPES_H__ */

6
include/asm-v850/kvm.h
View File

@@ -1,6 +0,0 @@
#ifndef __LINUX_KVM_V850_H
#define __LINUX_KVM_V850_H
/* v850 does not support KVM */
#endif

8
include/asm-v850/linkage.h
View File

@@ -1,8 +0,0 @@
#ifndef __ASM_LINKAGE_H
#define __ASM_LINKAGE_H
#ifdef __ASSEMBLY__
#include <asm/asm.h>
#endif
#endif

6
include/asm-v850/local.h
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@@ -1,6 +0,0 @@
#ifndef __V850_LOCAL_H__
#define __V850_LOCAL_H__
#include <asm-generic/local.h>
#endif /* __V850_LOCAL_H__ */

101
include/asm-v850/ma.h
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@@ -1,101 +0,0 @@
/*
* include/asm-v850/ma.h -- V850E/MA series of cpu chips
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_MA_H__
#define __V850_MA_H__
/* The MA series uses the V850E cpu core. */
#include <asm/v850e.h>
/* For <asm/entry.h> */
/* We use on-chip RAM, for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. The amount
varies between chip models, but there's always at least 4K, and it
should always start at FFFFC000. */
#define R0_RAM_ADDR 0xFFFFC000
/* MA series UART details. */
#define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
/* This is a function that gets called before configuring the UART. */
#define V850E_UART_PRE_CONFIGURE ma_uart_pre_configure
#ifndef __ASSEMBLY__
extern void ma_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* MA series timer C details. */
#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
/* MA series timer D details. */
#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
#define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
/* Port 0 */
/* Direct I/O. Bits 0-7 are pins P00-P07. */
#define MA_PORT0_IO_ADDR 0xFFFFF400
#define MA_PORT0_IO (*(volatile u8 *)MA_PORT0_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define MA_PORT0_PM_ADDR 0xFFFFF420
#define MA_PORT0_PM (*(volatile u8 *)MA_PORT0_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define MA_PORT0_PMC_ADDR 0xFFFFF440
#define MA_PORT0_PMC (*(volatile u8 *)MA_PORT0_PMC_ADDR)
/* Port function control (for P04-P07, 0 = IRQ, 1 = DMARQ). */
#define MA_PORT0_PFC_ADDR 0xFFFFF460
#define MA_PORT0_PFC (*(volatile u8 *)MA_PORT0_PFC_ADDR)
/* Port 1 */
/* Direct I/O. Bits 0-3 are pins P10-P13. */
#define MA_PORT1_IO_ADDR 0xFFFFF402
#define MA_PORT1_IO (*(volatile u8 *)MA_PORT1_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define MA_PORT1_PM_ADDR 0xFFFFF420
#define MA_PORT1_PM (*(volatile u8 *)MA_PORT1_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define MA_PORT1_PMC_ADDR 0xFFFFF442
#define MA_PORT1_PMC (*(volatile u8 *)MA_PORT1_PMC_ADDR)
/* Port 4 */
/* Direct I/O. Bits 0-5 are pins P40-P45. */
#define MA_PORT4_IO_ADDR 0xFFFFF408
#define MA_PORT4_IO (*(volatile u8 *)MA_PORT4_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define MA_PORT4_PM_ADDR 0xFFFFF428
#define MA_PORT4_PM (*(volatile u8 *)MA_PORT4_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define MA_PORT4_PMC_ADDR 0xFFFFF448
#define MA_PORT4_PMC (*(volatile u8 *)MA_PORT4_PMC_ADDR)
/* Port function control (for serial interfaces, 0 = CSI, 1 = UART). */
#define MA_PORT4_PFC_ADDR 0xFFFFF468
#define MA_PORT4_PFC (*(volatile u8 *)MA_PORT4_PFC_ADDR)
#ifndef __ASSEMBLY__
/* Initialize MA chip interrupts. */
extern void ma_init_irqs (void);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_MA_H__ */

50
include/asm-v850/ma1.h
View File

@@ -1,50 +0,0 @@
/*
* include/asm-v850/ma1.h -- V850E/MA1 cpu chip
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_MA1_H__
#define __V850_MA1_H__
/* Inherit more generic details from MA series. */
#include <asm/ma.h>
#define CPU_MODEL "v850e/ma1"
#define CPU_MODEL_LONG "NEC V850E/MA1"
/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
#define IRQ_INTOV(n) (n) /* 0-3 */
#define IRQ_INTOV_NUM 4
#define IRQ_INTP(n) (0x4 + (n)) /* Pnnn (pin) interrupts */
#define IRQ_INTP_NUM 24
#define IRQ_INTCMD(n) (0x1c + (n)) /* interval timer interrupts 0-3 */
#define IRQ_INTCMD_NUM 4
#define IRQ_INTDMA(n) (0x20 + (n)) /* DMA interrupts 0-3 */
#define IRQ_INTDMA_NUM 4
#define IRQ_INTCSI(n) (0x24 + (n)*4)/* CSI 0-2 transmit/receive completion */
#define IRQ_INTCSI_NUM 3
#define IRQ_INTSER(n) (0x25 + (n)*4) /* UART 0-2 reception error */
#define IRQ_INTSER_NUM 3
#define IRQ_INTSR(n) (0x26 + (n)*4) /* UART 0-2 reception completion */
#define IRQ_INTSR_NUM 3
#define IRQ_INTST(n) (0x27 + (n)*4) /* UART 0-2 transmission completion */
#define IRQ_INTST_NUM 3
#define NUM_CPU_IRQS 0x30
/* The MA1 has a UART with 3 channels. */
#define V850E_UART_NUM_CHANNELS 3
#endif /* __V850_MA1_H__ */

60
include/asm-v850/machdep.h
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@@ -1,60 +0,0 @@
/*
* include/asm-v850/machdep.h -- Machine-dependent definitions
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_MACHDEP_H__
#define __V850_MACHDEP_H__
/* chips */
#ifdef CONFIG_V850E_MA1
#include <asm/ma1.h>
#endif
#ifdef CONFIG_V850E_ME2
#include <asm/me2.h>
#endif
#ifdef CONFIG_V850E_TEG
#include <asm/teg.h>
#endif
/* These are both chips _and_ platforms, so put them in the middle... */
#ifdef CONFIG_V850E2_ANNA
#include <asm/anna.h>
#endif
#ifdef CONFIG_V850E_AS85EP1
#include <asm/as85ep1.h>
#endif
/* platforms */
#ifdef CONFIG_RTE_CB_MA1
#include <asm/rte_ma1_cb.h>
#endif
#ifdef CONFIG_RTE_CB_ME2
#include <asm/rte_me2_cb.h>
#endif
#ifdef CONFIG_RTE_CB_NB85E
#include <asm/rte_nb85e_cb.h>
#endif
#ifdef CONFIG_V850E_SIM
#include <asm/sim.h>
#endif
#ifdef CONFIG_V850E2_SIM85E2C
#include <asm/sim85e2c.h>
#endif
#ifdef CONFIG_V850E2_SIM85E2S
#include <asm/sim85e2s.h>
#endif
#ifdef CONFIG_V850E2_FPGA85E2C
#include <asm/fpga85e2c.h>
#endif
#endif /* __V850_MACHDEP_H__ */

17
include/asm-v850/macrology.h
View File

@@ -1,17 +0,0 @@
/*
* include/asm-v850/macrology.h -- Various useful CPP macros
*
* Copyright (C) 2001 NEC Corporation
* Copyright (C) 2001 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#define macrology_paste(arg1, arg2) macrology_paste_1(arg1, arg2)
#define macrology_paste_1(arg1, arg2) arg1 ## arg2
#define macrology_stringify(sym) macrology_stringify_1(sym)
#define macrology_stringify_1(sym) #sym

182
include/asm-v850/me2.h
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@@ -1,182 +0,0 @@
/*
* include/asm-v850/me2.h -- V850E/ME2 cpu chip
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_ME2_H__
#define __V850_ME2_H__
#include <asm/v850e.h>
#include <asm/v850e_cache.h>
#define CPU_MODEL "v850e/me2"
#define CPU_MODEL_LONG "NEC V850E/ME2"
/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
#define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts */
#define IRQ_INTP_NUM 31
#define IRQ_INTCMD(n) (0x31 + (n)) /* interval timer interrupts 0-3 */
#define IRQ_INTCMD_NUM 4
#define IRQ_INTDMA(n) (0x41 + (n)) /* DMA interrupts 0-3 */
#define IRQ_INTDMA_NUM 4
#define IRQ_INTUBTIRE(n) (0x49 + (n)*5)/* UARTB 0-1 reception error */
#define IRQ_INTUBTIRE_NUM 2
#define IRQ_INTUBTIR(n) (0x4a + (n)*5) /* UARTB 0-1 reception complete */
#define IRQ_INTUBTIR_NUM 2
#define IRQ_INTUBTIT(n) (0x4b + (n)*5) /* UARTB 0-1 transmission complete */
#define IRQ_INTUBTIT_NUM 2
#define IRQ_INTUBTIF(n) (0x4c + (n)*5) /* UARTB 0-1 FIFO trans. complete */
#define IRQ_INTUBTIF_NUM 2
#define IRQ_INTUBTITO(n) (0x4d + (n)*5) /* UARTB 0-1 reception timeout */
#define IRQ_INTUBTITO_NUM 2
/* For <asm/irq.h> */
#define NUM_CPU_IRQS 0x59 /* V850E/ME2 */
/* For <asm/entry.h> */
/* We use on-chip RAM, for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. */
#define R0_RAM_ADDR 0xFFFFB000 /* V850E/ME2 */
/* V850E/ME2 UARTB details.*/
#define V850E_UART_NUM_CHANNELS 2
#define V850E_UARTB_BASE_FREQ (CPU_CLOCK_FREQ / 4)
/* This is a function that gets called before configuring the UART. */
#define V850E_UART_PRE_CONFIGURE me2_uart_pre_configure
#ifndef __ASSEMBLY__
extern void me2_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif /* __ASSEMBLY__ */
/* V850E/ME2 timer C details. */
#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
/* V850E/ME2 timer D details. */
#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
#define V850E_TIMER_D_BASE_FREQ (CPU_CLOCK_FREQ / 2)
/* Select iRAM mode. */
#define ME2_IRAMM_ADDR 0xFFFFF80A
#define ME2_IRAMM (*(volatile u8*)ME2_IRAMM_ADDR)
/* Interrupt edge-detection configuration. INTF(n) and INTR(n) are only
valid for n == 1, 2, or 5. */
#define ME2_INTF_ADDR(n) (0xFFFFFC00 + (n) * 0x2)
#define ME2_INTF(n) (*(volatile u8*)ME2_INTF_ADDR(n))
#define ME2_INTR_ADDR(n) (0xFFFFFC20 + (n) * 0x2)
#define ME2_INTR(n) (*(volatile u8*)ME2_INTR_ADDR(n))
#define ME2_INTFAL_ADDR 0xFFFFFC10
#define ME2_INTFAL (*(volatile u8*)ME2_INTFAL_ADDR)
#define ME2_INTRAL_ADDR 0xFFFFFC30
#define ME2_INTRAL (*(volatile u8*)ME2_INTRAL_ADDR)
#define ME2_INTFDH_ADDR 0xFFFFFC16
#define ME2_INTFDH (*(volatile u16*)ME2_INTFDH_ADDR)
#define ME2_INTRDH_ADDR 0xFFFFFC36
#define ME2_INTRDH (*(volatile u16*)ME2_INTRDH_ADDR)
#define ME2_SESC_ADDR(n) (0xFFFFF609 + (n) * 0x10)
#define ME2_SESC(n) (*(volatile u8*)ME2_SESC_ADDR(n))
#define ME2_SESA10_ADDR 0xFFFFF5AD
#define ME2_SESA10 (*(volatile u8*)ME2_SESA10_ADDR)
#define ME2_SESA11_ADDR 0xFFFFF5DD
#define ME2_SESA11 (*(volatile u8*)ME2_SESA11_ADDR)
/* Port 1 */
/* Direct I/O. Bits 0-3 are pins P10-P13. */
#define ME2_PORT1_IO_ADDR 0xFFFFF402
#define ME2_PORT1_IO (*(volatile u8 *)ME2_PORT1_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ME2_PORT1_PM_ADDR 0xFFFFF422
#define ME2_PORT1_PM (*(volatile u8 *)ME2_PORT1_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define ME2_PORT1_PMC_ADDR 0xFFFFF442
#define ME2_PORT1_PMC (*(volatile u8 *)ME2_PORT1_PMC_ADDR)
/* Port function control (for serial interfaces, 0 = CSI30, 1 = UARTB0 ). */
#define ME2_PORT1_PFC_ADDR 0xFFFFF462
#define ME2_PORT1_PFC (*(volatile u8 *)ME2_PORT1_PFC_ADDR)
/* Port 2 */
/* Direct I/O. Bits 0-3 are pins P20-P25. */
#define ME2_PORT2_IO_ADDR 0xFFFFF404
#define ME2_PORT2_IO (*(volatile u8 *)ME2_PORT2_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ME2_PORT2_PM_ADDR 0xFFFFF424
#define ME2_PORT2_PM (*(volatile u8 *)ME2_PORT2_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define ME2_PORT2_PMC_ADDR 0xFFFFF444
#define ME2_PORT2_PMC (*(volatile u8 *)ME2_PORT2_PMC_ADDR)
/* Port function control (for serial interfaces, 0 = INTP2x, 1 = UARTB1 ). */
#define ME2_PORT2_PFC_ADDR 0xFFFFF464
#define ME2_PORT2_PFC (*(volatile u8 *)ME2_PORT2_PFC_ADDR)
/* Port 5 */
/* Direct I/O. Bits 0-5 are pins P50-P55. */
#define ME2_PORT5_IO_ADDR 0xFFFFF40A
#define ME2_PORT5_IO (*(volatile u8 *)ME2_PORT5_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ME2_PORT5_PM_ADDR 0xFFFFF42A
#define ME2_PORT5_PM (*(volatile u8 *)ME2_PORT5_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define ME2_PORT5_PMC_ADDR 0xFFFFF44A
#define ME2_PORT5_PMC (*(volatile u8 *)ME2_PORT5_PMC_ADDR)
/* Port function control (). */
#define ME2_PORT5_PFC_ADDR 0xFFFFF46A
#define ME2_PORT5_PFC (*(volatile u8 *)ME2_PORT5_PFC_ADDR)
/* Port 6 */
/* Direct I/O. Bits 5-7 are pins P65-P67. */
#define ME2_PORT6_IO_ADDR 0xFFFFF40C
#define ME2_PORT6_IO (*(volatile u8 *)ME2_PORT6_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ME2_PORT6_PM_ADDR 0xFFFFF42C
#define ME2_PORT6_PM (*(volatile u8 *)ME2_PORT6_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define ME2_PORT6_PMC_ADDR 0xFFFFF44C
#define ME2_PORT6_PMC (*(volatile u8 *)ME2_PORT6_PMC_ADDR)
/* Port function control (). */
#define ME2_PORT6_PFC_ADDR 0xFFFFF46C
#define ME2_PORT6_PFC (*(volatile u8 *)ME2_PORT6_PFC_ADDR)
/* Port 7 */
/* Direct I/O. Bits 2-7 are pins P72-P77. */
#define ME2_PORT7_IO_ADDR 0xFFFFF40E
#define ME2_PORT7_IO (*(volatile u8 *)ME2_PORT7_IO_ADDR)
/* Port mode (for direct I/O, 0 = output, 1 = input). */
#define ME2_PORT7_PM_ADDR 0xFFFFF42E
#define ME2_PORT7_PM (*(volatile u8 *)ME2_PORT7_PM_ADDR)
/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
#define ME2_PORT7_PMC_ADDR 0xFFFFF44E
#define ME2_PORT7_PMC (*(volatile u8 *)ME2_PORT7_PMC_ADDR)
/* Port function control (). */
#define ME2_PORT7_PFC_ADDR 0xFFFFF46E
#define ME2_PORT7_PFC (*(volatile u8 *)ME2_PORT7_PFC_ADDR)
#ifndef __ASSEMBLY__
/* Initialize V850E/ME2 chip interrupts. */
extern void me2_init_irqs (void);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_ME2_H__ */

15
include/asm-v850/mman.h
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@@ -1,15 +0,0 @@
#ifndef __V850_MMAN_H__
#define __V850_MMAN_H__
#include <asm-generic/mman.h>
#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
#define MAP_LOCKED 0x2000 /* pages are locked */
#define MAP_NORESERVE 0x4000 /* don't check for reservations */
#define MCL_CURRENT 1 /* lock all current mappings */
#define MCL_FUTURE 2 /* lock all future mappings */
#endif /* __V850_MMAN_H__ */

11
include/asm-v850/mmu.h
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@@ -1,11 +0,0 @@
/* Copyright (C) 2002, 2005, David McCullough <davidm@snapgear.com> */
#ifndef __V850_MMU_H__
#define __V850_MMU_H__
typedef struct {
struct vm_list_struct *vmlist;
unsigned long end_brk;
} mm_context_t;
#endif /* __V850_MMU_H__ */

13
include/asm-v850/mmu_context.h
View File

@@ -1,13 +0,0 @@
#ifndef __V850_MMU_CONTEXT_H__
#define __V850_MMU_CONTEXT_H__
#include <asm-generic/mm_hooks.h>
#define destroy_context(mm) ((void)0)
#define init_new_context(tsk,mm) 0
#define switch_mm(prev,next,tsk) ((void)0)
#define deactivate_mm(tsk,mm) do { } while (0)
#define activate_mm(prev,next) ((void)0)
#define enter_lazy_tlb(mm,tsk) ((void)0)
#endif /* __V850_MMU_CONTEXT_H__ */

62
include/asm-v850/module.h
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@@ -1,62 +0,0 @@
/*
* include/asm-v850/module.h -- Architecture-specific module hooks
*
* Copyright (C) 2001,02,03,04 NEC Corporation
* Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org>
* Copyright (C) 2001,03 Rusty Russell
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*
* Derived in part from include/asm-ppc/module.h
*/
#ifndef __V850_MODULE_H__
#define __V850_MODULE_H__
#define MODULE_SYMBOL_PREFIX "_"
struct v850_plt_entry
{
/* Indirect jump instruction sequence (6-byte mov + 2-byte jr). */
unsigned long tramp[2];
};
struct mod_arch_specific
{
/* Indices of PLT sections within module. */
unsigned int core_plt_section, init_plt_section;
};
#define Elf_Shdr Elf32_Shdr
#define Elf_Sym Elf32_Sym
#define Elf_Ehdr Elf32_Ehdr
/* Make empty sections for module_frob_arch_sections to expand. */
#ifdef MODULE
asm(".section .plt,\"ax\",@nobits; .align 3; .previous");
asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous");
#endif
/* We don't do exception tables. */
struct exception_table_entry;
static inline const struct exception_table_entry *
search_extable(const struct exception_table_entry *first,
const struct exception_table_entry *last,
unsigned long value)
{
return 0;
}
#define ARCH_HAS_SEARCH_EXTABLE
static inline void
sort_extable(struct exception_table_entry *start,
struct exception_table_entry *finish)
{
/* nada */
}
#define ARCH_HAS_SORT_EXTABLE
#endif /* __V850_MODULE_H__ */

31
include/asm-v850/msgbuf.h
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@@ -1,31 +0,0 @@
#ifndef __V850_MSGBUF_H__
#define __V850_MSGBUF_H__
/*
* The msqid64_ds structure for v850 architecture.
* Note extra padding because this structure is passed back and forth
* between kernel and user space.
*
* Pad space is left for:
* - 64-bit time_t to solve y2038 problem
* - 2 miscellaneous 32-bit values
*/
struct msqid64_ds {
struct ipc64_perm msg_perm;
__kernel_time_t msg_stime; /* last msgsnd time */
unsigned long __unused1;
__kernel_time_t msg_rtime; /* last msgrcv time */
unsigned long __unused2;
__kernel_time_t msg_ctime; /* last change time */
unsigned long __unused3;
unsigned long msg_cbytes; /* current number of bytes on queue */
unsigned long msg_qnum; /* number of messages in queue */
unsigned long msg_qbytes; /* max number of bytes on queue */
__kernel_pid_t msg_lspid; /* pid of last msgsnd */
__kernel_pid_t msg_lrpid; /* last receive pid */
unsigned long __unused4;
unsigned long __unused5;
};
#endif /* __V850_MSGBUF_H__ */

9
include/asm-v850/mutex.h
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@@ -1,9 +0,0 @@
/*
* Pull in the generic implementation for the mutex fastpath.
*
* TODO: implement optimized primitives instead, or leave the generic
* implementation in place, or pick the atomic_xchg() based generic
* implementation. (see asm-generic/mutex-xchg.h for details)
*/
#include <asm-generic/mutex-dec.h>

124
include/asm-v850/page.h
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@@ -1,124 +0,0 @@
/*
* include/asm-v850/page.h -- VM ops
*
* Copyright (C) 2001,02,03,05 NEC Electronics Corporation
* Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PAGE_H__
#define __V850_PAGE_H__
#include <asm/machdep.h>
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
/*
* PAGE_OFFSET -- the first address of the first page of memory. For archs with
* no MMU this corresponds to the first free page in physical memory (aligned
* on a page boundary).
*/
#ifndef PAGE_OFFSET
#define PAGE_OFFSET 0x0000000
#endif
#ifndef __ASSEMBLY__
#define STRICT_MM_TYPECHECKS
#define clear_page(page) memset ((void *)(page), 0, PAGE_SIZE)
#define copy_page(to, from) memcpy ((void *)(to), (void *)from, PAGE_SIZE)
#define clear_user_page(addr, vaddr, page) \
do { clear_page(addr); \
flush_dcache_page(page); \
} while (0)
#define copy_user_page(to, from, vaddr, page) \
do { copy_page(to, from); \
flush_dcache_page(page); \
} while (0)
#ifdef STRICT_MM_TYPECHECKS
/*
* These are used to make use of C type-checking..
*/
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct page *pgtable_t;
#define pte_val(x) ((x).pte)
#define pmd_val(x) ((x).pmd)
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#define __pte(x) ((pte_t) { (x) } )
#define __pmd(x) ((pmd_t) { (x) } )
#define __pgd(x) ((pgd_t) { (x) } )
#define __pgprot(x) ((pgprot_t) { (x) } )
#else /* !STRICT_MM_TYPECHECKS */
/*
* .. while these make it easier on the compiler
*/
typedef unsigned long pte_t;
typedef unsigned long pmd_t;
typedef unsigned long pgd_t;
typedef unsigned long pgprot_t;
#define pte_val(x) (x)
#define pmd_val(x) (x)
#define pgd_val(x) (x)
#define pgprot_val(x) (x)
#define __pte(x) (x)
#define __pmd(x) (x)
#define __pgd(x) (x)
#define __pgprot(x) (x)
#endif /* STRICT_MM_TYPECHECKS */
#endif /* !__ASSEMBLY__ */
/* No current v850 processor has virtual memory. */
#define __virt_to_phys(addr) (addr)
#define __phys_to_virt(addr) (addr)
#define virt_to_pfn(kaddr) (__virt_to_phys (kaddr) >> PAGE_SHIFT)
#define pfn_to_virt(pfn) __phys_to_virt ((pfn) << PAGE_SHIFT)
#define MAP_NR(kaddr) \
(((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT)
#define virt_to_page(kaddr) (mem_map + MAP_NR (kaddr))
#define page_to_virt(page) \
((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
#define pfn_valid(pfn) ((pfn) < max_mapnr)
#define virt_addr_valid(kaddr) \
(((void *)(kaddr) >= (void *)PAGE_OFFSET) && MAP_NR (kaddr) < max_mapnr)
#define __pa(x) __virt_to_phys ((unsigned long)(x))
#define __va(x) ((void *)__phys_to_virt ((unsigned long)(x)))
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>
#endif /* __V850_PAGE_H__ */

33
include/asm-v850/param.h
View File

@@ -1,33 +0,0 @@
/*
* include/asm-v850/param.h -- Varions kernel parameters
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PARAM_H__
#define __V850_PARAM_H__
#define EXEC_PAGESIZE 4096
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#ifdef __KERNEL__
# define HZ CONFIG_HZ
# define USER_HZ 100
# define CLOCKS_PER_SEC USER_HZ
#else
# define HZ 100
#endif
#endif /* __V850_PARAM_H__ */

119
include/asm-v850/pci.h
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@@ -1,119 +0,0 @@
/*
* include/asm-v850/pci.h -- PCI support
*
* Copyright (C) 2001,02,05 NEC Corporation
* Copyright (C) 2001,02,05 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PCI_H__
#define __V850_PCI_H__
/* Get any platform-dependent definitions. */
#include <asm/machdep.h>
#define pcibios_scan_all_fns(a, b) 0
/* Generic declarations. */
struct scatterlist;
extern void pcibios_set_master (struct pci_dev *dev);
/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The
32-bit PCI bus mastering address to use is returned. the device owns
this memory until either pci_unmap_single or pci_dma_sync_single_for_cpu is
performed. */
extern dma_addr_t
pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir);
/* Return to the CPU the PCI DMA memory block previously `granted' to
PDEV, at DMA_ADDR. */
extern void
pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
int dir);
/* Make physical memory consistent for a single streaming mode DMA
translation after a transfer.
If you perform a pci_map_single() but wish to interrogate the
buffer using the cpu, yet do not wish to teardown the PCI dma
mapping, you must call this function before doing so. At the next
point you give the PCI dma address back to the card, you must first
perform a pci_dma_sync_for_device, and then the device again owns
the buffer. */
extern void
pci_dma_sync_single_for_cpu (struct pci_dev *dev, dma_addr_t dma_addr,
size_t size, int dir);
extern void
pci_dma_sync_single_for_device (struct pci_dev *dev, dma_addr_t dma_addr,
size_t size, int dir);
/* Do multiple DMA mappings at once. */
extern int
pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir);
/* Unmap multiple DMA mappings at once. */
extern void
pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,
int dir);
/* SG-list versions of pci_dma_sync functions. */
extern void
pci_dma_sync_sg_for_cpu (struct pci_dev *dev,
struct scatterlist *sg, int sg_len,
int dir);
extern void
pci_dma_sync_sg_for_device (struct pci_dev *dev,
struct scatterlist *sg, int sg_len,
int dir);
#define pci_map_page(dev, page, offs, size, dir) \
pci_map_single(dev, (page_address(page) + (offs)), size, dir)
#define pci_unmap_page(dev,addr,sz,dir) \
pci_unmap_single(dev, addr, sz, dir)
/* Test for pci_map_single or pci_map_page having generated an error. */
static inline int
pci_dma_mapping_error (dma_addr_t dma_addr)
{
return dma_addr == 0;
}
/* Allocate and map kernel buffer using consistent mode DMA for PCI
device. Returns non-NULL cpu-view pointer to the buffer if
successful and sets *DMA_ADDR to the pci side dma address as well,
else DMA_ADDR is undefined. */
extern void *
pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr);
/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must
be values that were returned from pci_alloc_consistent. SIZE must be
the same as what as passed into pci_alloc_consistent. References to
the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past
this call are illegal. */
extern void
pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
dma_addr_t dma_addr);
#ifdef CONFIG_PCI
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
enum pci_dma_burst_strategy *strat,
unsigned long *strategy_parameter)
{
*strat = PCI_DMA_BURST_INFINITY;
*strategy_parameter = ~0UL;
}
#endif
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
extern void pci_iounmap (struct pci_dev *dev, void __iomem *addr);
#endif /* __V850_PCI_H__ */

14
include/asm-v850/percpu.h
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@@ -1,14 +0,0 @@
#ifndef __V850_PERCPU_H__
#define __V850_PERCPU_H__
#include <asm-generic/percpu.h>
/* This is a stupid hack to satisfy some grotty implicit include-file
dependency; basically, <linux/smp.h> uses BUG_ON, which calls BUG, but
doesn't include the necessary headers to define it. In the twisted
festering mess of includes this must all be resolved somehow on other
platforms, but I haven't the faintest idea how, and don't care; here will
do, even though doesn't actually make any sense. */
#include <asm/page.h>
#endif /* __V850_PERCPU_H__ */

22
include/asm-v850/pgalloc.h
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@@ -1,22 +0,0 @@
/*
* include/asm-v850/pgalloc.h
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PGALLOC_H__
#define __V850_PGALLOC_H__
#include <linux/mm.h> /* some crap code expects this */
/* ... and then, there was one. */
#define check_pgt_cache() ((void)0)
#endif /* __V850_PGALLOC_H__ */

59
include/asm-v850/pgtable.h
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@@ -1,59 +0,0 @@
#ifndef __V850_PGTABLE_H__
#define __V850_PGTABLE_H__
#include <asm-generic/4level-fixup.h>
#include <asm/page.h>
#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
#define pgd_none(pgd) (0)
#define pgd_bad(pgd) (0)
#define pgd_clear(pgdp) ((void)0)
#define pmd_offset(a, b) ((void *)0)
#define kern_addr_valid(addr) (1)
#define __swp_type(x) (0)
#define __swp_offset(x) (0)
#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
static inline int pte_file (pte_t pte) { return 0; }
/* These mean nothing to !CONFIG_MMU. */
#define PAGE_NONE __pgprot(0)
#define PAGE_SHARED __pgprot(0)
#define PAGE_COPY __pgprot(0)
#define PAGE_READONLY __pgprot(0)
#define PAGE_KERNEL __pgprot(0)
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc. When CONFIG_MMU is not defined, this
* should never actually be used, so just define it to something that's
* will hopefully cause a bus error if it is.
*/
#define ZERO_PAGE(vaddr) ((void *)0x87654321)
/* Some bogus code in procfs uses these; whatever. */
#define VMALLOC_START 0
#define VMALLOC_END (~0)
extern void paging_init (void);
#define swapper_pg_dir ((pgd_t *) 0)
#define pgtable_cache_init() ((void)0)
extern unsigned int kobjsize(const void *objp);
#endif /* __V850_PGTABLE_H__ */

9
include/asm-v850/poll.h
View File

@@ -1,9 +0,0 @@
#ifndef __V850_POLL_H__
#define __V850_POLL_H__
#define POLLWRNORM POLLOUT
#define POLLWRBAND 0x0100
#include <asm-generic/poll.h>
#endif /* __V850_POLL_H__ */

72
include/asm-v850/posix_types.h
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@@ -1,72 +0,0 @@
/*
* include/asm-v850/posix_types.h -- Kernel versions of standard types
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_POSIX_TYPES_H__
#define __V850_POSIX_TYPES_H__
typedef unsigned long __kernel_ino_t;
typedef unsigned long long __kernel_ino64_t;
typedef unsigned int __kernel_mode_t;
typedef unsigned int __kernel_nlink_t;
typedef long __kernel_off_t;
typedef long long __kernel_loff_t;
typedef int __kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned int __kernel_uid_t;
typedef unsigned int __kernel_gid_t;
typedef unsigned int __kernel_size_t;
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
typedef int __kernel_timer_t;
typedef int __kernel_clockid_t;
typedef int __kernel_daddr_t;
typedef char * __kernel_caddr_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
typedef unsigned int __kernel_uid32_t;
typedef unsigned int __kernel_gid32_t;
/* Some bogus code depends on this; we don't care. */
typedef __kernel_uid_t __kernel_old_uid_t;
typedef unsigned int __kernel_old_dev_t;
typedef struct {
int val[2];
} __kernel_fsid_t;
#if defined(__KERNEL__)
/* We used to include <asm/bitops.h> here, which seems the right thing, but
it caused nasty include-file definition order problems. Removing the
include seems to work, so fingers crossed... */
#undef __FD_SET
#define __FD_SET(fd, fd_set) \
__set_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
#undef __FD_CLR
#define __FD_CLR(fd, fd_set) \
__clear_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
#undef __FD_ISSET
#define __FD_ISSET(fd, fd_set) \
__test_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
#undef __FD_ZERO
#define __FD_ZERO(fd_set) \
memset (fd_set, 0, sizeof (*(fd_set *)fd_set))
#endif /* defined(__KERNEL__) */
#endif /* __V850_POSIX_TYPES_H__ */

120
include/asm-v850/processor.h
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@@ -1,120 +0,0 @@
/*
* include/asm-v850/processor.h
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PROCESSOR_H__
#define __V850_PROCESSOR_H__
#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */
#include <linux/thread_info.h>
#endif
#include <linux/compiler.h>
#include <asm/ptrace.h>
#include <asm/entry.h>
/* Some code expects `segment' stuff to be defined here. */
#include <asm/segment.h>
/*
* The only places this is used seem to be horrible bletcherous kludges,
* so we just define it to be as large as possible.
*/
#define TASK_SIZE (0xFFFFFFFF)
/*
* This decides where the kernel will search for a free chunk of vm
* space during mmap's. We won't be using it.
*/
#define TASK_UNMAPPED_BASE 0
#ifndef __ASSEMBLY__
/*
* Default implementation of macro that returns current
* instruction pointer ("program counter").
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
/* If you change this, you must change the associated assembly-languages
constants defined below, THREAD_*. */
struct thread_struct {
/* kernel stack pointer (must be first field in structure) */
unsigned long ksp;
};
#define INIT_THREAD { sizeof init_stack + (unsigned long)init_stack }
/* Do necessary setup to start up a newly executed thread. */
static inline void start_thread (struct pt_regs *regs,
unsigned long pc, unsigned long usp)
{
regs->pc = pc;
regs->gpr[GPR_SP] = usp;
regs->kernel_mode = 0;
}
/* Free all resources held by a thread. */
static inline void release_thread (struct task_struct *dead_task)
{
}
/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk) do { } while (0)
extern int kernel_thread (int (*fn)(void *), void * arg, unsigned long flags);
/* Free current thread data structures etc. */
static inline void exit_thread (void)
{
}
/* Return the registers saved during context-switch by the currently
not-running thread T. Note that this only includes some registers!
See entry.S for details. */
#define thread_saved_regs(t) \
((struct pt_regs*)((t)->thread.ksp + STATE_SAVE_PT_OFFSET))
/* Return saved (kernel) PC of a blocked thread. Actually, we return the
LP register, because the thread is actually blocked in switch_thread,
and we're interested in the PC it will _return_ to. */
#define thread_saved_pc(t) (thread_saved_regs(t)->gpr[GPR_LP])
unsigned long get_wchan (struct task_struct *p);
/* Return some info about the user process TASK. */
#define task_tos(task) ((unsigned long)task_stack_page(task) + THREAD_SIZE)
#define task_pt_regs(task) ((struct pt_regs *)task_tos (task) - 1)
#define task_sp(task) (task_pt_regs (task)->gpr[GPR_SP])
#define task_pc(task) (task_pt_regs (task)->pc)
/* Grotty old names for some. */
#define KSTK_EIP(task) task_pc (task)
#define KSTK_ESP(task) task_sp (task)
#define cpu_relax() barrier()
#else /* __ASSEMBLY__ */
#define THREAD_KSP 0
#endif /* !__ASSEMBLY__ */
#endif /* __V850_PROCESSOR_H__ */

121
include/asm-v850/ptrace.h
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@@ -1,121 +0,0 @@
/*
* include/asm-v850/ptrace.h -- Access to CPU registers
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_PTRACE_H__
#define __V850_PTRACE_H__
/* v850 general purpose registers with special meanings. */
#define GPR_ZERO 0 /* constant zero */
#define GPR_ASM 1 /* reserved for assembler */
#define GPR_SP 3 /* stack pointer */
#define GPR_GP 4 /* global data pointer */
#define GPR_TP 5 /* `text pointer' */
#define GPR_EP 30 /* `element pointer' */
#define GPR_LP 31 /* link pointer (current return address) */
/* These aren't official names, but they make some code more descriptive. */
#define GPR_ARG0 6
#define GPR_ARG1 7
#define GPR_ARG2 8
#define GPR_ARG3 9
#define GPR_RVAL0 10
#define GPR_RVAL1 11
#define GPR_RVAL GPR_RVAL0
#define NUM_GPRS 32
/* v850 `system' registers. */
#define SR_EIPC 0
#define SR_EIPSW 1
#define SR_FEPC 2
#define SR_FEPSW 3
#define SR_ECR 4
#define SR_PSW 5
#define SR_CTPC 16
#define SR_CTPSW 17
#define SR_DBPC 18
#define SR_DBPSW 19
#define SR_CTBP 20
#define SR_DIR 21
#define SR_ASID 23
#ifndef __ASSEMBLY__
typedef unsigned long v850_reg_t;
/* How processor state is stored on the stack during a syscall/signal.
If you change this structure, change the associated assembly-language
macros below too (PT_*)! */
struct pt_regs
{
/* General purpose registers. */
v850_reg_t gpr[NUM_GPRS];
v850_reg_t pc; /* program counter */
v850_reg_t psw; /* program status word */
/* Registers used by `callt' instruction: */
v850_reg_t ctpc; /* saved program counter */
v850_reg_t ctpsw; /* saved psw */
v850_reg_t ctbp; /* base pointer for callt table */
char kernel_mode; /* 1 if in `kernel mode', 0 if user mode */
};
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
#define user_mode(regs) (!(regs)->kernel_mode)
/* When a struct pt_regs is used to save user state for a system call in
the kernel, the system call is stored in the space for R0 (since it's
never used otherwise, R0 being a constant 0). Non-system-calls
simply store 0 there. */
#define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
#define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
#endif /* !__ASSEMBLY__ */
/* The number of bytes used to store each register. */
#define _PT_REG_SIZE 4
/* Offset of a general purpose register in a struct pt_regs. */
#define PT_GPR(num) ((num) * _PT_REG_SIZE)
/* Offsets of various special registers & fields in a struct pt_regs. */
#define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE)
#define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE)
#define PT_CTPC ((NUM_GPRS + 2) * _PT_REG_SIZE)
#define PT_CTPSW ((NUM_GPRS + 3) * _PT_REG_SIZE)
#define PT_CTBP ((NUM_GPRS + 4) * _PT_REG_SIZE)
#define PT_KERNEL_MODE ((NUM_GPRS + 5) * _PT_REG_SIZE)
/* Where the current syscall number is stashed; obviously only valid in
the kernel! */
#define PT_CUR_SYSCALL PT_GPR(0)
/* Size of struct pt_regs, including alignment. */
#define PT_SIZE ((NUM_GPRS + 6) * _PT_REG_SIZE)
/* These are `magic' values for PTRACE_PEEKUSR that return info about where
a process is located in memory. */
#define PT_TEXT_ADDR (PT_SIZE + 1)
#define PT_TEXT_LEN (PT_SIZE + 2)
#define PT_DATA_ADDR (PT_SIZE + 3)
#endif /* __V850_PTRACE_H__ */

6
include/asm-v850/resource.h
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@@ -1,6 +0,0 @@
#ifndef __V850_RESOURCE_H__
#define __V850_RESOURCE_H__
#include <asm-generic/resource.h>
#endif /* __V850_RESOURCE_H__ */

78
include/asm-v850/rte_cb.h
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@@ -1,78 +0,0 @@
/*
* include/asm-v850/rte_cb.h -- Midas labs RTE-CB series of evaluation boards
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_RTE_CB_H__
#define __V850_RTE_CB_H__
/* The SRAM on the Mother-A motherboard. */
#define MB_A_SRAM_ADDR GCS0_ADDR
#define MB_A_SRAM_SIZE 0x00200000 /* 2MB */
#ifdef CONFIG_RTE_GBUS_INT
/* GBUS interrupt support. */
# include <asm/gbus_int.h>
# define GBUS_INT_BASE_IRQ NUM_RTE_CB_IRQS
# define GBUS_INT_BASE_ADDR (GCS2_ADDR + 0x00006000)
/* Some specific interrupts. */
# define IRQ_MB_A_LAN IRQ_GBUS_INT(10)
# define IRQ_MB_A_PCI1(n) (IRQ_GBUS_INT(16) + (n))
# define IRQ_MB_A_PCI1_NUM 4
# define IRQ_MB_A_PCI2(n) (IRQ_GBUS_INT(20) + (n))
# define IRQ_MB_A_PCI2_NUM 4
# define IRQ_MB_A_EXT(n) (IRQ_GBUS_INT(24) + (n))
# define IRQ_MB_A_EXT_NUM 4
# define IRQ_MB_A_USB_OC(n) (IRQ_GBUS_INT(28) + (n))
# define IRQ_MB_A_USB_OC_NUM 2
# define IRQ_MB_A_PCMCIA_OC IRQ_GBUS_INT(30)
/* We define NUM_MACH_IRQS to include extra interrupts from the GBUS. */
# define NUM_MACH_IRQS (NUM_RTE_CB_IRQS + IRQ_GBUS_INT_NUM)
#else /* !CONFIG_RTE_GBUS_INT */
# define NUM_MACH_IRQS NUM_RTE_CB_IRQS
#endif /* CONFIG_RTE_GBUS_INT */
#ifdef CONFIG_RTE_MB_A_PCI
/* Mother-A PCI bus support. */
# include <asm/rte_mb_a_pci.h>
/* These are the base addresses used for allocating device address
space. 512K of the motherboard SRAM is in the same space, so we have
to be careful not to let it be allocated. */
# define PCIBIOS_MIN_MEM (MB_A_PCI_MEM_ADDR + 0x80000)
# define PCIBIOS_MIN_IO MB_A_PCI_IO_ADDR
/* As we don't really support PCI DMA to cpu memory, and use bounce-buffers
instead, perversely enough, this becomes always true! */
# define pci_dma_supported(dev, mask) 1
# define pcibios_assign_all_busses() 1
#endif /* CONFIG_RTE_MB_A_PCI */
#ifndef __ASSEMBLY__
extern void rte_cb_early_init (void);
extern void rte_cb_init_irqs (void);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_RTE_CB_H__ */

128
include/asm-v850/rte_ma1_cb.h
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@@ -1,128 +0,0 @@
/*
* include/asm-v850/rte_ma1_cb.h -- Midas labs RTE-V850/MA1-CB board
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_RTE_MA1_CB_H__
#define __V850_RTE_MA1_CB_H__
#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
#define PLATFORM "rte-v850e/ma1-cb"
#define PLATFORM_LONG "Midas lab RTE-V850E/MA1-CB"
#define CPU_CLOCK_FREQ 50000000 /* 50MHz */
/* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this
for its own purposes, so care must be taken. Some address lines are
not decoded, so the SRAM area is mirrored every 1MB from 0x400000 to
0x800000 (exclusive). */
#define SRAM_ADDR 0x00400000
#define SRAM_SIZE 0x00100000 /* 1MB */
/* 32MB of onbard SDRAM. */
#define SDRAM_ADDR 0x00800000
#define SDRAM_SIZE 0x02000000 /* 32MB */
/* CPU addresses of GBUS memory spaces. */
#define GCS0_ADDR 0x05000000 /* GCS0 - Common SRAM (2MB) */
#define GCS0_SIZE 0x00200000 /* 2MB */
#define GCS1_ADDR 0x06000000 /* GCS1 - Flash ROM (8MB) */
#define GCS1_SIZE 0x00800000 /* 8MB */
#define GCS2_ADDR 0x07900000 /* GCS2 - I/O registers */
#define GCS2_SIZE 0x00400000 /* 4MB */
#define GCS5_ADDR 0x04000000 /* GCS5 - PCI bus space */
#define GCS5_SIZE 0x01000000 /* 16MB */
#define GCS6_ADDR 0x07980000 /* GCS6 - PCI control registers */
#define GCS6_SIZE 0x00000200 /* 512B */
/* For <asm/page.h> */
#define PAGE_OFFSET SRAM_ADDR
/* The GBUS GINT0 - GINT3 interrupts are connected to the INTP000 - INTP011
pins on the CPU. These are shared among the GBUS interrupts. */
#define IRQ_GINT(n) IRQ_INTP(n)
#define IRQ_GINT_NUM 4
/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
#define NUM_RTE_CB_IRQS NUM_CPU_IRQS
#ifdef CONFIG_ROM_KERNEL
/* Kernel is in ROM, starting at address 0. */
#define INTV_BASE 0
#else /* !CONFIG_ROM_KERNEL */
#ifdef CONFIG_RTE_CB_MULTI
/* Using RAM kernel with ROM monitor for Multi debugger. */
/* The chip's real interrupt vectors are in ROM, but they jump to a
secondary interrupt vector table in RAM. */
#define INTV_BASE 0x004F8000
/* Scratch memory used by the ROM monitor, which shouldn't be used by
linux (except for the alternate interrupt vector area, defined
above). */
#define MON_SCRATCH_ADDR 0x004F8000
#define MON_SCRATCH_SIZE 0x00008000 /* 32KB */
#else /* !CONFIG_RTE_CB_MULTI */
/* Using RAM-kernel. Assume some sort of boot-loader got us loaded at
address 0. */
#define INTV_BASE 0
#endif /* CONFIG_RTE_CB_MULTI */
#endif /* CONFIG_ROM_KERNEL */
/* Some misc. on-board devices. */
/* Seven-segment LED display (two digits). Write-only. */
#define LED_ADDR(n) (0x07802000 + (n))
#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
#define LED_NUM_DIGITS 2
/* Override the basic MA uart pre-initialization so that we can
initialize extra stuff. */
#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/ma.h> */
#define V850E_UART_PRE_CONFIGURE rte_ma1_cb_uart_pre_configure
#ifndef __ASSEMBLY__
extern void rte_ma1_cb_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
/* CTS for UART channel 0 is pin P43 (bit 3 of port 4). */
#define V850E_UART_CTS(chan) ((chan) == 0 ? !(MA_PORT4_IO & 0x8) : 1)
/* RTS for UART channel 0 is pin P42 (bit 2 of port 4). */
#define V850E_UART_SET_RTS(chan, val) \
do { \
if (chan == 0) { \
unsigned old = MA_PORT4_IO; \
if (val) \
MA_PORT4_IO = old & ~0x4; \
else \
MA_PORT4_IO = old | 0x4; \
} \
} while (0)
#endif /* __V850_RTE_MA1_CB_H__ */

56
include/asm-v850/rte_mb_a_pci.h
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@@ -1,56 +0,0 @@
/*
* include/asm-v850/mb_a_pci.h -- PCI support for Midas lab RTE-MOTHER-A board
*
* Copyright (C) 2001 NEC Corporation
* Copyright (C) 2001 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_MB_A_PCI_H__
#define __V850_MB_A_PCI_H__
#define MB_A_PCI_MEM_ADDR GCS5_ADDR
#define MB_A_PCI_MEM_SIZE (GCS5_SIZE / 2)
#define MB_A_PCI_IO_ADDR (GCS5_ADDR + MB_A_PCI_MEM_SIZE)
#define MB_A_PCI_IO_SIZE (GCS5_SIZE / 2)
#define MB_A_PCI_REG_BASE_ADDR GCS6_ADDR
#define MB_A_PCI_PCICR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x4)
#define MB_A_PCI_PCICR (*(volatile u16 *)MB_A_PCI_PCICR_ADDR)
#define MB_A_PCI_PCISR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x6)
#define MB_A_PCI_PCISR (*(volatile u16 *)MB_A_PCI_PCISR_ADDR)
#define MB_A_PCI_PCILTR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xD)
#define MB_A_PCI_PCILTR (*(volatile u8 *)MB_A_PCI_PCILTR_ADDR)
#define MB_A_PCI_PCIBAR0_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x10)
#define MB_A_PCI_PCIBAR0 (*(volatile u32 *)MB_A_PCI_PCIBAR0_ADDR)
#define MB_A_PCI_PCIBAR1_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x14)
#define MB_A_PCI_PCIBAR1 (*(volatile u32 *)MB_A_PCI_PCIBAR1_ADDR)
#define MB_A_PCI_PCIBAR2_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x18)
#define MB_A_PCI_PCIBAR2 (*(volatile u32 *)MB_A_PCI_PCIBAR2_ADDR)
#define MB_A_PCI_VENDOR_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2C)
#define MB_A_PCI_VENDOR_ID (*(volatile u16 *)MB_A_PCI_VENDOR_ID_ADDR)
#define MB_A_PCI_DEVICE_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2E)
#define MB_A_PCI_DEVICE_ID (*(volatile u16 *)MB_A_PCI_DEVICE_ID_ADDR)
#define MB_A_PCI_DMRR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x9C)
#define MB_A_PCI_DMRR (*(volatile u32 *)MB_A_PCI_DMRR_ADDR)
#define MB_A_PCI_DMLBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA0)
#define MB_A_PCI_DMLBAM (*(volatile u32 *)MB_A_PCI_DMLBAM_ADDR)
#define MB_A_PCI_DMLBAI_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA4)
#define MB_A_PCI_DMLBAI (*(volatile u32 *)MB_A_PCI_DMLBAI_ADDR)
#define MB_A_PCI_PCIPBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA8)
#define MB_A_PCI_PCIPBAM (*(volatile u32 *)MB_A_PCI_PCIPBAM_ADDR)
/* `PCI Configuration Address Register for Direct Master to PCI IO/CFG' */
#define MB_A_PCI_DMCFGA_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xAC)
#define MB_A_PCI_DMCFGA (*(volatile u32 *)MB_A_PCI_DMCFGA_ADDR)
/* `PCI Permanent Configuration ID Register' */
#define MB_A_PCI_PCIHIDR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xF0)
#define MB_A_PCI_PCIHIDR (*(volatile u32 *)MB_A_PCI_PCIHIDR_ADDR)
#endif /* __V850_MB_A_PCI_H__ */

202
include/asm-v850/rte_me2_cb.h
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@@ -1,202 +0,0 @@
/*
* include/asm-v850/rte_me2_cb.h -- Midas labs RTE-V850E/ME2-CB board
*
* Copyright (C) 2001,02,03 NEC Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_RTE_ME2_CB_H__
#define __V850_RTE_ME2_CB_H__
#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
#define PLATFORM "rte-v850e/me2-cb"
#define PLATFORM_LONG "Midas lab RTE-V850E/ME2-CB"
#define CPU_CLOCK_FREQ 150000000 /* 150MHz */
#define FIXED_BOGOMIPS 50
/* 32MB of onbard SDRAM. */
#define SDRAM_ADDR 0x00800000
#define SDRAM_SIZE 0x02000000 /* 32MB */
/* CPU addresses of GBUS memory spaces. */
#define GCS0_ADDR 0x04000000 /* GCS0 - Common SRAM (2MB) */
#define GCS0_SIZE 0x00800000 /* 8MB */
#define GCS1_ADDR 0x04800000 /* GCS1 - Flash ROM (8MB) */
#define GCS1_SIZE 0x00800000 /* 8MB */
#define GCS2_ADDR 0x07000000 /* GCS2 - I/O registers */
#define GCS2_SIZE 0x00800000 /* 8MB */
#define GCS5_ADDR 0x08000000 /* GCS5 - PCI bus space */
#define GCS5_SIZE 0x02000000 /* 32MB */
#define GCS6_ADDR 0x07800000 /* GCS6 - PCI control registers */
#define GCS6_SIZE 0x00800000 /* 8MB */
/* For <asm/page.h> */
#define PAGE_OFFSET SDRAM_ADDR
#ifdef CONFIG_ROM_KERNEL
/* Kernel is in ROM, starting at address 0. */
#define INTV_BASE 0
#define ROOT_FS_IMAGE_RW 0
#else /* !CONFIG_ROM_KERNEL */
/* Using RAM-kernel. Assume some sort of boot-loader got us loaded at
address 0. */
#define INTV_BASE 0
#define ROOT_FS_IMAGE_RW 1
#endif /* CONFIG_ROM_KERNEL */
/* Some misc. on-board devices. */
/* Seven-segment LED display (four digits). */
#define LED_ADDR(n) (0x0FE02000 + (n))
#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
#define LED_NUM_DIGITS 4
/* On-board PIC. */
#define CB_PIC_BASE_ADDR 0x0FE04000
#define CB_PIC_INT0M_ADDR (CB_PIC_BASE_ADDR + 0x00)
#define CB_PIC_INT0M (*(volatile u16 *)CB_PIC_INT0M_ADDR)
#define CB_PIC_INT1M_ADDR (CB_PIC_BASE_ADDR + 0x10)
#define CB_PIC_INT1M (*(volatile u16 *)CB_PIC_INT1M_ADDR)
#define CB_PIC_INTR_ADDR (CB_PIC_BASE_ADDR + 0x20)
#define CB_PIC_INTR (*(volatile u16 *)CB_PIC_INTR_ADDR)
#define CB_PIC_INTEN_ADDR (CB_PIC_BASE_ADDR + 0x30)
#define CB_PIC_INTEN (*(volatile u16 *)CB_PIC_INTEN_ADDR)
#define CB_PIC_INT0EN 0x0001
#define CB_PIC_INT1EN 0x0002
#define CB_PIC_INT0SEL 0x0080
/* The PIC interrupts themselves. */
#define CB_PIC_BASE_IRQ NUM_CPU_IRQS
#define IRQ_CB_PIC_NUM 10
/* Some specific CB_PIC interrupts. */
#define IRQ_CB_EXTTM0 (CB_PIC_BASE_IRQ + 0)
#define IRQ_CB_EXTSIO (CB_PIC_BASE_IRQ + 1)
#define IRQ_CB_TOVER (CB_PIC_BASE_IRQ + 2)
#define IRQ_CB_GINT0 (CB_PIC_BASE_IRQ + 3)
#define IRQ_CB_USB (CB_PIC_BASE_IRQ + 4)
#define IRQ_CB_LANC (CB_PIC_BASE_IRQ + 5)
#define IRQ_CB_USB_VBUS_ON (CB_PIC_BASE_IRQ + 6)
#define IRQ_CB_USB_VBUS_OFF (CB_PIC_BASE_IRQ + 7)
#define IRQ_CB_EXTTM1 (CB_PIC_BASE_IRQ + 8)
#define IRQ_CB_EXTTM2 (CB_PIC_BASE_IRQ + 9)
/* The GBUS GINT1 - GINT3 (note, not GINT0!) interrupts are connected to
the INTP65 - INTP67 pins on the CPU. These are shared among the GBUS
interrupts. */
#define IRQ_GINT(n) IRQ_INTP((n) + 9) /* 0 is unused! */
#define IRQ_GINT_NUM 4 /* 0 is unused! */
/* The shared interrupt line from the PIC is connected to CPU pin INTP23. */
#define IRQ_CB_PIC IRQ_INTP(4) /* P23 */
/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
#define NUM_RTE_CB_IRQS (NUM_CPU_IRQS + IRQ_CB_PIC_NUM)
#ifndef __ASSEMBLY__
struct cb_pic_irq_init {
const char *name; /* name of interrupt type */
/* Range of kernel irq numbers for this type:
BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */
unsigned base, num, interval;
unsigned priority; /* interrupt priority to assign */
};
struct hw_interrupt_type; /* fwd decl */
/* Enable interrupt handling for interrupt IRQ. */
extern void cb_pic_enable_irq (unsigned irq);
/* Disable interrupt handling for interrupt IRQ. Note that any interrupts
received while disabled will be delivered once the interrupt is enabled
again, unless they are explicitly cleared using `cb_pic_clear_pending_irq'. */
extern void cb_pic_disable_irq (unsigned irq);
/* Initialize HW_IRQ_TYPES for PIC irqs described in array INITS (which is
terminated by an entry with the name field == 0). */
extern void cb_pic_init_irq_types (struct cb_pic_irq_init *inits,
struct hw_interrupt_type *hw_irq_types);
/* Initialize PIC interrupts. */
extern void cb_pic_init_irqs (void);
#endif /* __ASSEMBLY__ */
/* TL16C550C on board UART see also asm/serial.h */
#define CB_UART_BASE 0x0FE08000
#define CB_UART_REG_GAP 0x10
#define CB_UART_CLOCK 0x16000000
/* CompactFlash setting */
#define CB_CF_BASE 0x0FE0C000
#define CB_CF_CCR_ADDR (CB_CF_BASE+0x200)
#define CB_CF_CCR (*(volatile u8 *)CB_CF_CCR_ADDR)
#define CB_CF_REG0_ADDR (CB_CF_BASE+0x1000)
#define CB_CF_REG0 (*(volatile u16 *)CB_CF_REG0_ADDR)
#define CB_CF_STS0_ADDR (CB_CF_BASE+0x1004)
#define CB_CF_STS0 (*(volatile u16 *)CB_CF_STS0_ADDR)
#define CB_PCATA_BASE (CB_CF_BASE+0x800)
#define CB_IDE_BASE (CB_CF_BASE+0x9F0)
#define CB_IDE_CTRL (CB_CF_BASE+0xBF6)
#define CB_IDE_REG_OFFS 0x1
/* SMSC LAN91C111 setting */
#if defined(CONFIG_SMC91111)
#define CB_LANC_BASE 0x0FE10300
#define CONFIG_SMC16BITONLY
#define ETH0_ADDR CB_LANC_BASE
#define ETH0_IRQ IRQ_CB_LANC
#endif /* CONFIG_SMC16BITONLY */
#undef V850E_UART_PRE_CONFIGURE
#define V850E_UART_PRE_CONFIGURE rte_me2_cb_uart_pre_configure
#ifndef __ASSEMBLY__
extern void rte_me2_cb_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif /* __ASSEMBLY__ */
/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
/* CTS for UART channel 0 is pin P22 (bit 2 of port 2). */
#define V850E_UART_CTS(chan) ((chan) == 0 ? !(ME2_PORT2_IO & 0x4) : 1)
/* RTS for UART channel 0 is pin P21 (bit 1 of port 2). */
#define V850E_UART_SET_RTS(chan, val) \
do { \
if (chan == 0) { \
unsigned old = ME2_PORT2_IO; \
if (val) \
ME2_PORT2_IO = old & ~0x2; \
else \
ME2_PORT2_IO = old | 0x2; \
} \
} while (0)
#ifndef __ASSEMBLY__
extern void rte_me2_cb_init_irqs (void);
#endif /* !__ASSEMBLY__ */
#endif /* __V850_RTE_ME2_CB_H__ */

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include/asm-v850/rte_nb85e_cb.h
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@@ -1,111 +0,0 @@
/*
* include/asm-v850/rte_nb85e_cb.h -- Midas labs RTE-V850/NB85E-CB board
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_RTE_NB85E_CB_H__
#define __V850_RTE_NB85E_CB_H__
#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
#define PLATFORM "rte-v850e/nb85e-cb"
#define PLATFORM_LONG "Midas lab RTE-V850E/NB85E-CB"
#define CPU_CLOCK_FREQ 50000000 /* 50MHz */
/* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this
for its own purposes, so care must be taken. */
#define SRAM_ADDR 0x03C00000
#define SRAM_SIZE 0x00100000 /* 1MB */
/* 16MB of onbard SDRAM. */
#define SDRAM_ADDR 0x01000000
#define SDRAM_SIZE 0x01000000 /* 16MB */
/* CPU addresses of GBUS memory spaces. */
#define GCS0_ADDR 0x00400000 /* GCS0 - Common SRAM (2MB) */
#define GCS0_SIZE 0x00400000 /* 4MB */
#define GCS1_ADDR 0x02000000 /* GCS1 - Flash ROM (8MB) */
#define GCS1_SIZE 0x00800000 /* 8MB */
#define GCS2_ADDR 0x03900000 /* GCS2 - I/O registers */
#define GCS2_SIZE 0x00080000 /* 512KB */
#define GCS3_ADDR 0x02800000 /* GCS3 - EXT-bus: memory space */
#define GCS3_SIZE 0x00800000 /* 8MB */
#define GCS4_ADDR 0x03A00000 /* GCS4 - EXT-bus: I/O space */
#define GCS4_SIZE 0x00200000 /* 2MB */
#define GCS5_ADDR 0x00800000 /* GCS5 - PCI bus space */
#define GCS5_SIZE 0x00800000 /* 8MB */
#define GCS6_ADDR 0x03980000 /* GCS6 - PCI control registers */
#define GCS6_SIZE 0x00010000 /* 64KB */
/* The GBUS GINT0 - GINT3 interrupts are connected to CPU interrupts 10-12.
These are shared among the GBUS interrupts. */
#define IRQ_GINT(n) (10 + (n))
#define IRQ_GINT_NUM 3
/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
#define NUM_RTE_CB_IRQS NUM_CPU_IRQS
#ifdef CONFIG_ROM_KERNEL
/* Kernel is in ROM, starting at address 0. */
#define INTV_BASE 0
#else /* !CONFIG_ROM_KERNEL */
/* We're using the ROM monitor. */
/* The chip's real interrupt vectors are in ROM, but they jump to a
secondary interrupt vector table in RAM. */
#define INTV_BASE 0x03CF8000
/* Scratch memory used by the ROM monitor, which shouldn't be used by
linux (except for the alternate interrupt vector area, defined
above). */
#define MON_SCRATCH_ADDR 0x03CE8000
#define MON_SCRATCH_SIZE 0x00018000 /* 96KB */
#endif /* CONFIG_ROM_KERNEL */
/* Some misc. on-board devices. */
/* Seven-segment LED display (two digits). Write-only. */
#define LED_ADDR(n) (0x03802000 + (n))
#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
#define LED_NUM_DIGITS 4
/* Override the basic TEG UART pre-initialization so that we can
initialize extra stuff. */
#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/teg.h> */
#define V850E_UART_PRE_CONFIGURE rte_nb85e_cb_uart_pre_configure
#ifndef __ASSEMBLY__
extern void rte_nb85e_cb_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* This board supports RTS/CTS for the on-chip UART. */
/* CTS is pin P00. */
#define V850E_UART_CTS(chan) (! (TEG_PORT0_IO & 0x1))
/* RTS is pin P02. */
#define V850E_UART_SET_RTS(chan, val) \
do { \
unsigned old = TEG_PORT0_IO; \
TEG_PORT0_IO = val ? (old & ~0x4) : (old | 0x4); \
} while (0)
#endif /* __V850_RTE_NB85E_CB_H__ */

31
include/asm-v850/scatterlist.h
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@@ -1,31 +0,0 @@
/*
* include/asm-v850/scatterlist.h
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SCATTERLIST_H__
#define __V850_SCATTERLIST_H__
#include <asm/types.h>
struct scatterlist {
#ifdef CONFIG_DEBUG_SG
unsigned long sg_magic;
#endif
unsigned long page_link;
unsigned offset;
dma_addr_t dma_address;
unsigned length;
};
#define ISA_DMA_THRESHOLD (~0UL)
#endif /* __V850_SCATTERLIST_H__ */

6
include/asm-v850/sections.h
View File

@@ -1,6 +0,0 @@
#ifndef __V850_SECTIONS_H__
#define __V850_SECTIONS_H__
#include <asm-generic/sections.h>
#endif /* __V850_SECTIONS_H__ */

36
include/asm-v850/segment.h
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@@ -1,36 +0,0 @@
#ifndef __V850_SEGMENT_H__
#define __V850_SEGMENT_H__
#ifndef __ASSEMBLY__
typedef unsigned long mm_segment_t; /* domain register */
#endif /* !__ASSEMBLY__ */
#define __KERNEL_CS 0x0
#define __KERNEL_DS 0x0
#define __USER_CS 0x1
#define __USER_DS 0x1
#define KERNEL_DS __KERNEL_DS
#define KERNEL_CS __KERNEL_CS
#define USER_DS __USER_DS
#define USER_CS __USER_CS
#define segment_eq(a,b) ((a) == (b))
#define get_ds() (KERNEL_DS)
#define get_fs() (USER_DS)
#define set_fs(seg) ((void)(seg))
#define copy_segments(task, mm) ((void)((void)(task), (mm)))
#define release_segments(mm) ((void)(mm))
#define forget_segments() ((void)0)
#endif /* __V850_SEGMENT_H__ */

1
include/asm-v850/semaphore.h
View File

@@ -1 +0,0 @@
#include <linux/semaphore.h>

25
include/asm-v850/sembuf.h
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@@ -1,25 +0,0 @@
#ifndef __V850_SEMBUF_H__
#define __V850_SEMBUF_H__
/*
* The semid64_ds structure for v850 architecture.
* Note extra padding because this structure is passed back and forth
* between kernel and user space.
*
* Pad space is left for:
* - 64-bit time_t to solve y2038 problem
* - 2 miscellaneous 32-bit values
*/
struct semid64_ds {
struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
__kernel_time_t sem_otime; /* last semop time */
unsigned long __unused1;
__kernel_time_t sem_ctime; /* last change time */
unsigned long __unused2;
unsigned long sem_nsems; /* no. of semaphores in array */
unsigned long __unused3;
unsigned long __unused4;
};
#endif /* __V850_SEMBUF_H__ */

56
include/asm-v850/serial.h
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@@ -1,56 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1999 by Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifdef CONFIG_RTE_CB_ME2
#include <asm/rte_me2_cb.h>
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define irq_cannonicalize(x) (x)
#define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */
#define SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS },
/* Redefine UART register offsets. */
#undef UART_RX
#undef UART_TX
#undef UART_DLL
#undef UART_TRG
#undef UART_DLM
#undef UART_IER
#undef UART_FCTR
#undef UART_IIR
#undef UART_FCR
#undef UART_EFR
#undef UART_LCR
#undef UART_MCR
#undef UART_LSR
#undef UART_MSR
#undef UART_SCR
#undef UART_EMSR
#define UART_RX (0 * CB_UART_REG_GAP)
#define UART_TX (0 * CB_UART_REG_GAP)
#define UART_DLL (0 * CB_UART_REG_GAP)
#define UART_TRG (0 * CB_UART_REG_GAP)
#define UART_DLM (1 * CB_UART_REG_GAP)
#define UART_IER (1 * CB_UART_REG_GAP)
#define UART_FCTR (1 * CB_UART_REG_GAP)
#define UART_IIR (2 * CB_UART_REG_GAP)
#define UART_FCR (2 * CB_UART_REG_GAP)
#define UART_EFR (2 * CB_UART_REG_GAP)
#define UART_LCR (3 * CB_UART_REG_GAP)
#define UART_MCR (4 * CB_UART_REG_GAP)
#define UART_LSR (5 * CB_UART_REG_GAP)
#define UART_MSR (6 * CB_UART_REG_GAP)
#define UART_SCR (7 * CB_UART_REG_GAP)
#define UART_EMSR (7 * CB_UART_REG_GAP)
#endif /* CONFIG_RTE_CB_ME2 */

6
include/asm-v850/setup.h
View File

@@ -1,6 +0,0 @@
#ifndef _V850_SETUP_H
#define _V850_SETUP_H
#define COMMAND_LINE_SIZE 512
#endif /* __SETUP_H */

42
include/asm-v850/shmbuf.h
View File

@@ -1,42 +0,0 @@
#ifndef __V850_SHMBUF_H__
#define __V850_SHMBUF_H__
/*
* The shmid64_ds structure for v850 architecture.
* Note extra padding because this structure is passed back and forth
* between kernel and user space.
*
* Pad space is left for:
* - 64-bit time_t to solve y2038 problem
* - 2 miscellaneous 32-bit values
*/
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
unsigned long __unused1;
__kernel_time_t shm_dtime; /* last detach time */
unsigned long __unused2;
__kernel_time_t shm_ctime; /* last change time */
unsigned long __unused3;
__kernel_pid_t shm_cpid; /* pid of creator */
__kernel_pid_t shm_lpid; /* pid of last operator */
unsigned long shm_nattch; /* no. of current attaches */
unsigned long __unused4;
unsigned long __unused5;
};
struct shminfo64 {
unsigned long shmmax;
unsigned long shmmin;
unsigned long shmmni;
unsigned long shmseg;
unsigned long shmall;
unsigned long __unused1;
unsigned long __unused2;
unsigned long __unused3;
unsigned long __unused4;
};
#endif /* __V850_SHMBUF_H__ */

6
include/asm-v850/shmparam.h
View File

@@ -1,6 +0,0 @@
#ifndef __V850_SHMPARAM_H__
#define __V850_SHMPARAM_H__
#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
#endif /* __V850_SHMPARAM_H__ */

25
include/asm-v850/sigcontext.h
View File

@@ -1,25 +0,0 @@
/*
* include/asm-v850/sigcontext.h -- Signal contexts
*
* Copyright (C) 2001 NEC Corporation
* Copyright (C) 2001 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIGCONTEXT_H__
#define __V850_SIGCONTEXT_H__
#include <asm/ptrace.h>
struct sigcontext
{
struct pt_regs regs;
unsigned long oldmask;
};
#endif /* __V850_SIGCONTEXT_H__ */

6
include/asm-v850/siginfo.h
View File

@@ -1,6 +0,0 @@
#ifndef __V850_SIGINFO_H__
#define __V850_SIGINFO_H__
#include <asm-generic/siginfo.h>
#endif /* __V850_SIGINFO_H__ */

168
include/asm-v850/signal.h
View File

@@ -1,168 +0,0 @@
#ifndef __V850_SIGNAL_H__
#define __V850_SIGNAL_H__
#include <linux/types.h>
/* Avoid too many header ordering problems. */
struct siginfo;
#ifdef __KERNEL__
/* Most things should be clean enough to redefine this at will, if care
is taken to make libc match. */
#define _NSIG 64
#define _NSIG_BPW 32
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
typedef unsigned long old_sigset_t; /* at least 32 bits */
typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
#else /* !__KERNEL__ */
/* Here we must cater to libcs that poke about in kernel headers. */
#define NSIG 32
typedef unsigned long sigset_t;
#endif /* __KERNEL__ */
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPOLL SIGIO
/*
#define SIGLOST 29
*/
#define SIGPWR 30
#define SIGSYS 31
#define SIGUNUSED 31
/* These should not be considered constants from userland. */
#define SIGRTMIN 32
#define SIGRTMAX _NSIG
/*
* SA_FLAGS values:
*
* SA_ONSTACK indicates that a registered stack_t will be used.
* SA_RESTART flag to get restarting signals (which were the default long ago)
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
* SA_RESETHAND clears the handler when the signal is delivered.
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
* SA_NODEFER prevents the current signal from being masked in the handler.
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
*/
#define SA_NOCLDSTOP 0x00000001
#define SA_NOCLDWAIT 0x00000002
#define SA_SIGINFO 0x00000004
#define SA_ONSTACK 0x08000000
#define SA_RESTART 0x10000000
#define SA_NODEFER 0x40000000
#define SA_RESETHAND 0x80000000
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
#define SA_RESTORER 0x04000000
/*
* sigaltstack controls
*/
#define SS_ONSTACK 1
#define SS_DISABLE 2
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
#include <asm-generic/signal.h>
#ifdef __KERNEL__
struct old_sigaction {
__sighandler_t sa_handler;
old_sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
struct sigaction {
__sighandler_t sa_handler;
unsigned long sa_flags;
void (*sa_restorer)(void);
sigset_t sa_mask; /* mask last for extensibility */
};
struct k_sigaction {
struct sigaction sa;
};
#else /* !__KERNEL__ */
/* Here we must cater to libcs that poke about in kernel headers. */
struct sigaction {
union {
__sighandler_t _sa_handler;
void (*_sa_sigaction)(int, struct siginfo *, void *);
} _u;
sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
#define sa_handler _u._sa_handler
#define sa_sigaction _u._sa_sigaction
#endif /* __KERNEL__ */
typedef struct sigaltstack {
void *ss_sp;
int ss_flags;
size_t ss_size;
} stack_t;
#ifdef __KERNEL__
#include <asm/sigcontext.h>
#undef __HAVE_ARCH_SIG_BITOPS
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#endif /* __KERNEL__ */
#endif /* __V850_SIGNAL_H__ */

47
include/asm-v850/sim.h
View File

@@ -1,47 +0,0 @@
/*
* include/asm-v850/sim.h -- Machine-dependent defs for GDB v850e simulator
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIM_H__
#define __V850_SIM_H__
#define CPU_ARCH "v850e"
#define CPU_MODEL "v850e"
#define CPU_MODEL_LONG "NEC V850E"
#define PLATFORM "gdb/v850e"
#define PLATFORM_LONG "GDB V850E simulator"
/* We use a weird value for RAM, not just 0, for testing purposes.
These must match the values used in the linker script. */
#define RAM_ADDR 0x8F000000
#define RAM_SIZE 0x03000000
/* For <asm/page.h> */
#define PAGE_OFFSET RAM_ADDR
/* For <asm/entry.h> */
/* `R0 RAM', used for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. On real
processors, this usually is on-chip RAM, but here we just
choose an arbitrary address that meets the above constraint. */
#define R0_RAM_ADDR 0xFFFFF000
/* For <asm/irq.h> */
#define NUM_CPU_IRQS 6
#endif /* __V850_SIM_H__ */

69
include/asm-v850/sim85e2.h
View File

@@ -1,69 +0,0 @@
/*
* include/asm-v850/sim85e2.h -- Machine-dependent defs for
* V850E2 RTL simulator
*
* Copyright (C) 2002,03 NEC Electronics Corporation
* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIM85E2_H__
#define __V850_SIM85E2_H__
#include <asm/v850e2.h> /* Based on V850E2 core. */
/* Various memory areas supported by the simulator.
These should match the corresponding definitions in the linker script. */
/* `instruction RAM'; instruction fetches are much faster from IRAM than
from DRAM. */
#define IRAM_ADDR 0
#define IRAM_SIZE 0x00100000 /* 1MB */
/* `data RAM', below and contiguous with the I/O space.
Data fetches are much faster from DRAM than from IRAM. */
#define DRAM_ADDR 0xfff00000
#define DRAM_SIZE 0x000ff000 /* 1020KB */
/* `external ram'. Unlike the above RAM areas, this memory is cached,
so both instruction and data fetches should be (mostly) fast --
however, currently only write-through caching is supported, so writes
to ERAM will be slow. */
#define ERAM_ADDR 0x00100000
#define ERAM_SIZE 0x07f00000 /* 127MB (max) */
/* Dynamic RAM; uses memory controller. */
#define SDRAM_ADDR 0x10000000
#define SDRAM_SIZE 0x01000000 /* 16MB */
/* Simulator specific control registers. */
/* NOTHAL controls whether the simulator will stop at a `halt' insn. */
#define SIM85E2_NOTHAL_ADDR 0xffffff22
#define SIM85E2_NOTHAL (*(volatile u8 *)SIM85E2_NOTHAL_ADDR)
/* The simulator will stop N cycles after N is written to SIMFIN. */
#define SIM85E2_SIMFIN_ADDR 0xffffff24
#define SIM85E2_SIMFIN (*(volatile u16 *)SIM85E2_SIMFIN_ADDR)
/* For <asm/irq.h> */
#define NUM_CPU_IRQS 64
/* For <asm/page.h> */
#define PAGE_OFFSET SDRAM_ADDR
/* For <asm/entry.h> */
/* `R0 RAM', used for a few miscellaneous variables that must be accessible
using a load instruction relative to R0. The sim85e2 simulator
actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily
choose a small portion at the end of that. */
#define R0_RAM_ADDR 0xFFFFE000
#endif /* __V850_SIM85E2_H__ */

26
include/asm-v850/sim85e2c.h
View File

@@ -1,26 +0,0 @@
/*
* include/asm-v850/sim85e2c.h -- Machine-dependent defs for
* V850E2 RTL simulator
*
* Copyright (C) 2002 NEC Corporation
* Copyright (C) 2002 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIM85E2C_H__
#define __V850_SIM85E2C_H__
/* Use generic sim85e2 settings, other than the various names. */
#include <asm/sim85e2.h>
#define CPU_MODEL "v850e2"
#define CPU_MODEL_LONG "NEC V850E2"
#define PLATFORM "sim85e2c"
#define PLATFORM_LONG "SIM85E2C V850E2 simulator"
#endif /* __V850_SIM85E2C_H__ */

28
include/asm-v850/sim85e2s.h
View File

@@ -1,28 +0,0 @@
/*
* include/asm-v850/sim85e2s.h -- Machine-dependent defs for
* V850E2 RTL simulator
*
* Copyright (C) 2003 NEC Electronics Corporation
* Copyright (C) 2003 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIM85E2S_H__
#define __V850_SIM85E2S_H__
#include <asm/sim85e2.h> /* Use generic sim85e2 settings. */
#if 0
#include <asm/v850e2_cache.h> /* + cache */
#endif
#define CPU_MODEL "v850e2"
#define CPU_MODEL_LONG "NEC V850E2"
#define PLATFORM "sim85e2s"
#define PLATFORM_LONG "SIM85E2S V850E2 simulator"
#endif /* __V850_SIM85E2S_H__ */

99
include/asm-v850/simsyscall.h
View File

@@ -1,99 +0,0 @@
/*
* include/asm-v850/simsyscall.h -- `System calls' under the v850e emulator
*
* Copyright (C) 2001 NEC Corporation
* Copyright (C) 2001 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SIMSYSCALL_H__
#define __V850_SIMSYSCALL_H__
#define V850_SIM_SYS_exit(a...) V850_SIM_SYSCALL_1 (1 , ##a)
#define V850_SIM_SYS_fork(a...) V850_SIM_SYSCALL_0 (2 , ##a)
#define V850_SIM_SYS_read(a...) V850_SIM_SYSCALL_3 (3 , ##a)
#define V850_SIM_SYS_write(a...) V850_SIM_SYSCALL_3 (4 , ##a)
#define V850_SIM_SYS_open(a...) V850_SIM_SYSCALL_2 (5 , ##a)
#define V850_SIM_SYS_close(a...) V850_SIM_SYSCALL_1 (6 , ##a)
#define V850_SIM_SYS_wait4(a...) V850_SIM_SYSCALL_4 (7 , ##a)
/* #define V850_SIM_SYS_creat(a...) V850_SIM_SYSCALL_1 (8 , ##a) */
/* #define V850_SIM_SYS_link(a...) V850_SIM_SYSCALL_1 (9 , ##a) */
/* #define V850_SIM_SYS_unlink(a...) V850_SIM_SYSCALL_1 (10 , ##a) */
#define V850_SIM_SYS_execv(a...) V850_SIM_SYSCALL_2 (11 , ##a)
/* #define V850_SIM_SYS_chdir(a...) V850_SIM_SYSCALL_1 (12 , ##a) */
/* #define V850_SIM_SYS_mknod(a...) V850_SIM_SYSCALL_1 (14 , ##a) */
#define V850_SIM_SYS_chmod(a...) V850_SIM_SYSCALL_2 (15 , ##a)
#define V850_SIM_SYS_chown(a...) V850_SIM_SYSCALL_2 (16 , ##a)
#define V850_SIM_SYS_lseek(a...) V850_SIM_SYSCALL_3 (19 , ##a)
/* #define V850_SIM_SYS_getpid(a...) V850_SIM_SYSCALL_1 (20 , ##a) */
/* #define V850_SIM_SYS_isatty(a...) V850_SIM_SYSCALL_1 (21 , ##a) */
/* #define V850_SIM_SYS_fstat(a...) V850_SIM_SYSCALL_1 (22 , ##a) */
#define V850_SIM_SYS_time(a...) V850_SIM_SYSCALL_1 (23 , ##a)
#define V850_SIM_SYS_poll(a...) V850_SIM_SYSCALL_3 (24 , ##a)
#define V850_SIM_SYS_stat(a...) V850_SIM_SYSCALL_2 (38 , ##a)
#define V850_SIM_SYS_pipe(a...) V850_SIM_SYSCALL_1 (42 , ##a)
#define V850_SIM_SYS_times(a...) V850_SIM_SYSCALL_1 (43 , ##a)
#define V850_SIM_SYS_execve(a...) V850_SIM_SYSCALL_3 (59 , ##a)
#define V850_SIM_SYS_gettimeofday(a...) V850_SIM_SYSCALL_2 (116 , ##a)
/* #define V850_SIM_SYS_utime(a...) V850_SIM_SYSCALL_2 (201 , ##a) */
/* #define V850_SIM_SYS_wait(a...) V850_SIM_SYSCALL_1 (202 , ##a) */
#define V850_SIM_SYS_make_raw(a...) V850_SIM_SYSCALL_1 (1024 , ##a)
#define V850_SIM_SYSCALL_0(_call) \
({ \
register int call __asm__ ("r6") = _call; \
register int rval __asm__ ("r10"); \
__asm__ __volatile__ ("trap 31" \
: "=r" (rval) \
: "r" (call) \
: "r11", "memory"); \
rval; \
})
#define V850_SIM_SYSCALL_1(_call, _arg0) \
({ \
register int call __asm__ ("r6") = _call; \
register long arg0 __asm__ ("r7") = (long)_arg0; \
register int rval __asm__ ("r10"); \
__asm__ __volatile__ ("trap 31" \
: "=r" (rval) \
: "r" (call), "r" (arg0) \
: "r11", "memory"); \
rval; \
})
#define V850_SIM_SYSCALL_2(_call, _arg0, _arg1) \
({ \
register int call __asm__ ("r6") = _call; \
register long arg0 __asm__ ("r7") = (long)_arg0; \
register long arg1 __asm__ ("r8") = (long)_arg1; \
register int rval __asm__ ("r10"); \
__asm__ __volatile__ ("trap 31" \
: "=r" (rval) \
: "r" (call), "r" (arg0), "r" (arg1) \
: "r11", "memory"); \
rval; \
})
#define V850_SIM_SYSCALL_3(_call, _arg0, _arg1, _arg2) \
({ \
register int call __asm__ ("r6") = _call; \
register long arg0 __asm__ ("r7") = (long)_arg0; \
register long arg1 __asm__ ("r8") = (long)_arg1; \
register long arg2 __asm__ ("r9") = (long)_arg2; \
register int rval __asm__ ("r10"); \
__asm__ __volatile__ ("trap 31" \
: "=r" (rval) \
: "r" (call), "r" (arg0), "r" (arg1), "r" (arg2)\
: "r11", "memory"); \
rval; \
})
#define V850_SIM_SYSCALL(call, args...) \
V850_SIM_SYS_##call (args)
#endif /* __V850_SIMSYSCALL_H__ */

57
include/asm-v850/socket.h
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@@ -1,57 +0,0 @@
#ifndef __V850_SOCKET_H__
#define __V850_SOCKET_H__
#include <asm/sockios.h>
/* For setsockoptions(2) */
#define SOL_SOCKET 1
#define SO_DEBUG 1
#define SO_REUSEADDR 2
#define SO_TYPE 3
#define SO_ERROR 4
#define SO_DONTROUTE 5
#define SO_BROADCAST 6
#define SO_SNDBUF 7
#define SO_RCVBUF 8
#define SO_SNDBUFFORCE 32
#define SO_RCVBUFFORCE 33
#define SO_KEEPALIVE 9
#define SO_OOBINLINE 10
#define SO_NO_CHECK 11
#define SO_PRIORITY 12
#define SO_LINGER 13
#define SO_BSDCOMPAT 14
/* To add :#define SO_REUSEPORT 15 */
#define SO_PASSCRED 16
#define SO_PEERCRED 17
#define SO_RCVLOWAT 18
#define SO_SNDLOWAT 19
#define SO_RCVTIMEO 20
#define SO_SNDTIMEO 21
/* Security levels - as per NRL IPv6 - don't actually do anything */
#define SO_SECURITY_AUTHENTICATION 22
#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
#define SO_SECURITY_ENCRYPTION_NETWORK 24
#define SO_BINDTODEVICE 25
/* Socket filtering */
#define SO_ATTACH_FILTER 26
#define SO_DETACH_FILTER 27
#define SO_PEERNAME 28
#define SO_TIMESTAMP 29
#define SCM_TIMESTAMP SO_TIMESTAMP
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
#define SO_PASSSEC 34
#define SO_TIMESTAMPNS 35
#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
#define SO_MARK 36
#endif /* __V850_SOCKET_H__ */

13
include/asm-v850/sockios.h
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@@ -1,13 +0,0 @@
#ifndef __V850_SOCKIOS_H__
#define __V850_SOCKIOS_H__
/* Socket-level I/O control calls. */
#define FIOSETOWN 0x8901
#define SIOCSPGRP 0x8902
#define FIOGETOWN 0x8903
#define SIOCGPGRP 0x8904
#define SIOCATMARK 0x8905
#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
#endif /* __V850_SOCKIOS_H__ */

73
include/asm-v850/stat.h
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@@ -1,73 +0,0 @@
/*
* include/asm-v850/stat.h -- v850 stat structure
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_STAT_H__
#define __V850_STAT_H__
#include <asm/posix_types.h>
struct stat {
unsigned int st_dev;
unsigned long st_ino;
unsigned int st_mode;
unsigned int st_nlink;
unsigned int st_uid;
unsigned int st_gid;
unsigned int st_rdev;
long st_size;
unsigned long st_blksize;
unsigned long st_blocks;
unsigned long st_atime;
unsigned long __unused1;
unsigned long st_mtime;
unsigned long __unused2;
unsigned long st_ctime;
unsigned long __unused3;
unsigned long __unused4;
unsigned long __unused5;
};
struct stat64 {
unsigned long long st_dev;
unsigned long __unused1;
unsigned long long st_ino;
unsigned int st_mode;
unsigned int st_nlink;
unsigned int st_uid;
unsigned int st_gid;
unsigned long long st_rdev;
unsigned long __unused3;
long long st_size;
unsigned long st_blksize;
unsigned long st_blocks; /* No. of 512-byte blocks allocated */
unsigned long __unused4; /* future possible st_blocks high bits */
unsigned long st_atime;
unsigned long st_atime_nsec;
unsigned long st_mtime;
unsigned long st_mtime_nsec;
unsigned long st_ctime;
unsigned long st_ctime_nsec;
unsigned long __unused8;
};
#endif /* __V850_STAT_H__ */

6
include/asm-v850/statfs.h
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@@ -1,6 +0,0 @@
#ifndef __V850_STATFS_H__
#define __V850_STATFS_H__
#include <asm-generic/statfs.h>
#endif /* __V850_STATFS_H__ */

25
include/asm-v850/string.h
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@@ -1,25 +0,0 @@
/*
* include/asm-v850/string.h -- Architecture specific string routines
*
* Copyright (C) 2001,02 NEC Corporation
* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_STRING_H__
#define __V850_STRING_H__
#define __HAVE_ARCH_MEMCPY
#define __HAVE_ARCH_MEMSET
#define __HAVE_ARCH_MEMMOVE
extern void *memcpy (void *, const void *, __kernel_size_t);
extern void *memset (void *, int, __kernel_size_t);
extern void *memmove (void *, const void *, __kernel_size_t);
#endif /* __V850_STRING_H__ */

123
include/asm-v850/system.h
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@@ -1,123 +0,0 @@
/*
* include/asm-v850/system.h -- Low-level interrupt/thread ops
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_SYSTEM_H__
#define __V850_SYSTEM_H__
#include <linux/linkage.h>
#include <asm/ptrace.h>
/*
* switch_to(n) should switch tasks to task ptr, first checking that
* ptr isn't the current task, in which case it does nothing.
*/
struct thread_struct;
extern void *switch_thread (struct thread_struct *last,
struct thread_struct *next);
#define switch_to(prev,next,last) \
do { \
if (prev != next) { \
(last) = switch_thread (&prev->thread, &next->thread); \
} \
} while (0)
/* Enable/disable interrupts. */
#define local_irq_enable() __asm__ __volatile__ ("ei")
#define local_irq_disable() __asm__ __volatile__ ("di")
#define local_save_flags(flags) \
__asm__ __volatile__ ("stsr %1, %0" : "=r" (flags) : "i" (SR_PSW))
#define local_restore_flags(flags) \
__asm__ __volatile__ ("ldsr %0, %1" :: "r" (flags), "i" (SR_PSW))
/* For spinlocks etc */
#define local_irq_save(flags) \
do { local_save_flags (flags); local_irq_disable (); } while (0)
#define local_irq_restore(flags) \
local_restore_flags (flags);
static inline int irqs_disabled (void)
{
unsigned flags;
local_save_flags (flags);
return !!(flags & 0x20);
}
/*
* Force strict CPU ordering.
* Not really required on v850...
*/
#define nop() __asm__ __volatile__ ("nop")
#define mb() __asm__ __volatile__ ("" ::: "memory")
#define rmb() mb ()
#define wmb() mb ()
#define read_barrier_depends() ((void)0)
#define set_mb(var, value) do { xchg (&var, value); } while (0)
#define smp_mb() mb ()
#define smp_rmb() rmb ()
#define smp_wmb() wmb ()
#define smp_read_barrier_depends() read_barrier_depends()
#define xchg(ptr, with) \
((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr))))
static inline unsigned long __xchg (unsigned long with,
__volatile__ void *ptr, int size)
{
unsigned long tmp, flags;
local_irq_save (flags);
switch (size) {
case 1:
tmp = *(unsigned char *)ptr;
*(unsigned char *)ptr = with;
break;
case 2:
tmp = *(unsigned short *)ptr;
*(unsigned short *)ptr = with;
break;
case 4:
tmp = *(unsigned long *)ptr;
*(unsigned long *)ptr = with;
break;
}
local_irq_restore (flags);
return tmp;
}
#include <asm-generic/cmpxchg-local.h>
/*
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
* them available.
*/
#define cmpxchg_local(ptr, o, n) \
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
(unsigned long)(n), sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
#ifndef CONFIG_SMP
#include <asm-generic/cmpxchg.h>
#endif
#define arch_align_stack(x) (x)
#endif /* __V850_SYSTEM_H__ */

101
include/asm-v850/teg.h
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@@ -1,101 +0,0 @@
/*
* include/asm-v850/teg.h -- NB85E-TEG cpu chip
*
* Copyright (C) 2001,02,03 NEC Electronics Corporation
* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* Written by Miles Bader <miles@gnu.org>
*/
#ifndef __V850_TEG_H__
#define __V850_TEG_H__
/* The TEG uses the V850E cpu core. */
#include <asm/v850e.h>
#include <asm/v850e_cache.h>
#define CPU_MODEL "v850e/nb85e-teg"
#define CPU_MODEL_LONG "NEC V850E/NB85E TEG"
/* For <asm/entry.h> */
/* We use on-chip RAM, for a few miscellaneous variables that must be
accessible using a load instruction relative to R0. On the NB85E/TEG,
There's 60KB of iRAM starting at 0xFFFF0000, however we need the base
address to be addressable by a 16-bit signed offset, so we only use the
second half of it starting from 0xFFFF8000. */
#define R0_RAM_ADDR 0xFFFF8000
/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).
Some of these are parameterized even though there's only a single
interrupt, for compatibility with some generic code that works on other
processor models. */
#define IRQ_INTCMD(n) 6 /* interval timer interrupt */
#define IRQ_INTCMD_NUM 1
#define IRQ_INTSER(n) 16 /* UART reception error */
#define IRQ_INTSER_NUM 1
#define IRQ_INTSR(n) 17 /* UART reception completion */
#define IRQ_INTSR_NUM 1
#define IRQ_INTST(n) 18 /* UART transmission completion */
#define IRQ_INTST_NUM 1
/* For <asm/irq.h> */
#define NUM_CPU_IRQS 64
/* TEG UART details. */
#define V850E_UART_BASE_ADDR(n) (0xFFFFF600 + 0x10 * (n))
#define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0)
#define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2)
#define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4)
#define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6)
#define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x8)
#define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xA)
#define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xC)
#define V850E_UART_NUM_CHANNELS 1
#define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
/* This is a function that gets called before configuring the UART. */
#define V850E_UART_PRE_CONFIGURE teg_uart_pre_configure
#ifndef __ASSEMBLY__
extern void teg_uart_pre_configure (unsigned chan,
unsigned cflags, unsigned baud);
#endif
/* The TEG RTPU. */
#define V850E_RTPU_BASE_ADDR 0xFFFFF210
/* TEG series timer D details. */
#define V850E_TIMER_D_BASE_ADDR 0xFFFFF210
#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x8)
#define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
/* `Interrupt Source Select' control register. */
#define TEG_ISS_ADDR 0xFFFFF7FA
#define TEG_ISS (*(volatile u8 *)TEG_ISS_ADDR)
/* Port 0 I/O register (bits 0-3 used). */
#define TEG_PORT0_IO_ADDR 0xFFFFF7F2
#define TEG_PORT0_IO (*(volatile u8 *)TEG_PORT0_IO_ADDR)
/* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input). */
#define TEG_PORT0_PM_ADDR 0xFFFFF7F4
#define TEG_PORT0_PM (*(volatile u8 *)TEG_PORT0_PM_ADDR)
#ifndef __ASSEMBLY__
extern void teg_init_irqs (void);
#endif
#endif /* __V850_TEG_H__ */

200
include/asm-v850/termbits.h
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@@ -1,200 +0,0 @@
#ifndef __V850_TERMBITS_H__
#define __V850_TERMBITS_H__
#include <linux/posix_types.h>
typedef unsigned char cc_t;
typedef unsigned int speed_t;
typedef unsigned int tcflag_t;
#define NCCS 19
struct termios {
tcflag_t c_iflag; /* input mode flags */
tcflag_t c_oflag; /* output mode flags */
tcflag_t c_cflag; /* control mode flags */
tcflag_t c_lflag; /* local mode flags */
cc_t c_line; /* line discipline */
cc_t c_cc[NCCS]; /* control characters */
};
struct termios2 {
tcflag_t c_iflag; /* input mode flags */
tcflag_t c_oflag; /* output mode flags */
tcflag_t c_cflag; /* control mode flags */
tcflag_t c_lflag; /* local mode flags */
cc_t c_line; /* line discipline */
cc_t c_cc[NCCS]; /* control characters */
speed_t c_ispeed; /* input speed */
speed_t c_ospeed; /* output speed */
};
struct ktermios {
tcflag_t c_iflag; /* input mode flags */
tcflag_t c_oflag; /* output mode flags */
tcflag_t c_cflag; /* control mode flags */
tcflag_t c_lflag; /* local mode flags */
cc_t c_line; /* line discipline */
cc_t c_cc[NCCS]; /* control characters */
speed_t c_ispeed; /* input speed */
speed_t c_ospeed; /* output speed */
};
/* c_cc characters */
#define VINTR 0
#define VQUIT 1
#define VERASE 2
#define VKILL 3
#define VEOF 4
#define VTIME 5
#define VMIN 6
#define VSWTC 7
#define VSTART 8
#define VSTOP 9
#define VSUSP 10
#define VEOL 11
#define VREPRINT 12
#define VDISCARD 13
#define VWERASE 14
#define VLNEXT 15
#define VEOL2 16
/* c_iflag bits */
#define IGNBRK 0000001
#define BRKINT 0000002
#define IGNPAR 0000004
#define PARMRK 0000010
#define INPCK 0000020
#define ISTRIP 0000040
#define INLCR 0000100
#define IGNCR 0000200
#define ICRNL 0000400
#define IUCLC 0001000
#define IXON 0002000
#define IXANY 0004000
#define IXOFF 0010000
#define IMAXBEL 0020000
#define IUTF8 0040000
/* c_oflag bits */
#define OPOST 0000001
#define OLCUC 0000002
#define ONLCR 0000004
#define OCRNL 0000010
#define ONOCR 0000020
#define ONLRET 0000040
#define OFILL 0000100
#define OFDEL 0000200
#define NLDLY 0000400
#define NL0 0000000
#define NL1 0000400
#define CRDLY 0003000
#define CR0 0000000
#define CR1 0001000
#define CR2 0002000
#define CR3 0003000
#define TABDLY 0014000
#define TAB0 0000000
#define TAB1 0004000
#define TAB2 0010000
#define TAB3 0014000
#define XTABS 0014000
#define BSDLY 0020000
#define BS0 0000000
#define BS1 0020000
#define VTDLY 0040000
#define VT0 0000000
#define VT1 0040000
#define FFDLY 0100000
#define FF0 0000000
#define FF1 0100000
/* c_cflag bit meaning */
#define CBAUD 0010017
#define B0 0000000 /* hang up */
#define B50 0000001
#define B75 0000002
#define B110 0000003
#define B134 0000004
#define B150 0000005
#define B200 0000006
#define B300 0000007
#define B600 0000010
#define B1200 0000011
#define B1800 0000012
#define B2400 0000013
#define B4800 0000014
#define B9600 0000015
#define B19200 0000016
#define B38400 0000017
#define EXTA B19200
#define EXTB B38400
#define CSIZE 0000060
#define CS5 0000000
#define CS6 0000020
#define CS7 0000040
#define CS8 0000060
#define CSTOPB 0000100
#define CREAD 0000200
#define PARENB 0000400
#define PARODD 0001000
#define HUPCL 0002000
#define CLOCAL 0004000
#define CBAUDEX 0010000
#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
#define B460800 0010004
#define B500000 0010005
#define B576000 0010006
#define B921600 0010007
#define B1000000 0010010
#define B1152000 0010011
#define B1500000 0010012
#define B2000000 0010013
#define B2500000 0010014
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#define IBSHIFT 16 /* Shifr from CBAUD to CIBAUD */
/* c_lflag bits */
#define ISIG 0000001
#define ICANON 0000002
#define XCASE 0000004
#define ECHO 0000010
#define ECHOE 0000020
#define ECHOK 0000040
#define ECHONL 0000100
#define NOFLSH 0000200
#define TOSTOP 0000400
#define ECHOCTL 0001000
#define ECHOPRT 0002000
#define ECHOKE 0004000
#define FLUSHO 0010000
#define PENDIN 0040000
#define IEXTEN 0100000
/* tcflow() and TCXONC use these */
#define TCOOFF 0
#define TCOON 1
#define TCIOFF 2
#define TCION 3
/* tcflush() and TCFLSH use these */
#define TCIFLUSH 0
#define TCOFLUSH 1
#define TCIOFLUSH 2
/* tcsetattr uses these */
#define TCSANOW 0
#define TCSADRAIN 1
#define TCSAFLUSH 2
#endif /* __V850_TERMBITS_H__ */

90
include/asm-v850/termios.h
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@@ -1,90 +0,0 @@
#ifndef __V850_TERMIOS_H__
#define __V850_TERMIOS_H__
#include <asm/termbits.h>
#include <asm/ioctls.h>
struct winsize {
unsigned short ws_row;
unsigned short ws_col;
unsigned short ws_xpixel;
unsigned short ws_ypixel;
};
#define NCC 8
struct termio {
unsigned short c_iflag; /* input mode flags */
unsigned short c_oflag; /* output mode flags */
unsigned short c_cflag; /* control mode flags */
unsigned short c_lflag; /* local mode flags */
unsigned char c_line; /* line discipline */
unsigned char c_cc[NCC]; /* control characters */
};
/* modem lines */
#define TIOCM_LE 0x001
#define TIOCM_DTR 0x002
#define TIOCM_RTS 0x004
#define TIOCM_ST 0x008
#define TIOCM_SR 0x010
#define TIOCM_CTS 0x020
#define TIOCM_CAR 0x040
#define TIOCM_RNG 0x080
#define TIOCM_DSR 0x100
#define TIOCM_CD TIOCM_CAR
#define TIOCM_RI TIOCM_RNG
#define TIOCM_OUT1 0x2000
#define TIOCM_OUT2 0x4000
#define TIOCM_LOOP 0x8000
/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
#ifdef __KERNEL__
/* intr=^C quit=^\ erase=del kill=^U
eof=^D vtime=\0 vmin=\1 sxtc=\0
start=^Q stop=^S susp=^Z eol=\0
reprint=^R discard=^U werase=^W lnext=^V
eol2=\0
*/
#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
/*
* Translate a "termio" structure into a "termios". Ugh.
*/
#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
unsigned short __tmp; \
get_user(__tmp,&(termio)->x); \
*(unsigned short *) &(termios)->x = __tmp; \
}
#define user_termio_to_kernel_termios(termios, termio) \
({ \
SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
})
/*
* Translate a "termios" structure into a "termio". Ugh.
*/
#define kernel_termios_to_user_termio(termio, termios) \
({ \
put_user((termios)->c_iflag, &(termio)->c_iflag); \
put_user((termios)->c_oflag, &(termio)->c_oflag); \
put_user((termios)->c_cflag, &(termio)->c_cflag); \
put_user((termios)->c_lflag, &(termio)->c_lflag); \
put_user((termios)->c_line, &(termio)->c_line); \
copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
})
#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
#endif /* __KERNEL__ */
#endif /* __V850_TERMIOS_H__ */

129
include/asm-v850/thread_info.h
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@@ -1,129 +0,0 @@
/*
* include/asm-v850/thread_info.h -- v850 low-level thread information
*
* Copyright (C) 2002 NEC Corporation
* Copyright (C) 2002 Miles Bader <miles@gnu.org>
* Copyright (C) 2002 David Howells (dhowells@redhat.com)
* - Incorporating suggestions made by Linus Torvalds and Dave Miller
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* This file was derived from the PPC version, include/asm-ppc/thread_info.h
* which was adapted from the i386 version by Paul Mackerras
*/
#ifndef __V850_THREAD_INFO_H__
#define __V850_THREAD_INFO_H__
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
/*
* low level task data.
* If you change this, change the TI_* offsets below to match.
*/
struct thread_info {
struct task_struct *task; /* main task structure */
struct exec_domain *exec_domain; /* execution domain */
unsigned long flags; /* low level flags */
int cpu; /* cpu we're on */
int preempt_count; /* 0 => preemptable,
<0 => BUG */
struct restart_block restart_block;
};
#define INIT_THREAD_INFO(tsk) \
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
.flags = 0, \
.cpu = 0, \
.preempt_count = 1, \
.restart_block = { \
.fn = do_no_restart_syscall, \
}, \
}
#define init_thread_info (init_thread_union.thread_info)
#define init_stack (init_thread_union.stack)
/*
* macros/functions for gaining access to the thread information structure
*/
/* thread information allocation */
#define alloc_thread_info(tsk) ((struct thread_info *) \
__get_free_pages(GFP_KERNEL, 1))
#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
#endif /* __ASSEMBLY__ */
/*
* Offsets in thread_info structure, used in assembly code
*/
#define TI_TASK 0
#define TI_EXECDOMAIN 4
#define TI_FLAGS 8
#define TI_CPU 12
#define TI_PREEMPT 16
#define PREEMPT_ACTIVE 0x4000000
/*
* thread information flag bit numbers
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
#define TIF_SIGPENDING 1 /* signal pending */
#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_MEMDIE 4
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
/* Size of kernel stack for each process. */
#define THREAD_SIZE 0x2000
/* The alignment of kernel threads, with thread_info structures at their
base. Thus, a pointer for a task's task structure can be derived from
its kernel stack pointer. */
#define THREAD_ALIGNMENT THREAD_SIZE
#define THREAD_MASK (-THREAD_ALIGNMENT)
#ifdef __ASSEMBLY__
/* Put a pointer to the current thread_info structure into REG. Note that
this definition requires THREAD_MASK to be representable as a signed
16-bit value. */
#define GET_CURRENT_THREAD(reg) \
/* Use `addi' and then `and' instead of just `andi', because \
`addi' sign-extends the immediate value, whereas `andi' \
zero-extends it. */ \
addi THREAD_MASK, r0, reg; \
and sp, reg
#else
/* Return a pointer to the current thread_info structure. */
static inline struct thread_info *current_thread_info (void)
{
register unsigned long sp __asm__ ("sp");
return (struct thread_info *)(sp & THREAD_MASK);
}
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __V850_THREAD_INFO_H__ */

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