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phy: qcom-qmp: Add missing offsets for Qserdes PLL registers.

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Add missing register offsets for Qserdes PLL.

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20240516032436.2681828-3-quic_devipriy@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
devi priya
2024-05-16 08:54:34 +05:30
committed by Vinod Koul
parent 29f09daab9
commit f1aaa788b9
1 changed files with 3 additions and 0 deletions
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3
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h
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@@ -8,6 +8,9 @@
/* QMP V2 PHY for PCIE gen3 ports - QSERDES PLL registers */ /* QMP V2 PHY for PCIE gen3 ports - QSERDES PLL registers */
#define QSERDES_PLL_BG_TIMER 0x00c #define QSERDES_PLL_BG_TIMER 0x00c
#define QSERDES_PLL_SSC_EN_CENTER 0x010
#define QSERDES_PLL_SSC_ADJ_PER1 0x014
#define QSERDES_PLL_SSC_ADJ_PER2 0x018
#define QSERDES_PLL_SSC_PER1 0x01c #define QSERDES_PLL_SSC_PER1 0x01c
#define QSERDES_PLL_SSC_PER2 0x020 #define QSERDES_PLL_SSC_PER2 0x020
#define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024