From 5774b1e21783e1d716cbfb7b13d00b64886f0b11 Mon Sep 17 00:00:00 2001 From: George Stark Date: Thu, 11 Jul 2024 02:41:16 +0300 Subject: [PATCH 1/4] arm64: dts: meson: a1: add definitions for meson PWM The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF those can be connected to various digital I/O pins. Each of 6 PWM is driven by individually selected clock parent and 8-bit divider. The PWM signal is generated using two 16-bit counters. Signed-off-by: George Stark Signed-off-by: Dmitry Rokosov Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240710234116.2370655-4-gnstark@salutedevices.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 215 ++++++++++++++++++++++ 1 file changed, 215 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index e5366d4239b1..73dbeee982ee 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -245,6 +245,188 @@ mux { }; }; + pwm_a_pins1: pwm-a-pins1 { + mux { + groups = "pwm_a_x6"; + function = "pwm_a"; + }; + }; + + pwm_a_pins2: pwm-a-pins2 { + mux { + groups = "pwm_a_x7"; + function = "pwm_a"; + }; + }; + + pwm_a_pins3: pwm-a-pins3 { + mux { + groups = "pwm_a_f10"; + function = "pwm_a"; + }; + }; + + pwm_a_pins4: pwm-a-pins4 { + mux { + groups = "pwm_a_f6"; + function = "pwm_a"; + }; + }; + + pwm_a_pins5: pwm-a-pins5 { + mux { + groups = "pwm_a_a"; + function = "pwm_a"; + }; + }; + + pwm_b_pins1: pwm-b-pins1 { + mux { + groups = "pwm_b_x"; + function = "pwm_b"; + }; + }; + + pwm_b_pins2: pwm-b-pins2 { + mux { + groups = "pwm_b_f"; + function = "pwm_b"; + }; + }; + + pwm_b_pins3: pwm-b-pins3 { + mux { + groups = "pwm_b_a"; + function = "pwm_b"; + }; + }; + + pwm_c_pins1: pwm-c-pins1 { + mux { + groups = "pwm_c_x"; + function = "pwm_c"; + }; + }; + + pwm_c_pins2: pwm-c-pins2 { + mux { + groups = "pwm_c_f3"; + function = "pwm_c"; + }; + }; + + pwm_c_pins3: pwm-c-pins3 { + mux { + groups = "pwm_c_f8"; + function = "pwm_c"; + }; + }; + + pwm_c_pins4: pwm-c-pins4 { + mux { + groups = "pwm_c_a"; + function = "pwm_c"; + }; + }; + + pwm_d_pins1: pwm-d-pins1 { + mux { + groups = "pwm_d_x15"; + function = "pwm_d"; + }; + }; + + pwm_d_pins2: pwm-d-pins2 { + mux { + groups = "pwm_d_x13"; + function = "pwm_d"; + }; + }; + + pwm_d_pins3: pwm-d-pins3 { + mux { + groups = "pwm_d_x10"; + function = "pwm_d"; + }; + }; + + pwm_d_pins4: pwm-d-pins4 { + mux { + groups = "pwm_d_f"; + function = "pwm_d"; + }; + }; + + pwm_e_pins1: pwm-e-pins1 { + mux { + groups = "pwm_e_p"; + function = "pwm_e"; + }; + }; + + pwm_e_pins2: pwm-e-pins2 { + mux { + groups = "pwm_e_x16"; + function = "pwm_e"; + }; + }; + + pwm_e_pins3: pwm-e-pins3 { + mux { + groups = "pwm_e_x14"; + function = "pwm_e"; + }; + }; + + pwm_e_pins4: pwm-e-pins4 { + mux { + groups = "pwm_e_x2"; + function = "pwm_e"; + }; + }; + + pwm_e_pins5: pwm-e-pins5 { + mux { + groups = "pwm_e_f"; + function = "pwm_e"; + }; + }; + + pwm_e_pins6: pwm-e-pins6 { + mux { + groups = "pwm_e_a"; + function = "pwm_e"; + }; + }; + + pwm_f_pins1: pwm-f-pins1 { + mux { + groups = "pwm_f_b"; + function = "pwm_f"; + }; + }; + + pwm_f_pins2: pwm-f-pins2 { + mux { + groups = "pwm_f_x"; + function = "pwm_f"; + }; + }; + + pwm_f_pins3: pwm-f-pins3 { + mux { + groups = "pwm_f_f4"; + function = "pwm_f"; + }; + }; + + pwm_f_pins4: pwm-f-pins4 { + mux { + groups = "pwm_f_f12"; + function = "pwm_f"; + }; + }; + sdio_pins: sdio { mux0 { groups = "sdcard_d0_x", @@ -340,6 +522,28 @@ uart_AO_B: serial@2000 { status = "disabled"; }; + pwm_ab: pwm@2400 { + compatible = "amlogic,meson-a1-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x2400 0x0 0x24>; + #pwm-cells = <3>; + clocks = <&clkc_periphs CLKID_PWM_A>, + <&clkc_periphs CLKID_PWM_B>; + power-domains = <&pwrc PWRC_I2C_ID>; + status = "disabled"; + }; + + pwm_cd: pwm@2800 { + compatible = "amlogic,meson-a1-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x2800 0x0 0x24>; + #pwm-cells = <3>; + clocks = <&clkc_periphs CLKID_PWM_C>, + <&clkc_periphs CLKID_PWM_D>; + power-domains = <&pwrc PWRC_I2C_ID>; + status = "disabled"; + }; + saradc: adc@2c00 { compatible = "amlogic,meson-g12a-saradc", "amlogic,meson-saradc"; @@ -423,6 +627,17 @@ sec_AO: ao-secure@5a20 { amlogic,has-chip-id; }; + pwm_ef: pwm@5400 { + compatible = "amlogic,meson-a1-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x5400 0x0 0x24>; + #pwm-cells = <3>; + clocks = <&clkc_periphs CLKID_PWM_E>, + <&clkc_periphs CLKID_PWM_F>; + power-domains = <&pwrc PWRC_I2C_ID>; + status = "disabled"; + }; + clkc_pll: pll-clock-controller@7c80 { compatible = "amlogic,a1-pll-clkc"; reg = <0 0x7c80 0 0x18c>; From 7e3b4f56a76b233a70db09ddaa5e822f7cddf371 Mon Sep 17 00:00:00 2001 From: George Stark Date: Thu, 11 Jul 2024 01:32:14 +0300 Subject: [PATCH 2/4] arm64: dts: meson: a1: bind power domain to temperature sensor Meson A1 temperature sensor has dedicated power domain so bind it to the device node. Signed-off-by: George Stark Reviewed-by: Neil Armstrong Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240710223214.2348418-4-gnstark@salutedevices.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 73dbeee982ee..1eba0afb3fd9 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -613,6 +613,7 @@ cpu_temp: temperature-sensor@4c00 { assigned-clock-rates = <500000>; #thermal-sensor-cells = <0>; amlogic,ao-secure = <&sec_AO>; + power-domains = <&pwrc PWRC_I2C_ID>; }; hwrng: rng@5118 { From eeb12b07012f060cc8abd661ebc0a22cf106badc Mon Sep 17 00:00:00 2001 From: Theo Debrouwere Date: Thu, 5 Sep 2024 20:18:03 +0200 Subject: [PATCH 3/4] arm64: dts: meson-g12-common: fix uart-ao-a typo Change uart-a-ao into uart-ao-a, to use the same naming convention as the other uart devices. Signed-off-by: Theo Debrouwere Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20240905181803.94127-1-theo.debrouwere@faytech.de Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index d08c97797010..49b51c54013f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1913,7 +1913,7 @@ mux { }; }; - uart_ao_a_pins: uart-a-ao { + uart_ao_a_pins: uart-ao-a { mux { groups = "uart_ao_a_tx", "uart_ao_a_rx"; From be90cd4bd422e8ae235f534a2fa46d40dae0816b Mon Sep 17 00:00:00 2001 From: Kelvin Zhang Date: Sat, 14 Sep 2024 13:48:59 +0800 Subject: [PATCH 4/4] arm64: dts: amlogic: Add Amlogic C3 PWM Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH, PWM_IJ, PWM_KL and PWM_MN, along with the GPIO pin configurations for each channel. Reviewed-by: Neil Armstrong Signed-off-by: Kelvin Zhang Link: https://lore.kernel.org/r/20240914-c3-pwm-v2-2-ac1f34c68ac2@amlogic.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 364 ++++++++++++++++++++ 1 file changed, 364 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi index d0cda759c25d..fd0e557eba06 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -410,6 +410,300 @@ mux { drive-strength-microamp = <4000>; }; }; + + pwm_a_pins1: pwm-a-pins1 { + mux { + groups = "pwm_a"; + function = "pwm_a"; + }; + }; + + pwm_b_pins1: pwm-b-pins1 { + mux { + groups = "pwm_b"; + function = "pwm_b"; + }; + }; + + pwm_c_pins1: pwm-c-pins1 { + mux { + groups = "pwm_c"; + function = "pwm_c"; + }; + }; + + pwm_d_pins1: pwm-d-pins1 { + mux { + groups = "pwm_d"; + function = "pwm_d"; + }; + }; + + pwm_e_pins1: pwm-e-pins1 { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; + + pwm_f_pins1: pwm-f-pins1 { + mux { + groups = "pwm_f"; + function = "pwm_f"; + }; + }; + + pwm_g_pins1: pwm-g-pins1 { + mux { + groups = "pwm_g_b"; + function = "pwm_g"; + }; + }; + + pwm_g_pins2: pwm-g-pins2 { + mux { + groups = "pwm_g_c"; + function = "pwm_g"; + }; + }; + + pwm_g_pins3: pwm-g-pins3 { + mux { + groups = "pwm_g_d"; + function = "pwm_g"; + }; + }; + + pwm_g_pins4: pwm-g-pins4 { + mux { + groups = "pwm_g_x0"; + function = "pwm_g"; + }; + }; + + pwm_g_pins5: pwm-g-pins5 { + mux { + groups = "pwm_g_x8"; + function = "pwm_g"; + }; + }; + + pwm_h_pins1: pwm-h-pins1 { + mux { + groups = "pwm_h_b"; + function = "pwm_h"; + }; + }; + + pwm_h_pins2: pwm-h-pins2 { + mux { + groups = "pwm_h_c"; + function = "pwm_h"; + }; + }; + + pwm_h_pins3: pwm-h-pins3 { + mux { + groups = "pwm_h_d"; + function = "pwm_h"; + }; + }; + + pwm_h_pins4: pwm-h-pins4 { + mux { + groups = "pwm_h_x1"; + function = "pwm_h"; + }; + }; + + pwm_h_pins5: pwm-h-pins5 { + mux { + groups = "pwm_h_x9"; + function = "pwm_h"; + }; + }; + + pwm_i_pins1: pwm-i-pins1 { + mux { + groups = "pwm_i_b"; + function = "pwm_i"; + }; + }; + + pwm_i_pins2: pwm-i-pins2 { + mux { + groups = "pwm_i_c"; + function = "pwm_i"; + }; + }; + + pwm_i_pins3: pwm-i-pins3 { + mux { + groups = "pwm_i_d"; + function = "pwm_i"; + }; + }; + + pwm_i_pins4: pwm-i-pins4 { + mux { + groups = "pwm_i_x2"; + function = "pwm_i"; + }; + }; + + pwm_i_pins5: pwm-i-pins5 { + mux { + groups = "pwm_i_x10"; + function = "pwm_i"; + }; + }; + + pwm_j_pins1: pwm-j-pins1 { + mux { + groups = "pwm_j_c"; + function = "pwm_j"; + }; + }; + + pwm_j_pins2: pwm-j-pins2 { + mux { + groups = "pwm_j_d"; + function = "pwm_j"; + }; + }; + + pwm_j_pins3: pwm-j-pins3 { + mux { + groups = "pwm_j_b"; + function = "pwm_j"; + }; + }; + + pwm_j_pins4: pwm-j-pins4 { + mux { + groups = "pwm_j_x3"; + function = "pwm_j"; + }; + }; + + pwm_j_pins5: pwm-j-pins5 { + mux { + groups = "pwm_j_x12"; + function = "pwm_j"; + }; + }; + + pwm_k_pins1: pwm-k-pins1 { + mux { + groups = "pwm_k_c"; + function = "pwm_k"; + }; + }; + + pwm_k_pins2: pwm-k-pins2 { + mux { + groups = "pwm_k_d"; + function = "pwm_k"; + }; + }; + + pwm_k_pins3: pwm-k-pins3 { + mux { + groups = "pwm_k_b"; + function = "pwm_k"; + }; + }; + + pwm_k_pins4: pwm-k-pins4 { + mux { + groups = "pwm_k_x4"; + function = "pwm_k"; + }; + }; + + pwm_k_pins5: pwm-k-pins5 { + mux { + groups = "pwm_k_x13"; + function = "pwm_k"; + }; + }; + + pwm_l_pins1: pwm-l-pins1 { + mux { + groups = "pwm_l_c"; + function = "pwm_l"; + }; + }; + + pwm_l_pins2: pwm-l-pins2 { + mux { + groups = "pwm_l_x"; + function = "pwm_l"; + }; + }; + + pwm_l_pins3: pwm-l-pins3 { + mux { + groups = "pwm_l_b"; + function = "pwm_l"; + }; + }; + + pwm_l_pins4: pwm-l-pins4 { + mux { + groups = "pwm_l_a"; + function = "pwm_l"; + }; + }; + + pwm_m_pins1: pwm-m-pins1 { + mux { + groups = "pwm_m_c"; + function = "pwm_m"; + }; + }; + + pwm_m_pins2: pwm-m-pins2 { + mux { + groups = "pwm_m_x"; + function = "pwm_m"; + }; + }; + + pwm_m_pins3: pwm-m-pins3 { + mux { + groups = "pwm_m_a"; + function = "pwm_m"; + }; + }; + + pwm_m_pins4: pwm-m-pins4 { + mux { + groups = "pwm_m_b"; + function = "pwm_m"; + }; + }; + + pwm_n_pins1: pwm-n-pins1 { + mux { + groups = "pwm_n_x"; + function = "pwm_n"; + }; + }; + + pwm_n_pins2: pwm-n-pins2 { + mux { + groups = "pwm_n_a"; + function = "pwm_n"; + }; + }; + + pwm_n_pins3: pwm-n-pins3 { + mux { + groups = "pwm_n_b"; + function = "pwm_n"; + }; + }; }; gpio_intc: interrupt-controller@4080 { @@ -490,6 +784,16 @@ spicc1: spi@52000 { status = "disabled"; }; + pwm_mn: pwm@54000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 54000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_M>, + <&clkc_periphs CLKID_PWM_N>; + #pwm-cells = <3>; + status = "disabled"; + }; + spifc: spi@56000 { compatible = "amlogic,a1-spifc"; reg = <0x0 0x56000 0x0 0x290>; @@ -499,6 +803,66 @@ spifc: spi@56000 { status = "disabled"; }; + pwm_ab: pwm@58000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x58000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_A>, + <&clkc_periphs CLKID_PWM_B>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@5a000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x5a000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_C>, + <&clkc_periphs CLKID_PWM_D>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_ef: pwm@5c000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x5c000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_E>, + <&clkc_periphs CLKID_PWM_F>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_gh: pwm@5e000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x5e000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_G>, + <&clkc_periphs CLKID_PWM_H>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_ij: pwm@60000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x60000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_I>, + <&clkc_periphs CLKID_PWM_J>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_kl: pwm@62000 { + compatible = "amlogic,c3-pwm", + "amlogic,meson-s4-pwm"; + reg = <0x0 0x62000 0x0 0x24>; + clocks = <&clkc_periphs CLKID_PWM_K>, + <&clkc_periphs CLKID_PWM_L>; + #pwm-cells = <3>; + status = "disabled"; + }; + i2c0: i2c@66000 { compatible = "amlogic,meson-axg-i2c"; reg = <0x0 0x66000 0x0 0x24>;