mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-09 00:43:08 -04:00
Merge branch 'fix/asoc' into for-linus
This commit is contained in:
@@ -58,6 +58,7 @@
|
||||
#define METHOD_NAME__PRT "_PRT"
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||||
#define METHOD_NAME__CRS "_CRS"
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||||
#define METHOD_NAME__PRS "_PRS"
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||||
#define METHOD_NAME__AEI "_AEI"
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#define METHOD_NAME__PRW "_PRW"
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#define METHOD_NAME__SRS "_SRS"
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||||
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||||
@@ -15,6 +15,7 @@ extern int pxm_to_node(int);
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extern int node_to_pxm(int);
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extern void __acpi_map_pxm_to_node(int, int);
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extern int acpi_map_pxm_to_node(int);
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extern unsigned char acpi_srat_revision;
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#endif /* CONFIG_ACPI_NUMA */
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#endif /* __ACP_NUMA_H */
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@@ -238,13 +238,6 @@ acpi_os_write_pci_configuration(struct acpi_pci_id *pci_id,
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/*
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* Miscellaneous
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*/
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acpi_status
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acpi_os_validate_address(u8 space_id, acpi_physical_address address,
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acpi_size length, char *name);
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acpi_status
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acpi_os_invalidate_address(u8 space_id, acpi_physical_address address,
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acpi_size length);
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u64 acpi_os_get_timer(void);
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acpi_status acpi_os_signal(u32 function, void *info);
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@@ -47,7 +47,7 @@
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/* Current ACPICA subsystem version in YYYYMMDD format */
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#define ACPI_CA_VERSION 0x20110623
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#define ACPI_CA_VERSION 0x20120111
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#include "actypes.h"
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#include "actbl.h"
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@@ -66,7 +66,7 @@ extern u8 acpi_gbl_create_osi_method;
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extern u8 acpi_gbl_use_default_register_widths;
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extern acpi_name acpi_gbl_trace_method_name;
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extern u32 acpi_gbl_trace_flags;
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extern u32 acpi_gbl_enable_aml_debug_object;
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extern bool acpi_gbl_enable_aml_debug_object;
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extern u8 acpi_gbl_copy_dsdt_locally;
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extern u8 acpi_gbl_truncate_io_addresses;
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extern u8 acpi_gbl_disable_auto_repair;
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@@ -74,6 +74,7 @@ extern u8 acpi_gbl_disable_auto_repair;
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extern u32 acpi_current_gpe_count;
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extern struct acpi_table_fadt acpi_gbl_FADT;
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extern u8 acpi_gbl_system_awake_and_running;
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extern u8 acpi_gbl_reduced_hardware; /* ACPI 5.0 */
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extern u32 acpi_rsdt_forced;
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/*
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@@ -111,6 +112,11 @@ acpi_status acpi_install_interface(acpi_string interface_name);
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acpi_status acpi_remove_interface(acpi_string interface_name);
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u32
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acpi_check_address_range(acpi_adr_space_type space_id,
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acpi_physical_address address,
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acpi_size length, u8 warn);
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/*
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* ACPI Memory management
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*/
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@@ -276,12 +282,23 @@ acpi_status acpi_install_exception_handler(acpi_exception_handler handler);
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acpi_status acpi_install_interface_handler(acpi_interface_handler handler);
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/*
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* Event interfaces
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* Global Lock interfaces
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*/
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acpi_status acpi_acquire_global_lock(u16 timeout, u32 * handle);
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acpi_status acpi_release_global_lock(u32 handle);
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/*
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* Interfaces to AML mutex objects
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*/
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acpi_status
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acpi_acquire_mutex(acpi_handle handle, acpi_string pathname, u16 timeout);
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acpi_status acpi_release_mutex(acpi_handle handle, acpi_string pathname);
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/*
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* Fixed Event interfaces
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*/
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acpi_status acpi_enable_event(u32 event, u32 flags);
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acpi_status acpi_disable_event(u32 event, u32 flags);
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@@ -291,7 +308,7 @@ acpi_status acpi_clear_event(u32 event);
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acpi_status acpi_get_event_status(u32 event, acpi_event_status * event_status);
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/*
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* GPE Interfaces
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* General Purpose Event (GPE) Interfaces
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*/
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acpi_status acpi_enable_gpe(acpi_handle gpe_device, u32 gpe_number);
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@@ -345,6 +362,10 @@ acpi_status
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acpi_get_possible_resources(acpi_handle device, struct acpi_buffer *ret_buffer);
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#endif
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acpi_status
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acpi_get_event_resources(acpi_handle device_handle,
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struct acpi_buffer *ret_buffer);
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acpi_status
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acpi_walk_resources(acpi_handle device,
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char *name,
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@@ -360,6 +381,11 @@ acpi_status
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acpi_resource_to_address64(struct acpi_resource *resource,
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struct acpi_resource_address64 *out);
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acpi_status
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acpi_buffer_to_resource(u8 *aml_buffer,
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u16 aml_buffer_length,
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struct acpi_resource **resource_ptr);
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/*
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* Hardware (ACPI device) interfaces
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*/
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@@ -61,11 +61,14 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_WRITE_COMBINING_MEMORY (u8) 0x02
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#define ACPI_PREFETCHABLE_MEMORY (u8) 0x03
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/*! [Begin] no source code translation */
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/*
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* IO Attributes
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* The ISA IO ranges are: n000-n0_fFh, n400-n4_fFh, n800-n8_fFh, n_c00-n_cFFh.
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* The non-ISA IO ranges are: n100-n3_fFh, n500-n7_fFh, n900-n_bFFh, n_cd0-n_fFFh.
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* The ISA IO ranges are: n000-n0FFh, n400-n4FFh, n800-n8FFh, nC00-nCFFh.
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* The non-ISA IO ranges are: n100-n3FFh, n500-n7FFh, n900-nBFFh, nCD0-nFFFh.
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*/
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/*! [End] no source code translation !*/
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#define ACPI_NON_ISA_ONLY_RANGES (u8) 0x01
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#define ACPI_ISA_ONLY_RANGES (u8) 0x02
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#define ACPI_ENTIRE_RANGE (ACPI_NON_ISA_ONLY_RANGES | ACPI_ISA_ONLY_RANGES)
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@@ -81,16 +84,26 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_DECODE_16 (u8) 0x01 /* 16-bit IO address decode */
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/*
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* IRQ Attributes
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* Interrupt attributes - used in multiple descriptors
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*/
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/* Triggering */
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#define ACPI_LEVEL_SENSITIVE (u8) 0x00
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#define ACPI_EDGE_SENSITIVE (u8) 0x01
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/* Polarity */
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#define ACPI_ACTIVE_HIGH (u8) 0x00
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#define ACPI_ACTIVE_LOW (u8) 0x01
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#define ACPI_ACTIVE_BOTH (u8) 0x02
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/* Sharing */
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#define ACPI_EXCLUSIVE (u8) 0x00
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#define ACPI_SHARED (u8) 0x01
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#define ACPI_EXCLUSIVE_AND_WAKE (u8) 0x02
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#define ACPI_SHARED_AND_WAKE (u8) 0x03
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/*
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* DMA Attributes
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@@ -127,6 +140,8 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_POS_DECODE (u8) 0x00
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#define ACPI_SUB_DECODE (u8) 0x01
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/* Producer/Consumer */
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#define ACPI_PRODUCER (u8) 0x00
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#define ACPI_CONSUMER (u8) 0x01
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@@ -192,6 +207,21 @@ struct acpi_resource_fixed_io {
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u8 address_length;
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};
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struct acpi_resource_fixed_dma {
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u16 request_lines;
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u16 channels;
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u8 width;
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};
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/* Values for Width field above */
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#define ACPI_DMA_WIDTH8 0
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#define ACPI_DMA_WIDTH16 1
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#define ACPI_DMA_WIDTH32 2
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#define ACPI_DMA_WIDTH64 3
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#define ACPI_DMA_WIDTH128 4
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#define ACPI_DMA_WIDTH256 5
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struct acpi_resource_vendor {
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u16 byte_length;
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u8 byte_data[1];
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@@ -329,6 +359,166 @@ struct acpi_resource_generic_register {
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u64 address;
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};
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struct acpi_resource_gpio {
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u8 revision_id;
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u8 connection_type;
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u8 producer_consumer; /* For values, see Producer/Consumer above */
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u8 pin_config;
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u8 sharable; /* For values, see Interrupt Attributes above */
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u8 io_restriction;
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u8 triggering; /* For values, see Interrupt Attributes above */
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u8 polarity; /* For values, see Interrupt Attributes above */
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u16 drive_strength;
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u16 debounce_timeout;
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u16 pin_table_length;
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u16 vendor_length;
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struct acpi_resource_source resource_source;
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u16 *pin_table;
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u8 *vendor_data;
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};
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/* Values for GPIO connection_type field above */
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#define ACPI_RESOURCE_GPIO_TYPE_INT 0
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#define ACPI_RESOURCE_GPIO_TYPE_IO 1
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/* Values for pin_config field above */
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#define ACPI_PIN_CONFIG_DEFAULT 0
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#define ACPI_PIN_CONFIG_PULLUP 1
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#define ACPI_PIN_CONFIG_PULLDOWN 2
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#define ACPI_PIN_CONFIG_NOPULL 3
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/* Values for io_restriction field above */
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#define ACPI_IO_RESTRICT_NONE 0
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#define ACPI_IO_RESTRICT_INPUT 1
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#define ACPI_IO_RESTRICT_OUTPUT 2
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#define ACPI_IO_RESTRICT_NONE_PRESERVE 3
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/* Common structure for I2C, SPI, and UART serial descriptors */
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#define ACPI_RESOURCE_SERIAL_COMMON \
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u8 revision_id; \
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u8 type; \
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u8 producer_consumer; /* For values, see Producer/Consumer above */\
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u8 slave_mode; \
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u8 type_revision_id; \
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u16 type_data_length; \
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u16 vendor_length; \
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struct acpi_resource_source resource_source; \
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u8 *vendor_data;
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struct acpi_resource_common_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON};
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/* Values for the Type field above */
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#define ACPI_RESOURCE_SERIAL_TYPE_I2C 1
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#define ACPI_RESOURCE_SERIAL_TYPE_SPI 2
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#define ACPI_RESOURCE_SERIAL_TYPE_UART 3
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/* Values for slave_mode field above */
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#define ACPI_CONTROLLER_INITIATED 0
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#define ACPI_DEVICE_INITIATED 1
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struct acpi_resource_i2c_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON u8 access_mode;
|
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u16 slave_address;
|
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u32 connection_speed;
|
||||
};
|
||||
|
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/* Values for access_mode field above */
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||||
|
||||
#define ACPI_I2C_7BIT_MODE 0
|
||||
#define ACPI_I2C_10BIT_MODE 1
|
||||
|
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struct acpi_resource_spi_serialbus {
|
||||
ACPI_RESOURCE_SERIAL_COMMON u8 wire_mode;
|
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u8 device_polarity;
|
||||
u8 data_bit_length;
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||||
u8 clock_phase;
|
||||
u8 clock_polarity;
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u16 device_selection;
|
||||
u32 connection_speed;
|
||||
};
|
||||
|
||||
/* Values for wire_mode field above */
|
||||
|
||||
#define ACPI_SPI_4WIRE_MODE 0
|
||||
#define ACPI_SPI_3WIRE_MODE 1
|
||||
|
||||
/* Values for device_polarity field above */
|
||||
|
||||
#define ACPI_SPI_ACTIVE_LOW 0
|
||||
#define ACPI_SPI_ACTIVE_HIGH 1
|
||||
|
||||
/* Values for clock_phase field above */
|
||||
|
||||
#define ACPI_SPI_FIRST_PHASE 0
|
||||
#define ACPI_SPI_SECOND_PHASE 1
|
||||
|
||||
/* Values for clock_polarity field above */
|
||||
|
||||
#define ACPI_SPI_START_LOW 0
|
||||
#define ACPI_SPI_START_HIGH 1
|
||||
|
||||
struct acpi_resource_uart_serialbus {
|
||||
ACPI_RESOURCE_SERIAL_COMMON u8 endian;
|
||||
u8 data_bits;
|
||||
u8 stop_bits;
|
||||
u8 flow_control;
|
||||
u8 parity;
|
||||
u8 lines_enabled;
|
||||
u16 rx_fifo_size;
|
||||
u16 tx_fifo_size;
|
||||
u32 default_baud_rate;
|
||||
};
|
||||
|
||||
/* Values for Endian field above */
|
||||
|
||||
#define ACPI_UART_LITTLE_ENDIAN 0
|
||||
#define ACPI_UART_BIG_ENDIAN 1
|
||||
|
||||
/* Values for data_bits field above */
|
||||
|
||||
#define ACPI_UART_5_DATA_BITS 0
|
||||
#define ACPI_UART_6_DATA_BITS 1
|
||||
#define ACPI_UART_7_DATA_BITS 2
|
||||
#define ACPI_UART_8_DATA_BITS 3
|
||||
#define ACPI_UART_9_DATA_BITS 4
|
||||
|
||||
/* Values for stop_bits field above */
|
||||
|
||||
#define ACPI_UART_NO_STOP_BITS 0
|
||||
#define ACPI_UART_1_STOP_BIT 1
|
||||
#define ACPI_UART_1P5_STOP_BITS 2
|
||||
#define ACPI_UART_2_STOP_BITS 3
|
||||
|
||||
/* Values for flow_control field above */
|
||||
|
||||
#define ACPI_UART_FLOW_CONTROL_NONE 0
|
||||
#define ACPI_UART_FLOW_CONTROL_HW 1
|
||||
#define ACPI_UART_FLOW_CONTROL_XON_XOFF 2
|
||||
|
||||
/* Values for Parity field above */
|
||||
|
||||
#define ACPI_UART_PARITY_NONE 0
|
||||
#define ACPI_UART_PARITY_EVEN 1
|
||||
#define ACPI_UART_PARITY_ODD 2
|
||||
#define ACPI_UART_PARITY_MARK 3
|
||||
#define ACPI_UART_PARITY_SPACE 4
|
||||
|
||||
/* Values for lines_enabled bitfield above */
|
||||
|
||||
#define ACPI_UART_CARRIER_DETECT (1<<2)
|
||||
#define ACPI_UART_RING_INDICATOR (1<<3)
|
||||
#define ACPI_UART_DATA_SET_READY (1<<4)
|
||||
#define ACPI_UART_DATA_TERMINAL_READY (1<<5)
|
||||
#define ACPI_UART_CLEAR_TO_SEND (1<<6)
|
||||
#define ACPI_UART_REQUEST_TO_SEND (1<<7)
|
||||
|
||||
/* ACPI_RESOURCE_TYPEs */
|
||||
|
||||
#define ACPI_RESOURCE_TYPE_IRQ 0
|
||||
@@ -348,7 +538,10 @@ struct acpi_resource_generic_register {
|
||||
#define ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 14 /* ACPI 3.0 */
|
||||
#define ACPI_RESOURCE_TYPE_EXTENDED_IRQ 15
|
||||
#define ACPI_RESOURCE_TYPE_GENERIC_REGISTER 16
|
||||
#define ACPI_RESOURCE_TYPE_MAX 16
|
||||
#define ACPI_RESOURCE_TYPE_GPIO 17 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_FIXED_DMA 18 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_SERIAL_BUS 19 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_MAX 19
|
||||
|
||||
/* Master union for resource descriptors */
|
||||
|
||||
@@ -358,6 +551,7 @@ union acpi_resource_data {
|
||||
struct acpi_resource_start_dependent start_dpf;
|
||||
struct acpi_resource_io io;
|
||||
struct acpi_resource_fixed_io fixed_io;
|
||||
struct acpi_resource_fixed_dma fixed_dma;
|
||||
struct acpi_resource_vendor vendor;
|
||||
struct acpi_resource_vendor_typed vendor_typed;
|
||||
struct acpi_resource_end_tag end_tag;
|
||||
@@ -370,6 +564,11 @@ union acpi_resource_data {
|
||||
struct acpi_resource_extended_address64 ext_address64;
|
||||
struct acpi_resource_extended_irq extended_irq;
|
||||
struct acpi_resource_generic_register generic_reg;
|
||||
struct acpi_resource_gpio gpio;
|
||||
struct acpi_resource_i2c_serialbus i2c_serial_bus;
|
||||
struct acpi_resource_spi_serialbus spi_serial_bus;
|
||||
struct acpi_resource_uart_serialbus uart_serial_bus;
|
||||
struct acpi_resource_common_serialbus common_serial_bus;
|
||||
|
||||
/* Common fields */
|
||||
|
||||
|
||||
@@ -255,6 +255,8 @@ struct acpi_table_fadt {
|
||||
struct acpi_generic_address xpm_timer_block; /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
|
||||
struct acpi_generic_address xgpe0_block; /* 64-bit Extended General Purpose Event 0 Reg Blk address */
|
||||
struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
|
||||
struct acpi_generic_address sleep_control; /* 64-bit Sleep Control register */
|
||||
struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register */
|
||||
};
|
||||
|
||||
/* Masks for FADT Boot Architecture Flags (boot_flags) */
|
||||
@@ -264,6 +266,7 @@ struct acpi_table_fadt {
|
||||
#define ACPI_FADT_NO_VGA (1<<2) /* 02: [V4] It is not safe to probe for VGA hardware */
|
||||
#define ACPI_FADT_NO_MSI (1<<3) /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */
|
||||
#define ACPI_FADT_NO_ASPM (1<<4) /* 04: [V4] PCIe ASPM control must not be enabled */
|
||||
#define ACPI_FADT_NO_CMOS_RTC (1<<5) /* 05: [V5] No CMOS real-time clock present */
|
||||
|
||||
#define FADT2_REVISION_ID 3
|
||||
|
||||
@@ -289,6 +292,8 @@ struct acpi_table_fadt {
|
||||
#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
|
||||
#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
|
||||
#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
|
||||
#define ACPI_FADT_HW_REDUCED (1<<20) /* 20: [V5] ACPI hardware is not implemented (ACPI 5.0) */
|
||||
#define ACPI_FADT_LOW_POWER_S0 (1<<21) /* 21: [V5] S0 power savings are equal or better than S3 (ACPI 5.0) */
|
||||
|
||||
/* Values for preferred_profile (Preferred Power Management Profiles) */
|
||||
|
||||
@@ -299,14 +304,16 @@ enum acpi_prefered_pm_profiles {
|
||||
PM_WORKSTATION = 3,
|
||||
PM_ENTERPRISE_SERVER = 4,
|
||||
PM_SOHO_SERVER = 5,
|
||||
PM_APPLIANCE_PC = 6
|
||||
PM_APPLIANCE_PC = 6,
|
||||
PM_PERFORMANCE_SERVER = 7,
|
||||
PM_TABLET = 8
|
||||
};
|
||||
|
||||
/* Reset to default packing */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#define ACPI_FADT_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_fadt, f)
|
||||
#define ACPI_FADT_OFFSET(f) (u16) ACPI_OFFSET (struct acpi_table_fadt, f)
|
||||
|
||||
/*
|
||||
* Internal table-related structures
|
||||
@@ -342,6 +349,7 @@ struct acpi_table_desc {
|
||||
|
||||
#include <acpi/actbl1.h>
|
||||
#include <acpi/actbl2.h>
|
||||
#include <acpi/actbl3.h>
|
||||
|
||||
/*
|
||||
* Sizes of the various flavors of FADT. We need to look closely
|
||||
@@ -351,12 +359,15 @@ struct acpi_table_desc {
|
||||
* FADT is the bottom line as to what the version really is.
|
||||
*
|
||||
* For reference, the values below are as follows:
|
||||
* FADT V1 size: 0x74
|
||||
* FADT V2 size: 0x84
|
||||
* FADT V3+ size: 0xF4
|
||||
* FADT V1 size: 0x074
|
||||
* FADT V2 size: 0x084
|
||||
* FADT V3 size: 0x0F4
|
||||
* FADT V4 size: 0x0F4
|
||||
* FADT V5 size: 0x10C
|
||||
*/
|
||||
#define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4)
|
||||
#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (reserved4[0]) + 3)
|
||||
#define ACPI_FADT_V3_SIZE (u32) (sizeof (struct acpi_table_fadt))
|
||||
#define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control))
|
||||
#define ACPI_FADT_V5_SIZE (u32) (sizeof (struct acpi_table_fadt))
|
||||
|
||||
#endif /* __ACTBL_H__ */
|
||||
|
||||
@@ -228,7 +228,8 @@ enum acpi_einj_actions {
|
||||
ACPI_EINJ_EXECUTE_OPERATION = 5,
|
||||
ACPI_EINJ_CHECK_BUSY_STATUS = 6,
|
||||
ACPI_EINJ_GET_COMMAND_STATUS = 7,
|
||||
ACPI_EINJ_ACTION_RESERVED = 8, /* 8 and greater are reserved */
|
||||
ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
|
||||
ACPI_EINJ_ACTION_RESERVED = 9, /* 9 and greater are reserved */
|
||||
ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
|
||||
};
|
||||
|
||||
@@ -240,7 +241,27 @@ enum acpi_einj_instructions {
|
||||
ACPI_EINJ_WRITE_REGISTER = 2,
|
||||
ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
|
||||
ACPI_EINJ_NOOP = 4,
|
||||
ACPI_EINJ_INSTRUCTION_RESERVED = 5 /* 5 and greater are reserved */
|
||||
ACPI_EINJ_FLUSH_CACHELINE = 5,
|
||||
ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
|
||||
};
|
||||
|
||||
struct acpi_einj_error_type_with_addr {
|
||||
u32 error_type;
|
||||
u32 vendor_struct_offset;
|
||||
u32 flags;
|
||||
u32 apic_id;
|
||||
u64 address;
|
||||
u64 range;
|
||||
u32 pcie_id;
|
||||
};
|
||||
|
||||
struct acpi_einj_vendor {
|
||||
u32 length;
|
||||
u32 pcie_id;
|
||||
u16 vendor_id;
|
||||
u16 device_id;
|
||||
u8 revision_id;
|
||||
u8 reserved[3];
|
||||
};
|
||||
|
||||
/* EINJ Trigger Error Action Table */
|
||||
@@ -275,6 +296,7 @@ enum acpi_einj_command_status {
|
||||
#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
|
||||
#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
|
||||
#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
|
||||
#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
@@ -631,7 +653,9 @@ enum acpi_madt_type {
|
||||
ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
|
||||
ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
|
||||
ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
|
||||
ACPI_MADT_TYPE_RESERVED = 11 /* 11 and greater are reserved */
|
||||
ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
|
||||
ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
|
||||
ACPI_MADT_TYPE_RESERVED = 13 /* 13 and greater are reserved */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -752,11 +776,36 @@ struct acpi_madt_local_x2apic_nmi {
|
||||
u8 reserved[3];
|
||||
};
|
||||
|
||||
/* 11: Generic Interrupt (ACPI 5.0) */
|
||||
|
||||
struct acpi_madt_generic_interrupt {
|
||||
struct acpi_subtable_header header;
|
||||
u16 reserved; /* Reserved - must be zero */
|
||||
u32 gic_id;
|
||||
u32 uid;
|
||||
u32 flags;
|
||||
u32 parking_version;
|
||||
u32 performance_interrupt;
|
||||
u64 parked_address;
|
||||
u64 base_address;
|
||||
};
|
||||
|
||||
/* 12: Generic Distributor (ACPI 5.0) */
|
||||
|
||||
struct acpi_madt_generic_distributor {
|
||||
struct acpi_subtable_header header;
|
||||
u16 reserved; /* Reserved - must be zero */
|
||||
u32 gic_id;
|
||||
u64 base_address;
|
||||
u32 global_irq_base;
|
||||
u32 reserved2; /* Reserved - must be zero */
|
||||
};
|
||||
|
||||
/*
|
||||
* Common flags fields for MADT subtables
|
||||
*/
|
||||
|
||||
/* MADT Local APIC flags (lapic_flags) */
|
||||
/* MADT Local APIC flags (lapic_flags) and GIC flags */
|
||||
|
||||
#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
|
||||
|
||||
|
||||
552
include/acpi/actbl3.h
Normal file
552
include/acpi/actbl3.h
Normal file
@@ -0,0 +1,552 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Name: actbl3.h - ACPI Table Definitions
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2000 - 2011, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
|
||||
* substantially similar to the "NO WARRANTY" disclaimer below
|
||||
* ("Disclaimer") and any redistribution must be conditioned upon
|
||||
* including a substantially similar Disclaimer requirement for further
|
||||
* binary redistribution.
|
||||
* 3. Neither the names of the above-listed copyright holders nor the names
|
||||
* of any contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||
* Software Foundation.
|
||||
*
|
||||
* NO WARRANTY
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGES.
|
||||
*/
|
||||
|
||||
#ifndef __ACTBL3_H__
|
||||
#define __ACTBL3_H__
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Additional ACPI Tables (3)
|
||||
*
|
||||
* These tables are not consumed directly by the ACPICA subsystem, but are
|
||||
* included here to support device drivers and the AML disassembler.
|
||||
*
|
||||
* The tables in this file are fully defined within the ACPI specification.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
* Values for description table header signatures for tables defined in this
|
||||
* file. Useful because they make it more difficult to inadvertently type in
|
||||
* the wrong signature.
|
||||
*/
|
||||
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
|
||||
#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
|
||||
#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
|
||||
#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
|
||||
#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
|
||||
#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
|
||||
#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
|
||||
#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
|
||||
|
||||
#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
|
||||
#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
|
||||
|
||||
/* Reserved table signatures */
|
||||
|
||||
#define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */
|
||||
#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table 2 */
|
||||
#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
|
||||
#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
|
||||
#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */
|
||||
|
||||
/*
|
||||
* All tables must be byte-packed to match the ACPI specification, since
|
||||
* the tables are provided by the system BIOS.
|
||||
*/
|
||||
#pragma pack(1)
|
||||
|
||||
/*
|
||||
* Note about bitfields: The u8 type is used for bitfields in ACPI tables.
|
||||
* This is the only type that is even remotely portable. Anything else is not
|
||||
* portable, so do not use any other bitfield types.
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* BGRT - Boot Graphics Resource Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_bgrt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u16 version;
|
||||
u8 status;
|
||||
u8 image_type;
|
||||
u64 image_address;
|
||||
u32 image_offset_x;
|
||||
u32 image_offset_y;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* DRTM - Dynamic Root of Trust for Measurement table
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_drtm {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u64 entry_base_address;
|
||||
u64 entry_length;
|
||||
u32 entry_address32;
|
||||
u64 entry_address64;
|
||||
u64 exit_address;
|
||||
u64 log_area_address;
|
||||
u32 log_area_length;
|
||||
u64 arch_dependent_address;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
/* 1) Validated Tables List */
|
||||
|
||||
struct acpi_drtm_vtl_list {
|
||||
u32 validated_table_list_count;
|
||||
};
|
||||
|
||||
/* 2) Resources List */
|
||||
|
||||
struct acpi_drtm_resource_list {
|
||||
u32 resource_list_count;
|
||||
};
|
||||
|
||||
/* 3) Platform-specific Identifiers List */
|
||||
|
||||
struct acpi_drtm_id_list {
|
||||
u32 id_list_count;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FPDT - Firmware Performance Data Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_fpdt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
};
|
||||
|
||||
/* FPDT subtable header */
|
||||
|
||||
struct acpi_fpdt_header {
|
||||
u16 type;
|
||||
u8 length;
|
||||
u8 revision;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
enum acpi_fpdt_type {
|
||||
ACPI_FPDT_TYPE_BOOT = 0,
|
||||
ACPI_FPDT_TYPE_S3PERF = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* FPDT subtables
|
||||
*/
|
||||
|
||||
/* 0: Firmware Basic Boot Performance Record */
|
||||
|
||||
struct acpi_fpdt_boot {
|
||||
struct acpi_fpdt_header header;
|
||||
u8 reserved[4];
|
||||
u64 reset_end;
|
||||
u64 load_start;
|
||||
u64 startup_start;
|
||||
u64 exit_services_entry;
|
||||
u64 exit_services_exit;
|
||||
};
|
||||
|
||||
/* 1: S3 Performance Table Pointer Record */
|
||||
|
||||
struct acpi_fpdt_s3pt_ptr {
|
||||
struct acpi_fpdt_header header;
|
||||
u8 reserved[4];
|
||||
u64 address;
|
||||
};
|
||||
|
||||
/*
|
||||
* S3PT - S3 Performance Table. This table is pointed to by the
|
||||
* FPDT S3 Pointer Record above.
|
||||
*/
|
||||
struct acpi_table_s3pt {
|
||||
u8 signature[4]; /* "S3PT" */
|
||||
u32 length;
|
||||
};
|
||||
|
||||
/*
|
||||
* S3PT Subtables
|
||||
*/
|
||||
struct acpi_s3pt_header {
|
||||
u16 type;
|
||||
u8 length;
|
||||
u8 revision;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
enum acpi_s3pt_type {
|
||||
ACPI_S3PT_TYPE_RESUME = 0,
|
||||
ACPI_S3PT_TYPE_SUSPEND = 1,
|
||||
};
|
||||
|
||||
struct acpi_s3pt_resume {
|
||||
struct acpi_s3pt_header header;
|
||||
u32 resume_count;
|
||||
u64 full_resume;
|
||||
u64 average_resume;
|
||||
};
|
||||
|
||||
struct acpi_s3pt_suspend {
|
||||
struct acpi_s3pt_header header;
|
||||
u64 suspend_start;
|
||||
u64 suspend_end;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* GTDT - Generic Timer Description Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_gtdt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u64 address;
|
||||
u32 flags;
|
||||
u32 secure_pl1_interrupt;
|
||||
u32 secure_pl1_flags;
|
||||
u32 non_secure_pl1_interrupt;
|
||||
u32 non_secure_pl1_flags;
|
||||
u32 virtual_timer_interrupt;
|
||||
u32 virtual_timer_flags;
|
||||
u32 non_secure_pl2_interrupt;
|
||||
u32 non_secure_pl2_flags;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_GTDT_MAPPED_BLOCK_PRESENT 1
|
||||
|
||||
/* Values for all "TimerFlags" fields above */
|
||||
|
||||
#define ACPI_GTDT_INTERRUPT_MODE 1
|
||||
#define ACPI_GTDT_INTERRUPT_POLARITY 2
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* MPST - Memory Power State Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#define ACPI_MPST_CHANNEL_INFO \
|
||||
u16 reserved1; \
|
||||
u8 channel_id; \
|
||||
u8 reserved2; \
|
||||
u16 power_node_count;
|
||||
|
||||
/* Main table */
|
||||
|
||||
struct acpi_table_mpst {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
|
||||
};
|
||||
|
||||
/* Memory Platform Communication Channel Info */
|
||||
|
||||
struct acpi_mpst_channel {
|
||||
ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
|
||||
};
|
||||
|
||||
/* Memory Power Node Structure */
|
||||
|
||||
struct acpi_mpst_power_node {
|
||||
u8 flags;
|
||||
u8 reserved1;
|
||||
u16 node_id;
|
||||
u32 length;
|
||||
u64 range_address;
|
||||
u64 range_length;
|
||||
u8 num_power_states;
|
||||
u8 num_physical_components;
|
||||
u16 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_MPST_ENABLED 1
|
||||
#define ACPI_MPST_POWER_MANAGED 2
|
||||
#define ACPI_MPST_HOT_PLUG_CAPABLE 4
|
||||
|
||||
/* Memory Power State Structure (follows POWER_NODE above) */
|
||||
|
||||
struct acpi_mpst_power_state {
|
||||
u8 power_state;
|
||||
u8 info_index;
|
||||
};
|
||||
|
||||
/* Physical Component ID Structure (follows POWER_STATE above) */
|
||||
|
||||
struct acpi_mpst_component {
|
||||
u16 component_id;
|
||||
};
|
||||
|
||||
/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
|
||||
|
||||
struct acpi_mpst_data_hdr {
|
||||
u16 characteristics_count;
|
||||
};
|
||||
|
||||
struct acpi_mpst_power_data {
|
||||
u8 revision;
|
||||
u8 flags;
|
||||
u16 reserved1;
|
||||
u32 average_power;
|
||||
u32 power_saving;
|
||||
u64 exit_latency;
|
||||
u64 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_MPST_PRESERVE 1
|
||||
#define ACPI_MPST_AUTOENTRY 2
|
||||
#define ACPI_MPST_AUTOEXIT 4
|
||||
|
||||
/* Shared Memory Region (not part of an ACPI table) */
|
||||
|
||||
struct acpi_mpst_shared {
|
||||
u32 signature;
|
||||
u16 pcc_command;
|
||||
u16 pcc_status;
|
||||
u16 command_register;
|
||||
u16 status_register;
|
||||
u16 power_state_id;
|
||||
u16 power_node_id;
|
||||
u64 energy_consumed;
|
||||
u64 average_power;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* PCCT - Platform Communications Channel Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_pcct {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u32 flags;
|
||||
u32 latency;
|
||||
u32 reserved;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_PCCT_DOORBELL 1
|
||||
|
||||
/*
|
||||
* PCCT subtables
|
||||
*/
|
||||
|
||||
/* 0: Generic Communications Subspace */
|
||||
|
||||
struct acpi_pcct_subspace {
|
||||
struct acpi_subtable_header header;
|
||||
u8 reserved[6];
|
||||
u64 base_address;
|
||||
u64 length;
|
||||
struct acpi_generic_address doorbell_register;
|
||||
u64 preserve_mask;
|
||||
u64 write_mask;
|
||||
};
|
||||
|
||||
/*
|
||||
* PCC memory structures (not part of the ACPI table)
|
||||
*/
|
||||
|
||||
/* Shared Memory Region */
|
||||
|
||||
struct acpi_pcct_shared_memory {
|
||||
u32 signature;
|
||||
u16 command;
|
||||
u16 status;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* PMTT - Platform Memory Topology Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_pmtt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u32 reserved;
|
||||
};
|
||||
|
||||
/* Common header for PMTT subtables that follow main table */
|
||||
|
||||
struct acpi_pmtt_header {
|
||||
u8 type;
|
||||
u8 reserved1;
|
||||
u16 length;
|
||||
u16 flags;
|
||||
u16 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
#define ACPI_PMTT_TYPE_SOCKET 0
|
||||
#define ACPI_PMTT_TYPE_CONTROLLER 1
|
||||
#define ACPI_PMTT_TYPE_DIMM 2
|
||||
#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_PMTT_TOP_LEVEL 0x0001
|
||||
#define ACPI_PMTT_PHYSICAL 0x0002
|
||||
#define ACPI_PMTT_MEMORY_TYPE 0x000C
|
||||
|
||||
/*
|
||||
* PMTT subtables, correspond to Type in struct acpi_pmtt_header
|
||||
*/
|
||||
|
||||
/* 0: Socket Structure */
|
||||
|
||||
struct acpi_pmtt_socket {
|
||||
struct acpi_pmtt_header header;
|
||||
u16 socket_id;
|
||||
u16 reserved;
|
||||
};
|
||||
|
||||
/* 1: Memory Controller subtable */
|
||||
|
||||
struct acpi_pmtt_controller {
|
||||
struct acpi_pmtt_header header;
|
||||
u32 read_latency;
|
||||
u32 write_latency;
|
||||
u32 read_bandwidth;
|
||||
u32 write_bandwidth;
|
||||
u16 access_width;
|
||||
u16 alignment;
|
||||
u16 reserved;
|
||||
u16 domain_count;
|
||||
};
|
||||
|
||||
/* 1a: Proximity Domain substructure */
|
||||
|
||||
struct acpi_pmtt_domain {
|
||||
u32 proximity_domain;
|
||||
};
|
||||
|
||||
/* 2: Physical Component Identifier (DIMM) */
|
||||
|
||||
struct acpi_pmtt_physical_component {
|
||||
struct acpi_pmtt_header header;
|
||||
u16 component_id;
|
||||
u16 reserved;
|
||||
u32 memory_size;
|
||||
u32 bios_handle;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RASF - RAS Feature Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_rasf {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u8 channel_id[12];
|
||||
};
|
||||
|
||||
/* RASF Platform Communication Channel Shared Memory Region */
|
||||
|
||||
struct acpi_rasf_shared_memory {
|
||||
u32 signature;
|
||||
u16 command;
|
||||
u16 status;
|
||||
u64 requested_address;
|
||||
u64 requested_length;
|
||||
u64 actual_address;
|
||||
u64 actual_length;
|
||||
u16 flags;
|
||||
u8 speed;
|
||||
};
|
||||
|
||||
/* Masks for Flags and Speed fields above */
|
||||
|
||||
#define ACPI_RASF_SCRUBBER_RUNNING 1
|
||||
#define ACPI_RASF_SPEED (7<<1)
|
||||
|
||||
/* Channel Commands */
|
||||
|
||||
enum acpi_rasf_commands {
|
||||
ACPI_RASF_GET_RAS_CAPABILITIES = 1,
|
||||
ACPI_RASF_GET_PATROL_PARAMETERS = 2,
|
||||
ACPI_RASF_START_PATROL_SCRUBBER = 3,
|
||||
ACPI_RASF_STOP_PATROL_SCRUBBER = 4
|
||||
};
|
||||
|
||||
/* Channel Command flags */
|
||||
|
||||
#define ACPI_RASF_GENERATE_SCI (1<<15)
|
||||
|
||||
/* Status values */
|
||||
|
||||
enum acpi_rasf_status {
|
||||
ACPI_RASF_SUCCESS = 0,
|
||||
ACPI_RASF_NOT_VALID = 1,
|
||||
ACPI_RASF_NOT_SUPPORTED = 2,
|
||||
ACPI_RASF_BUSY = 3,
|
||||
ACPI_RASF_FAILED = 4,
|
||||
ACPI_RASF_ABORTED = 5,
|
||||
ACPI_RASF_INVALID_DATA = 6
|
||||
};
|
||||
|
||||
/* Status flags */
|
||||
|
||||
#define ACPI_RASF_COMMAND_COMPLETE (1)
|
||||
#define ACPI_RASF_SCI_DOORBELL (1<<1)
|
||||
#define ACPI_RASF_ERROR (1<<2)
|
||||
#define ACPI_RASF_STATUS (0x1F<<3)
|
||||
|
||||
/* Reset to default packing */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* __ACTBL3_H__ */
|
||||
@@ -712,8 +712,10 @@ typedef u8 acpi_adr_space_type;
|
||||
#define ACPI_ADR_SPACE_CMOS (acpi_adr_space_type) 5
|
||||
#define ACPI_ADR_SPACE_PCI_BAR_TARGET (acpi_adr_space_type) 6
|
||||
#define ACPI_ADR_SPACE_IPMI (acpi_adr_space_type) 7
|
||||
#define ACPI_ADR_SPACE_GPIO (acpi_adr_space_type) 8
|
||||
#define ACPI_ADR_SPACE_GSBUS (acpi_adr_space_type) 9
|
||||
|
||||
#define ACPI_NUM_PREDEFINED_REGIONS 8
|
||||
#define ACPI_NUM_PREDEFINED_REGIONS 10
|
||||
|
||||
/*
|
||||
* Special Address Spaces
|
||||
@@ -957,6 +959,14 @@ acpi_status(*acpi_adr_space_handler) (u32 function,
|
||||
|
||||
#define ACPI_DEFAULT_HANDLER NULL
|
||||
|
||||
/* Special Context data for generic_serial_bus/general_purpose_io (ACPI 5.0) */
|
||||
|
||||
struct acpi_connection_info {
|
||||
u8 *connection;
|
||||
u16 length;
|
||||
u8 access_length;
|
||||
};
|
||||
|
||||
typedef
|
||||
acpi_status(*acpi_adr_space_setup) (acpi_handle region_handle,
|
||||
u32 function,
|
||||
|
||||
@@ -16,10 +16,10 @@
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
extern int hest_disable;
|
||||
extern bool hest_disable;
|
||||
extern int erst_disable;
|
||||
#ifdef CONFIG_ACPI_APEI_GHES
|
||||
extern int ghes_disable;
|
||||
extern bool ghes_disable;
|
||||
#else
|
||||
#define ghes_disable 1
|
||||
#endif
|
||||
|
||||
@@ -4,70 +4,66 @@
|
||||
#include <linux/time.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
typedef unsigned long cputime_t;
|
||||
typedef unsigned long __nocast cputime_t;
|
||||
|
||||
#define cputime_zero (0UL)
|
||||
#define cputime_one_jiffy jiffies_to_cputime(1)
|
||||
#define cputime_max ((~0UL >> 1) - 1)
|
||||
#define cputime_add(__a, __b) ((__a) + (__b))
|
||||
#define cputime_sub(__a, __b) ((__a) - (__b))
|
||||
#define cputime_div(__a, __n) ((__a) / (__n))
|
||||
#define cputime_halve(__a) ((__a) >> 1)
|
||||
#define cputime_eq(__a, __b) ((__a) == (__b))
|
||||
#define cputime_gt(__a, __b) ((__a) > (__b))
|
||||
#define cputime_ge(__a, __b) ((__a) >= (__b))
|
||||
#define cputime_lt(__a, __b) ((__a) < (__b))
|
||||
#define cputime_le(__a, __b) ((__a) <= (__b))
|
||||
#define cputime_to_jiffies(__ct) (__ct)
|
||||
#define cputime_to_jiffies(__ct) (__force unsigned long)(__ct)
|
||||
#define cputime_to_scaled(__ct) (__ct)
|
||||
#define jiffies_to_cputime(__hz) (__hz)
|
||||
#define jiffies_to_cputime(__hz) (__force cputime_t)(__hz)
|
||||
|
||||
typedef u64 cputime64_t;
|
||||
typedef u64 __nocast cputime64_t;
|
||||
|
||||
#define cputime64_zero (0ULL)
|
||||
#define cputime64_add(__a, __b) ((__a) + (__b))
|
||||
#define cputime64_sub(__a, __b) ((__a) - (__b))
|
||||
#define cputime64_to_jiffies64(__ct) (__ct)
|
||||
#define jiffies64_to_cputime64(__jif) (__jif)
|
||||
#define cputime_to_cputime64(__ct) ((u64) __ct)
|
||||
#define cputime64_gt(__a, __b) ((__a) > (__b))
|
||||
#define cputime64_to_jiffies64(__ct) (__force u64)(__ct)
|
||||
#define jiffies64_to_cputime64(__jif) (__force cputime64_t)(__jif)
|
||||
|
||||
#define nsecs_to_cputime64(__ct) nsecs_to_jiffies64(__ct)
|
||||
#define nsecs_to_cputime64(__ct) \
|
||||
jiffies64_to_cputime64(nsecs_to_jiffies64(__ct))
|
||||
|
||||
|
||||
/*
|
||||
* Convert cputime to microseconds and back.
|
||||
*/
|
||||
#define cputime_to_usecs(__ct) jiffies_to_usecs(__ct)
|
||||
#define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs)
|
||||
#define cputime_to_usecs(__ct) \
|
||||
jiffies_to_usecs(cputime_to_jiffies(__ct))
|
||||
#define usecs_to_cputime(__usec) \
|
||||
jiffies_to_cputime(usecs_to_jiffies(__usec))
|
||||
#define usecs_to_cputime64(__usec) \
|
||||
jiffies64_to_cputime64(nsecs_to_jiffies64((__usec) * 1000))
|
||||
|
||||
/*
|
||||
* Convert cputime to seconds and back.
|
||||
*/
|
||||
#define cputime_to_secs(jif) ((jif) / HZ)
|
||||
#define secs_to_cputime(sec) ((sec) * HZ)
|
||||
#define cputime_to_secs(jif) (cputime_to_jiffies(jif) / HZ)
|
||||
#define secs_to_cputime(sec) jiffies_to_cputime((sec) * HZ)
|
||||
|
||||
/*
|
||||
* Convert cputime to timespec and back.
|
||||
*/
|
||||
#define timespec_to_cputime(__val) timespec_to_jiffies(__val)
|
||||
#define cputime_to_timespec(__ct,__val) jiffies_to_timespec(__ct,__val)
|
||||
#define timespec_to_cputime(__val) \
|
||||
jiffies_to_cputime(timespec_to_jiffies(__val))
|
||||
#define cputime_to_timespec(__ct,__val) \
|
||||
jiffies_to_timespec(cputime_to_jiffies(__ct),__val)
|
||||
|
||||
/*
|
||||
* Convert cputime to timeval and back.
|
||||
*/
|
||||
#define timeval_to_cputime(__val) timeval_to_jiffies(__val)
|
||||
#define cputime_to_timeval(__ct,__val) jiffies_to_timeval(__ct,__val)
|
||||
#define timeval_to_cputime(__val) \
|
||||
jiffies_to_cputime(timeval_to_jiffies(__val))
|
||||
#define cputime_to_timeval(__ct,__val) \
|
||||
jiffies_to_timeval(cputime_to_jiffies(__ct),__val)
|
||||
|
||||
/*
|
||||
* Convert cputime to clock and back.
|
||||
*/
|
||||
#define cputime_to_clock_t(__ct) jiffies_to_clock_t(__ct)
|
||||
#define clock_t_to_cputime(__x) clock_t_to_jiffies(__x)
|
||||
#define cputime_to_clock_t(__ct) \
|
||||
jiffies_to_clock_t(cputime_to_jiffies(__ct))
|
||||
#define clock_t_to_cputime(__x) \
|
||||
jiffies_to_cputime(clock_t_to_jiffies(__x))
|
||||
|
||||
/*
|
||||
* Convert cputime64 to clock.
|
||||
*/
|
||||
#define cputime64_to_clock_t(__ct) jiffies_64_to_clock_t(__ct)
|
||||
#define cputime64_to_clock_t(__ct) \
|
||||
jiffies_64_to_clock_t(cputime64_to_jiffies64(__ct))
|
||||
|
||||
#endif
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
|
||||
@@ -128,13 +129,14 @@ struct gpio_chip {
|
||||
*/
|
||||
struct device_node *of_node;
|
||||
int of_gpio_n_cells;
|
||||
int (*of_xlate)(struct gpio_chip *gc, struct device_node *np,
|
||||
const void *gpio_spec, u32 *flags);
|
||||
int (*of_xlate)(struct gpio_chip *gc,
|
||||
const struct of_phandle_args *gpiospec, u32 *flags);
|
||||
#endif
|
||||
};
|
||||
|
||||
extern const char *gpiochip_is_requested(struct gpio_chip *chip,
|
||||
unsigned offset);
|
||||
extern struct gpio_chip *gpio_to_chip(unsigned gpio);
|
||||
extern int __must_check gpiochip_reserve(int start, int ngpio);
|
||||
|
||||
/* add/remove chips */
|
||||
@@ -175,6 +177,10 @@ extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *labe
|
||||
extern int gpio_request_array(const struct gpio *array, size_t num);
|
||||
extern void gpio_free_array(const struct gpio *array, size_t num);
|
||||
|
||||
/* bindings for managed devices that want to request gpios */
|
||||
int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
|
||||
void devm_gpio_free(struct device *dev, unsigned int gpio);
|
||||
|
||||
#ifdef CONFIG_GPIO_SYSFS
|
||||
|
||||
/*
|
||||
|
||||
@@ -19,6 +19,8 @@
|
||||
#include <asm-generic/iomap.h>
|
||||
#endif
|
||||
|
||||
#include <asm-generic/pci_iomap.h>
|
||||
|
||||
#ifndef mmiowb
|
||||
#define mmiowb() do {} while (0)
|
||||
#endif
|
||||
@@ -283,9 +285,7 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len)
|
||||
#define __io_virt(x) ((void __force *) (x))
|
||||
|
||||
#ifndef CONFIG_GENERIC_IOMAP
|
||||
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||||
struct pci_dev;
|
||||
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
|
||||
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
|
||||
{
|
||||
}
|
||||
@@ -327,7 +327,7 @@ static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
|
||||
#define ioremap_wc ioremap_nocache
|
||||
#endif
|
||||
|
||||
static inline void iounmap(void *addr)
|
||||
static inline void iounmap(void __iomem *addr)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
@@ -67,18 +67,15 @@ extern void ioport_unmap(void __iomem *);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||||
/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||||
struct pci_dev;
|
||||
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
|
||||
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
|
||||
#else
|
||||
struct pci_dev;
|
||||
static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
|
||||
{ }
|
||||
#endif
|
||||
|
||||
#include <asm-generic/pci_iomap.h>
|
||||
|
||||
#endif
|
||||
|
||||
@@ -71,10 +71,14 @@ extern unsigned long memory_end;
|
||||
#define PAGE_OFFSET (0)
|
||||
#endif
|
||||
|
||||
#ifndef ARCH_PFN_OFFSET
|
||||
#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
|
||||
#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
|
||||
#define __va(x) ((void *)((unsigned long) (x)))
|
||||
#define __pa(x) ((unsigned long) (x))
|
||||
|
||||
#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
|
||||
#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
|
||||
@@ -86,7 +90,7 @@ extern unsigned long memory_end;
|
||||
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
|
||||
#endif
|
||||
|
||||
#define pfn_valid(pfn) ((pfn) < max_mapnr)
|
||||
#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && ((pfn) - ARCH_PFN_OFFSET) < max_mapnr)
|
||||
|
||||
#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
|
||||
((void *)(kaddr) < (void *)memory_end))
|
||||
|
||||
@@ -1,12 +1,6 @@
|
||||
#ifndef __ASM_GENERIC_PARAM_H
|
||||
#define __ASM_GENERIC_PARAM_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* some user interfaces are */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* in "ticks" like times() */
|
||||
#endif
|
||||
|
||||
#ifndef HZ
|
||||
#define HZ 100
|
||||
#endif
|
||||
@@ -21,4 +15,11 @@
|
||||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# undef HZ
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* some user interfaces are */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* in "ticks" like times() */
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_GENERIC_PARAM_H */
|
||||
|
||||
25
include/asm-generic/pci_iomap.h
Normal file
25
include/asm-generic/pci_iomap.h
Normal file
@@ -0,0 +1,25 @@
|
||||
/* Generic I/O port emulation, based on MN10300 code
|
||||
*
|
||||
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
|
||||
* Written by David Howells (dhowells@redhat.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public Licence
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the Licence, or (at your option) any later version.
|
||||
*/
|
||||
#ifndef __ASM_GENERIC_PCI_IOMAP_H
|
||||
#define __ASM_GENERIC_PCI_IOMAP_H
|
||||
|
||||
struct pci_dev;
|
||||
#ifdef CONFIG_PCI
|
||||
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||||
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
|
||||
#else
|
||||
static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_GENERIC_IO_H */
|
||||
@@ -64,4 +64,7 @@
|
||||
#define SO_DOMAIN 39
|
||||
|
||||
#define SO_RXQ_OVFL 40
|
||||
|
||||
#define SO_WIFI_STATUS 41
|
||||
#define SCM_WIFI_STATUS SO_WIFI_STATUS
|
||||
#endif /* __ASM_GENERIC_SOCKET_H */
|
||||
|
||||
@@ -139,6 +139,20 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
|
||||
__tlb_remove_tlb_entry(tlb, ptep, address); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
|
||||
* This is a nop so far, because only x86 needs it.
|
||||
*/
|
||||
#ifndef __tlb_remove_pmd_tlb_entry
|
||||
#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
|
||||
#endif
|
||||
|
||||
#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
|
||||
do { \
|
||||
tlb->need_flush = 1; \
|
||||
__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
|
||||
} while (0)
|
||||
|
||||
#define pte_free_tlb(tlb, ptep, address) \
|
||||
do { \
|
||||
tlb->need_flush = 1; \
|
||||
|
||||
@@ -6,10 +6,4 @@
|
||||
*/
|
||||
#include <asm-generic/int-ll64.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
typedef unsigned short umode_t;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_GENERIC_TYPES_H */
|
||||
|
||||
@@ -289,9 +289,14 @@ strncpy_from_user(char *dst, const char __user *src, long count)
|
||||
* Return 0 on exception, a value greater than N if too long
|
||||
*/
|
||||
#ifndef __strnlen_user
|
||||
#define __strnlen_user strnlen
|
||||
#define __strnlen_user(s, n) (strnlen((s), (n)) + 1)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unlike strnlen, strnlen_user includes the nul terminator in
|
||||
* its returned count. Callers should check for a returned value
|
||||
* greater than N as an indication the string is too long.
|
||||
*/
|
||||
static inline long strnlen_user(const char __user *src, long n)
|
||||
{
|
||||
if (!access_ok(VERIFY_READ, src, 1))
|
||||
|
||||
@@ -685,9 +685,15 @@ __SYSCALL(__NR_syncfs, sys_syncfs)
|
||||
__SYSCALL(__NR_setns, sys_setns)
|
||||
#define __NR_sendmmsg 269
|
||||
__SC_COMP(__NR_sendmmsg, sys_sendmmsg, compat_sys_sendmmsg)
|
||||
#define __NR_process_vm_readv 270
|
||||
__SC_COMP(__NR_process_vm_readv, sys_process_vm_readv, \
|
||||
compat_sys_process_vm_readv)
|
||||
#define __NR_process_vm_writev 271
|
||||
__SC_COMP(__NR_process_vm_writev, sys_process_vm_writev, \
|
||||
compat_sys_process_vm_writev)
|
||||
|
||||
#undef __NR_syscalls
|
||||
#define __NR_syscalls 270
|
||||
#define __NR_syscalls 272
|
||||
|
||||
/*
|
||||
* All syscalls below here should go away really,
|
||||
|
||||
@@ -134,6 +134,7 @@ struct crypto_template *crypto_lookup_template(const char *name);
|
||||
|
||||
int crypto_register_instance(struct crypto_template *tmpl,
|
||||
struct crypto_instance *inst);
|
||||
int crypto_unregister_instance(struct crypto_alg *alg);
|
||||
|
||||
int crypto_init_spawn(struct crypto_spawn *spawn, struct crypto_alg *alg,
|
||||
struct crypto_instance *inst, u32 mask);
|
||||
|
||||
43
include/crypto/lrw.h
Normal file
43
include/crypto/lrw.h
Normal file
@@ -0,0 +1,43 @@
|
||||
#ifndef _CRYPTO_LRW_H
|
||||
#define _CRYPTO_LRW_H
|
||||
|
||||
#include <crypto/b128ops.h>
|
||||
|
||||
struct scatterlist;
|
||||
struct gf128mul_64k;
|
||||
struct blkcipher_desc;
|
||||
|
||||
#define LRW_BLOCK_SIZE 16
|
||||
|
||||
struct lrw_table_ctx {
|
||||
/* optimizes multiplying a random (non incrementing, as at the
|
||||
* start of a new sector) value with key2, we could also have
|
||||
* used 4k optimization tables or no optimization at all. In the
|
||||
* latter case we would have to store key2 here */
|
||||
struct gf128mul_64k *table;
|
||||
/* stores:
|
||||
* key2*{ 0,0,...0,0,0,0,1 }, key2*{ 0,0,...0,0,0,1,1 },
|
||||
* key2*{ 0,0,...0,0,1,1,1 }, key2*{ 0,0,...0,1,1,1,1 }
|
||||
* key2*{ 0,0,...1,1,1,1,1 }, etc
|
||||
* needed for optimized multiplication of incrementing values
|
||||
* with key2 */
|
||||
be128 mulinc[128];
|
||||
};
|
||||
|
||||
int lrw_init_table(struct lrw_table_ctx *ctx, const u8 *tweak);
|
||||
void lrw_free_table(struct lrw_table_ctx *ctx);
|
||||
|
||||
struct lrw_crypt_req {
|
||||
be128 *tbuf;
|
||||
unsigned int tbuflen;
|
||||
|
||||
struct lrw_table_ctx *table_ctx;
|
||||
void *crypt_ctx;
|
||||
void (*crypt_fn)(void *ctx, u8 *blks, unsigned int nbytes);
|
||||
};
|
||||
|
||||
int lrw_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
||||
struct scatterlist *src, unsigned int nbytes,
|
||||
struct lrw_crypt_req *req);
|
||||
|
||||
#endif /* _CRYPTO_LRW_H */
|
||||
27
include/crypto/serpent.h
Normal file
27
include/crypto/serpent.h
Normal file
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Common values for serpent algorithms
|
||||
*/
|
||||
|
||||
#ifndef _CRYPTO_SERPENT_H
|
||||
#define _CRYPTO_SERPENT_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/crypto.h>
|
||||
|
||||
#define SERPENT_MIN_KEY_SIZE 0
|
||||
#define SERPENT_MAX_KEY_SIZE 32
|
||||
#define SERPENT_EXPKEY_WORDS 132
|
||||
#define SERPENT_BLOCK_SIZE 16
|
||||
|
||||
struct serpent_ctx {
|
||||
u32 expkey[SERPENT_EXPKEY_WORDS];
|
||||
};
|
||||
|
||||
int __serpent_setkey(struct serpent_ctx *ctx, const u8 *key,
|
||||
unsigned int keylen);
|
||||
int serpent_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen);
|
||||
|
||||
void __serpent_encrypt(struct serpent_ctx *ctx, u8 *dst, const u8 *src);
|
||||
void __serpent_decrypt(struct serpent_ctx *ctx, u8 *dst, const u8 *src);
|
||||
|
||||
#endif
|
||||
@@ -17,6 +17,8 @@ struct twofish_ctx {
|
||||
u32 s[4][256], w[8], k[32];
|
||||
};
|
||||
|
||||
int __twofish_setkey(struct twofish_ctx *ctx, const u8 *key,
|
||||
unsigned int key_len, u32 *flags);
|
||||
int twofish_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int key_len);
|
||||
|
||||
#endif
|
||||
|
||||
27
include/crypto/xts.h
Normal file
27
include/crypto/xts.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef _CRYPTO_XTS_H
|
||||
#define _CRYPTO_XTS_H
|
||||
|
||||
#include <crypto/b128ops.h>
|
||||
|
||||
struct scatterlist;
|
||||
struct blkcipher_desc;
|
||||
|
||||
#define XTS_BLOCK_SIZE 16
|
||||
|
||||
struct xts_crypt_req {
|
||||
be128 *tbuf;
|
||||
unsigned int tbuflen;
|
||||
|
||||
void *tweak_ctx;
|
||||
void (*tweak_fn)(void *ctx, u8* dst, const u8* src);
|
||||
void *crypt_ctx;
|
||||
void (*crypt_fn)(void *ctx, u8 *blks, unsigned int nbytes);
|
||||
};
|
||||
|
||||
#define XTS_TWEAK_CAST(x) ((void (*)(void *, u8*, const u8*))(x))
|
||||
|
||||
int xts_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
||||
struct scatterlist *src, unsigned int nbytes,
|
||||
struct xts_crypt_req *req);
|
||||
|
||||
#endif /* _CRYPTO_XTS_H */
|
||||
@@ -1,4 +1,5 @@
|
||||
header-y += drm.h
|
||||
header-y += drm_fourcc.h
|
||||
header-y += drm_mode.h
|
||||
header-y += drm_sarea.h
|
||||
header-y += i810_drm.h
|
||||
|
||||
@@ -714,6 +714,10 @@ struct drm_get_cap {
|
||||
#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
|
||||
#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
|
||||
#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
|
||||
#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
|
||||
#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
|
||||
#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
|
||||
#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
|
||||
|
||||
/**
|
||||
* Device specific ioctls should only be in their respective headers
|
||||
|
||||
@@ -820,7 +820,7 @@ struct drm_driver {
|
||||
* Specifically, the timestamp in @vblank_time should correspond as
|
||||
* closely as possible to the time when the first video scanline of
|
||||
* the video frame after the end of VBLANK will start scanning out,
|
||||
* the time immmediately after end of the VBLANK interval. If the
|
||||
* the time immediately after end of the VBLANK interval. If the
|
||||
* @crtc is currently inside VBLANK, this will be a time in the future.
|
||||
* If the @crtc is currently scanning out a frame, this will be the
|
||||
* past start time of the current scanout. This is meant to adhere
|
||||
@@ -918,7 +918,7 @@ struct drm_driver {
|
||||
int dev_priv_size;
|
||||
struct drm_ioctl_desc *ioctls;
|
||||
int num_ioctls;
|
||||
struct file_operations fops;
|
||||
const struct file_operations *fops;
|
||||
union {
|
||||
struct pci_driver *pci;
|
||||
struct platform_device *platform_device;
|
||||
@@ -1696,5 +1696,13 @@ extern void drm_platform_exit(struct drm_driver *driver, struct platform_device
|
||||
extern int drm_get_platform_dev(struct platform_device *pdev,
|
||||
struct drm_driver *driver);
|
||||
|
||||
/* returns true if currently okay to sleep */
|
||||
static __inline__ bool drm_can_sleep(void)
|
||||
{
|
||||
if (in_atomic() || in_dbg_master() || irqs_disabled())
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif
|
||||
|
||||
@@ -29,9 +29,10 @@
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/idr.h>
|
||||
|
||||
#include <linux/fb.h>
|
||||
|
||||
#include <drm/drm_fourcc.h>
|
||||
|
||||
struct drm_device;
|
||||
struct drm_mode_set;
|
||||
struct drm_framebuffer;
|
||||
@@ -44,6 +45,7 @@ struct drm_framebuffer;
|
||||
#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
|
||||
#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
|
||||
#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
|
||||
#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
|
||||
|
||||
struct drm_mode_object {
|
||||
uint32_t id;
|
||||
@@ -118,7 +120,6 @@ struct drm_display_mode {
|
||||
|
||||
char name[DRM_DISPLAY_MODE_LEN];
|
||||
|
||||
int connector_count;
|
||||
enum drm_mode_status status;
|
||||
int type;
|
||||
|
||||
@@ -238,13 +239,15 @@ struct drm_framebuffer {
|
||||
struct list_head head;
|
||||
struct drm_mode_object base;
|
||||
const struct drm_framebuffer_funcs *funcs;
|
||||
unsigned int pitch;
|
||||
unsigned int pitches[4];
|
||||
unsigned int offsets[4];
|
||||
unsigned int width;
|
||||
unsigned int height;
|
||||
/* depth can be 15 or 16 */
|
||||
unsigned int depth;
|
||||
int bits_per_pixel;
|
||||
int flags;
|
||||
uint32_t pixel_format; /* fourcc format */
|
||||
struct list_head filp_head;
|
||||
/* if you are using the helper */
|
||||
void *helper_private;
|
||||
@@ -278,6 +281,7 @@ struct drm_crtc;
|
||||
struct drm_connector;
|
||||
struct drm_encoder;
|
||||
struct drm_pending_vblank_event;
|
||||
struct drm_plane;
|
||||
|
||||
/**
|
||||
* drm_crtc_funcs - control CRTCs for a given device
|
||||
@@ -341,10 +345,21 @@ struct drm_crtc_funcs {
|
||||
|
||||
/**
|
||||
* drm_crtc - central CRTC control structure
|
||||
* @dev: parent DRM device
|
||||
* @head: list management
|
||||
* @base: base KMS object for ID tracking etc.
|
||||
* @enabled: is this CRTC enabled?
|
||||
* @mode: current mode timings
|
||||
* @hwmode: mode timings as programmed to hw regs
|
||||
* @x: x position on screen
|
||||
* @y: y position on screen
|
||||
* @funcs: CRTC control functions
|
||||
* @gamma_size: size of gamma ramp
|
||||
* @gamma_store: gamma ramp values
|
||||
* @framedur_ns: precise frame timing
|
||||
* @framedur_ns: precise line timing
|
||||
* @pixeldur_ns: precise pixel timing
|
||||
* @helper_private: mid-layer private data
|
||||
*
|
||||
* Each CRTC may have one or more connectors associated with it. This structure
|
||||
* allows the CRTC to be controlled.
|
||||
@@ -423,6 +438,13 @@ struct drm_connector_funcs {
|
||||
void (*force)(struct drm_connector *connector);
|
||||
};
|
||||
|
||||
/**
|
||||
* drm_encoder_funcs - encoder controls
|
||||
* @reset: reset state (e.g. at init or resume time)
|
||||
* @destroy: cleanup and free associated data
|
||||
*
|
||||
* Encoders sit between CRTCs and connectors.
|
||||
*/
|
||||
struct drm_encoder_funcs {
|
||||
void (*reset)(struct drm_encoder *encoder);
|
||||
void (*destroy)(struct drm_encoder *encoder);
|
||||
@@ -431,10 +453,22 @@ struct drm_encoder_funcs {
|
||||
#define DRM_CONNECTOR_MAX_UMODES 16
|
||||
#define DRM_CONNECTOR_MAX_PROPERTY 16
|
||||
#define DRM_CONNECTOR_LEN 32
|
||||
#define DRM_CONNECTOR_MAX_ENCODER 2
|
||||
#define DRM_CONNECTOR_MAX_ENCODER 3
|
||||
|
||||
/**
|
||||
* drm_encoder - central DRM encoder structure
|
||||
* @dev: parent DRM device
|
||||
* @head: list management
|
||||
* @base: base KMS object
|
||||
* @encoder_type: one of the %DRM_MODE_ENCODER_<foo> types in drm_mode.h
|
||||
* @possible_crtcs: bitmask of potential CRTC bindings
|
||||
* @possible_clones: bitmask of potential sibling encoders for cloning
|
||||
* @crtc: currently bound CRTC
|
||||
* @funcs: control functions
|
||||
* @helper_private: mid-layer private data
|
||||
*
|
||||
* CRTCs drive pixels to encoders, which convert them into signals
|
||||
* appropriate for a given connector or set of connectors.
|
||||
*/
|
||||
struct drm_encoder {
|
||||
struct drm_device *dev;
|
||||
@@ -470,14 +504,37 @@ enum drm_connector_force {
|
||||
|
||||
/**
|
||||
* drm_connector - central DRM connector control structure
|
||||
* @crtc: CRTC this connector is currently connected to, NULL if none
|
||||
* @dev: parent DRM device
|
||||
* @kdev: kernel device for sysfs attributes
|
||||
* @attr: sysfs attributes
|
||||
* @head: list management
|
||||
* @base: base KMS object
|
||||
* @connector_type: one of the %DRM_MODE_CONNECTOR_<foo> types from drm_mode.h
|
||||
* @connector_type_id: index into connector type enum
|
||||
* @interlace_allowed: can this connector handle interlaced modes?
|
||||
* @doublescan_allowed: can this connector handle doublescan?
|
||||
* @available_modes: modes available on this connector (from get_modes() + user)
|
||||
* @initial_x: initial x position for this connector
|
||||
* @initial_y: initial y position for this connector
|
||||
* @status: connector connected?
|
||||
* @modes: modes available on this connector (from fill_modes() + user)
|
||||
* @status: one of the drm_connector_status enums (connected, not, or unknown)
|
||||
* @probed_modes: list of modes derived directly from the display
|
||||
* @display_info: information about attached display (e.g. from EDID)
|
||||
* @funcs: connector control functions
|
||||
* @user_modes: user added mode list
|
||||
* @edid_blob_ptr: DRM property containing EDID if present
|
||||
* @property_ids: property tracking for this connector
|
||||
* @property_values: value pointers or data for properties
|
||||
* @polled: a %DRM_CONNECTOR_POLL_<foo> value for core driven polling
|
||||
* @dpms: current dpms state
|
||||
* @helper_private: mid-layer private data
|
||||
* @force: a %DRM_FORCE_<foo> state for forced mode sets
|
||||
* @encoder_ids: valid encoders for this connector
|
||||
* @encoder: encoder driving this connector, if any
|
||||
* @eld: EDID-like data, if present
|
||||
* @dvi_dual: dual link DVI, if found
|
||||
* @max_tmds_clock: max clock rate, if found
|
||||
* @latency_present: AV delay info from ELD, if found
|
||||
* @video_latency: video latency info from ELD, if found
|
||||
* @audio_latency: audio latency info from ELD, if found
|
||||
* @null_edid_counter: track sinks that give us all zeros for the EDID
|
||||
*
|
||||
* Each connector may be connected to one or more CRTCs, or may be clonable by
|
||||
* another connector if they can share a CRTC. Each connector also has a specific
|
||||
@@ -498,7 +555,6 @@ struct drm_connector {
|
||||
bool doublescan_allowed;
|
||||
struct list_head modes; /* list of modes on this connector */
|
||||
|
||||
int initial_x, initial_y;
|
||||
enum drm_connector_status status;
|
||||
|
||||
/* these are modes added by probing with DDC or the BIOS */
|
||||
@@ -522,7 +578,6 @@ struct drm_connector {
|
||||
/* forced on connector */
|
||||
enum drm_connector_force force;
|
||||
uint32_t encoder_ids[DRM_CONNECTOR_MAX_ENCODER];
|
||||
uint32_t force_encoder_id;
|
||||
struct drm_encoder *encoder; /* currently active encoder */
|
||||
|
||||
/* EDID bits */
|
||||
@@ -536,7 +591,71 @@ struct drm_connector {
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_mode_set
|
||||
* drm_plane_funcs - driver plane control functions
|
||||
* @update_plane: update the plane configuration
|
||||
* @disable_plane: shut down the plane
|
||||
* @destroy: clean up plane resources
|
||||
*/
|
||||
struct drm_plane_funcs {
|
||||
int (*update_plane)(struct drm_plane *plane,
|
||||
struct drm_crtc *crtc, struct drm_framebuffer *fb,
|
||||
int crtc_x, int crtc_y,
|
||||
unsigned int crtc_w, unsigned int crtc_h,
|
||||
uint32_t src_x, uint32_t src_y,
|
||||
uint32_t src_w, uint32_t src_h);
|
||||
int (*disable_plane)(struct drm_plane *plane);
|
||||
void (*destroy)(struct drm_plane *plane);
|
||||
};
|
||||
|
||||
/**
|
||||
* drm_plane - central DRM plane control structure
|
||||
* @dev: DRM device this plane belongs to
|
||||
* @head: for list management
|
||||
* @base: base mode object
|
||||
* @possible_crtcs: pipes this plane can be bound to
|
||||
* @format_types: array of formats supported by this plane
|
||||
* @format_count: number of formats supported
|
||||
* @crtc: currently bound CRTC
|
||||
* @fb: currently bound fb
|
||||
* @gamma_size: size of gamma table
|
||||
* @gamma_store: gamma correction table
|
||||
* @enabled: enabled flag
|
||||
* @funcs: helper functions
|
||||
* @helper_private: storage for drver layer
|
||||
*/
|
||||
struct drm_plane {
|
||||
struct drm_device *dev;
|
||||
struct list_head head;
|
||||
|
||||
struct drm_mode_object base;
|
||||
|
||||
uint32_t possible_crtcs;
|
||||
uint32_t *format_types;
|
||||
uint32_t format_count;
|
||||
|
||||
struct drm_crtc *crtc;
|
||||
struct drm_framebuffer *fb;
|
||||
|
||||
/* CRTC gamma size for reporting to userspace */
|
||||
uint32_t gamma_size;
|
||||
uint16_t *gamma_store;
|
||||
|
||||
bool enabled;
|
||||
|
||||
const struct drm_plane_funcs *funcs;
|
||||
void *helper_private;
|
||||
};
|
||||
|
||||
/**
|
||||
* drm_mode_set - new values for a CRTC config change
|
||||
* @head: list management
|
||||
* @fb: framebuffer to use for new config
|
||||
* @crtc: CRTC whose configuration we're about to change
|
||||
* @mode: mode timings to use
|
||||
* @x: position of this CRTC relative to @fb
|
||||
* @y: position of this CRTC relative to @fb
|
||||
* @connectors: array of connectors to drive with this CRTC if possible
|
||||
* @num_connectors: size of @connectors array
|
||||
*
|
||||
* Represents a single crtc the connectors that it drives with what mode
|
||||
* and from which framebuffer it scans out from.
|
||||
@@ -558,13 +677,33 @@ struct drm_mode_set {
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_mode_config_funcs - configure CRTCs for a given screen layout
|
||||
* struct drm_mode_config_funcs - basic driver provided mode setting functions
|
||||
* @fb_create: create a new framebuffer object
|
||||
* @output_poll_changed: function to handle output configuration changes
|
||||
*
|
||||
* Some global (i.e. not per-CRTC, connector, etc) mode setting functions that
|
||||
* involve drivers.
|
||||
*/
|
||||
struct drm_mode_config_funcs {
|
||||
struct drm_framebuffer *(*fb_create)(struct drm_device *dev, struct drm_file *file_priv, struct drm_mode_fb_cmd *mode_cmd);
|
||||
struct drm_framebuffer *(*fb_create)(struct drm_device *dev,
|
||||
struct drm_file *file_priv,
|
||||
struct drm_mode_fb_cmd2 *mode_cmd);
|
||||
void (*output_poll_changed)(struct drm_device *dev);
|
||||
};
|
||||
|
||||
/**
|
||||
* drm_mode_group - group of mode setting resources for potential sub-grouping
|
||||
* @num_crtcs: CRTC count
|
||||
* @num_encoders: encoder count
|
||||
* @num_connectors: connector count
|
||||
* @id_list: list of KMS object IDs in this group
|
||||
*
|
||||
* Currently this simply tracks the global mode setting state. But in the
|
||||
* future it could allow groups of objects to be set aside into independent
|
||||
* control groups for use by different user level processes (e.g. two X servers
|
||||
* running simultaneously on different heads, each with their own mode
|
||||
* configuration and freedom of mode setting).
|
||||
*/
|
||||
struct drm_mode_group {
|
||||
uint32_t num_crtcs;
|
||||
uint32_t num_encoders;
|
||||
@@ -576,7 +715,30 @@ struct drm_mode_group {
|
||||
|
||||
/**
|
||||
* drm_mode_config - Mode configuration control structure
|
||||
* @mutex: mutex protecting KMS related lists and structures
|
||||
* @idr_mutex: mutex for KMS ID allocation and management
|
||||
* @crtc_idr: main KMS ID tracking object
|
||||
* @num_fb: number of fbs available
|
||||
* @fb_list: list of framebuffers available
|
||||
* @num_connector: number of connectors on this device
|
||||
* @connector_list: list of connector objects
|
||||
* @num_encoder: number of encoders on this device
|
||||
* @encoder_list: list of encoder objects
|
||||
* @num_crtc: number of CRTCs on this device
|
||||
* @crtc_list: list of CRTC objects
|
||||
* @min_width: minimum pixel width on this device
|
||||
* @min_height: minimum pixel height on this device
|
||||
* @max_width: maximum pixel width on this device
|
||||
* @max_height: maximum pixel height on this device
|
||||
* @funcs: core driver provided mode setting functions
|
||||
* @fb_base: base address of the framebuffer
|
||||
* @poll_enabled: track polling status for this device
|
||||
* @output_poll_work: delayed work for polling in process context
|
||||
* @*_property: core property tracking
|
||||
*
|
||||
* Core mode resource tracking structure. All CRTC, encoders, and connectors
|
||||
* enumerated by the driver are added here, as are global properties. Some
|
||||
* global restrictions are also here, e.g. dimension restrictions.
|
||||
*/
|
||||
struct drm_mode_config {
|
||||
struct mutex mutex; /* protects configuration (mode lists etc.) */
|
||||
@@ -589,6 +751,8 @@ struct drm_mode_config {
|
||||
struct list_head connector_list;
|
||||
int num_encoder;
|
||||
struct list_head encoder_list;
|
||||
int num_plane;
|
||||
struct list_head plane_list;
|
||||
|
||||
int num_crtc;
|
||||
struct list_head crtc_list;
|
||||
@@ -641,6 +805,7 @@ struct drm_mode_config {
|
||||
#define obj_to_fb(x) container_of(x, struct drm_framebuffer, base)
|
||||
#define obj_to_property(x) container_of(x, struct drm_property, base)
|
||||
#define obj_to_blob(x) container_of(x, struct drm_property_blob, base)
|
||||
#define obj_to_plane(x) container_of(x, struct drm_plane, base)
|
||||
|
||||
|
||||
extern void drm_crtc_init(struct drm_device *dev,
|
||||
@@ -660,6 +825,14 @@ extern void drm_encoder_init(struct drm_device *dev,
|
||||
const struct drm_encoder_funcs *funcs,
|
||||
int encoder_type);
|
||||
|
||||
extern int drm_plane_init(struct drm_device *dev,
|
||||
struct drm_plane *plane,
|
||||
unsigned long possible_crtcs,
|
||||
const struct drm_plane_funcs *funcs,
|
||||
const uint32_t *formats, uint32_t format_count,
|
||||
bool priv);
|
||||
extern void drm_plane_cleanup(struct drm_plane *plane);
|
||||
|
||||
extern void drm_encoder_cleanup(struct drm_encoder *encoder);
|
||||
|
||||
extern char *drm_get_connector_name(struct drm_connector *connector);
|
||||
@@ -753,17 +926,25 @@ extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
|
||||
/* IOCTLs */
|
||||
extern int drm_mode_getresources(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
|
||||
extern int drm_mode_getplane_res(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
extern int drm_mode_getcrtc(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_getconnector(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_setcrtc(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_getplane(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_setplane(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_cursor_ioctl(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_addfb(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_addfb2(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth);
|
||||
extern int drm_mode_rmfb(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_getfb(struct drm_device *dev,
|
||||
@@ -824,4 +1005,7 @@ extern int drm_mode_mmap_dumb_ioctl(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
extern int drm_mode_destroy_dumb_ioctl(struct drm_device *dev,
|
||||
void *data, struct drm_file *file_priv);
|
||||
|
||||
extern void drm_fb_get_bpp_depth(uint32_t format, unsigned int *depth,
|
||||
int *bpp);
|
||||
#endif /* __DRM_CRTC_H__ */
|
||||
|
||||
@@ -117,7 +117,7 @@ extern bool drm_helper_encoder_in_use(struct drm_encoder *encoder);
|
||||
extern void drm_helper_connector_dpms(struct drm_connector *connector, int mode);
|
||||
|
||||
extern int drm_helper_mode_fill_fb_struct(struct drm_framebuffer *fb,
|
||||
struct drm_mode_fb_cmd *mode_cmd);
|
||||
struct drm_mode_fb_cmd2 *mode_cmd);
|
||||
|
||||
static inline void drm_crtc_helper_add(struct drm_crtc *crtc,
|
||||
const struct drm_crtc_helper_funcs *funcs)
|
||||
@@ -144,4 +144,7 @@ extern void drm_helper_hpd_irq_event(struct drm_device *dev);
|
||||
|
||||
extern void drm_kms_helper_poll_disable(struct drm_device *dev);
|
||||
extern void drm_kms_helper_poll_enable(struct drm_device *dev);
|
||||
|
||||
extern int drm_format_num_planes(uint32_t format);
|
||||
|
||||
#endif
|
||||
|
||||
137
include/drm/drm_fourcc.h
Normal file
137
include/drm/drm_fourcc.h
Normal file
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright 2011 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef DRM_FOURCC_H
|
||||
#define DRM_FOURCC_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
|
||||
((__u32)(c) << 16) | ((__u32)(d) << 24))
|
||||
|
||||
#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */
|
||||
|
||||
/* color index */
|
||||
#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
|
||||
|
||||
/* 8 bpp RGB */
|
||||
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
|
||||
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
|
||||
|
||||
/* 16 bpp RGB */
|
||||
#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */
|
||||
|
||||
#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */
|
||||
#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */
|
||||
#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */
|
||||
|
||||
#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
|
||||
#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */
|
||||
|
||||
/* 24 bpp RGB */
|
||||
#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
|
||||
#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
|
||||
|
||||
/* 32 bpp RGB */
|
||||
#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
|
||||
#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
|
||||
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
|
||||
|
||||
/* packed YCbCr */
|
||||
#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
|
||||
|
||||
/*
|
||||
* 2 plane YCbCr
|
||||
* index 0 = Y plane, [7:0] Y
|
||||
* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
|
||||
* or
|
||||
* index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
|
||||
*/
|
||||
#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */
|
||||
#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
|
||||
|
||||
/* 2 non contiguous plane YCbCr */
|
||||
#define DRM_FORMAT_NV12M fourcc_code('N', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV12MT fourcc_code('T', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane 64x32 macroblocks */
|
||||
|
||||
/*
|
||||
* 3 plane YCbCr
|
||||
* index 0: Y plane, [7:0] Y
|
||||
* index 1: Cb plane, [7:0] Cb
|
||||
* index 2: Cr plane, [7:0] Cr
|
||||
* or
|
||||
* index 1: Cr plane, [7:0] Cr
|
||||
* index 2: Cb plane, [7:0] Cb
|
||||
*/
|
||||
#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
|
||||
|
||||
/* 3 non contiguous plane YCbCr */
|
||||
#define DRM_FORMAT_YUV420M fourcc_code('Y', 'M', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */
|
||||
|
||||
#endif /* DRM_FOURCC_H */
|
||||
@@ -120,11 +120,48 @@ struct drm_mode_crtc {
|
||||
struct drm_mode_modeinfo mode;
|
||||
};
|
||||
|
||||
#define DRM_MODE_ENCODER_NONE 0
|
||||
#define DRM_MODE_ENCODER_DAC 1
|
||||
#define DRM_MODE_ENCODER_TMDS 2
|
||||
#define DRM_MODE_ENCODER_LVDS 3
|
||||
#define DRM_MODE_ENCODER_TVDAC 4
|
||||
#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
|
||||
#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
|
||||
|
||||
/* Planes blend with or override other bits on the CRTC */
|
||||
struct drm_mode_set_plane {
|
||||
__u32 plane_id;
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id; /* fb object contains surface format type */
|
||||
__u32 flags; /* see above flags */
|
||||
|
||||
/* Signed dest location allows it to be partially off screen */
|
||||
__s32 crtc_x, crtc_y;
|
||||
__u32 crtc_w, crtc_h;
|
||||
|
||||
/* Source values are 16.16 fixed point */
|
||||
__u32 src_x, src_y;
|
||||
__u32 src_h, src_w;
|
||||
};
|
||||
|
||||
struct drm_mode_get_plane {
|
||||
__u32 plane_id;
|
||||
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id;
|
||||
|
||||
__u32 possible_crtcs;
|
||||
__u32 gamma_size;
|
||||
|
||||
__u32 count_format_types;
|
||||
__u64 format_type_ptr;
|
||||
};
|
||||
|
||||
struct drm_mode_get_plane_res {
|
||||
__u64 plane_id_ptr;
|
||||
__u32 count_planes;
|
||||
};
|
||||
|
||||
#define DRM_MODE_ENCODER_NONE 0
|
||||
#define DRM_MODE_ENCODER_DAC 1
|
||||
#define DRM_MODE_ENCODER_TMDS 2
|
||||
#define DRM_MODE_ENCODER_LVDS 3
|
||||
#define DRM_MODE_ENCODER_TVDAC 4
|
||||
#define DRM_MODE_ENCODER_VIRTUAL 5
|
||||
|
||||
struct drm_mode_get_encoder {
|
||||
@@ -231,6 +268,33 @@ struct drm_mode_fb_cmd {
|
||||
__u32 handle;
|
||||
};
|
||||
|
||||
#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
|
||||
|
||||
struct drm_mode_fb_cmd2 {
|
||||
__u32 fb_id;
|
||||
__u32 width, height;
|
||||
__u32 pixel_format; /* fourcc code from drm_fourcc.h */
|
||||
__u32 flags; /* see above flags */
|
||||
|
||||
/*
|
||||
* In case of planar formats, this ioctl allows up to 4
|
||||
* buffer objects with offets and pitches per plane.
|
||||
* The pitch and offset order is dictated by the fourcc,
|
||||
* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
|
||||
*
|
||||
* YUV 4:2:0 image with a plane of 8 bit Y samples
|
||||
* followed by an interleaved U/V plane containing
|
||||
* 8 bit 2x2 subsampled colour difference samples.
|
||||
*
|
||||
* So it would consist of Y as offset[0] and UV as
|
||||
* offeset[1]. Note that offset[0] will generally
|
||||
* be 0.
|
||||
*/
|
||||
__u32 handles[4];
|
||||
__u32 pitches[4]; /* pitch for each plane */
|
||||
__u32 offsets[4]; /* offset of each plane */
|
||||
};
|
||||
|
||||
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
|
||||
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
|
||||
#define DRM_MODE_FB_DIRTY_FLAGS 0x03
|
||||
|
||||
@@ -182,8 +182,11 @@
|
||||
{0x1002, 0x6748, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6749, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6758, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6759, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x675B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x675D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x675F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6761, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
@@ -195,8 +198,18 @@
|
||||
{0x1002, 0x6767, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6768, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6770, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6778, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6779, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x677B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6840, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6841, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6842, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6843, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6849, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
|
||||
@@ -238,6 +251,7 @@
|
||||
{0x1002, 0x68f2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x68f8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x68f9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x68fa, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x68fe, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x7100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x7101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
@@ -480,6 +494,8 @@
|
||||
{0x1002, 0x9647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
|
||||
{0x1002, 0x9648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
|
||||
{0x1002, 0x964a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x964b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x964c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x964e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
|
||||
{0x1002, 0x964f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\
|
||||
{0x1002, 0x9710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
@@ -494,6 +510,8 @@
|
||||
{0x1002, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9807, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0, 0, 0}
|
||||
|
||||
#define r128_PCI_IDS \
|
||||
|
||||
@@ -1,176 +0,0 @@
|
||||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the
|
||||
* "Software"), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sub license, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the
|
||||
* next paragraph) shall be included in all copies or substantial portions
|
||||
* of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*
|
||||
**************************************************************************/
|
||||
/*
|
||||
* Simple memory MANager interface that keeps track on allocate regions on a
|
||||
* per "owner" basis. All regions associated with an "owner" can be released
|
||||
* with a simple call. Typically if the "owner" exists. The owner is any
|
||||
* "unsigned long" identifier. Can typically be a pointer to a file private
|
||||
* struct or a context identifier.
|
||||
*
|
||||
* Authors:
|
||||
* Thomas Hellström <thomas-at-tungstengraphics-dot-com>
|
||||
*/
|
||||
|
||||
#ifndef DRM_SMAN_H
|
||||
#define DRM_SMAN_H
|
||||
|
||||
#include "drmP.h"
|
||||
#include "drm_hashtab.h"
|
||||
|
||||
/*
|
||||
* A class that is an abstration of a simple memory allocator.
|
||||
* The sman implementation provides a default such allocator
|
||||
* using the drm_mm.c implementation. But the user can replace it.
|
||||
* See the SiS implementation, which may use the SiS FB kernel module
|
||||
* for memory management.
|
||||
*/
|
||||
|
||||
struct drm_sman_mm {
|
||||
/* private info. If allocated, needs to be destroyed by the destroy
|
||||
function */
|
||||
void *private;
|
||||
|
||||
/* Allocate a memory block with given size and alignment.
|
||||
Return an opaque reference to the memory block */
|
||||
|
||||
void *(*allocate) (void *private, unsigned long size,
|
||||
unsigned alignment);
|
||||
|
||||
/* Free a memory block. "ref" is the opaque reference that we got from
|
||||
the "alloc" function */
|
||||
|
||||
void (*free) (void *private, void *ref);
|
||||
|
||||
/* Free all resources associated with this allocator */
|
||||
|
||||
void (*destroy) (void *private);
|
||||
|
||||
/* Return a memory offset from the opaque reference returned from the
|
||||
"alloc" function */
|
||||
|
||||
unsigned long (*offset) (void *private, void *ref);
|
||||
};
|
||||
|
||||
struct drm_memblock_item {
|
||||
struct list_head owner_list;
|
||||
struct drm_hash_item user_hash;
|
||||
void *mm_info;
|
||||
struct drm_sman_mm *mm;
|
||||
struct drm_sman *sman;
|
||||
};
|
||||
|
||||
struct drm_sman {
|
||||
struct drm_sman_mm *mm;
|
||||
int num_managers;
|
||||
struct drm_open_hash owner_hash_tab;
|
||||
struct drm_open_hash user_hash_tab;
|
||||
struct list_head owner_items;
|
||||
};
|
||||
|
||||
/*
|
||||
* Take down a memory manager. This function should only be called after a
|
||||
* successful init and after a call to drm_sman_cleanup.
|
||||
*/
|
||||
|
||||
extern void drm_sman_takedown(struct drm_sman * sman);
|
||||
|
||||
/*
|
||||
* Allocate structures for a manager.
|
||||
* num_managers are the number of memory pools to manage. (VRAM, AGP, ....)
|
||||
* user_order is the log2 of the number of buckets in the user hash table.
|
||||
* set this to approximately log2 of the max number of memory regions
|
||||
* that will be allocated for _all_ pools together.
|
||||
* owner_order is the log2 of the number of buckets in the owner hash table.
|
||||
* set this to approximately log2 of
|
||||
* the number of client file connections that will
|
||||
* be using the manager.
|
||||
*
|
||||
*/
|
||||
|
||||
extern int drm_sman_init(struct drm_sman * sman, unsigned int num_managers,
|
||||
unsigned int user_order, unsigned int owner_order);
|
||||
|
||||
/*
|
||||
* Initialize a drm_mm.c allocator. Should be called only once for each
|
||||
* manager unless a customized allogator is used.
|
||||
*/
|
||||
|
||||
extern int drm_sman_set_range(struct drm_sman * sman, unsigned int manager,
|
||||
unsigned long start, unsigned long size);
|
||||
|
||||
/*
|
||||
* Initialize a customized allocator for one of the managers.
|
||||
* (See the SiS module). The object pointed to by "allocator" is copied,
|
||||
* so it can be destroyed after this call.
|
||||
*/
|
||||
|
||||
extern int drm_sman_set_manager(struct drm_sman * sman, unsigned int mananger,
|
||||
struct drm_sman_mm * allocator);
|
||||
|
||||
/*
|
||||
* Allocate a memory block. Aligment is not implemented yet.
|
||||
*/
|
||||
|
||||
extern struct drm_memblock_item *drm_sman_alloc(struct drm_sman * sman,
|
||||
unsigned int manager,
|
||||
unsigned long size,
|
||||
unsigned alignment,
|
||||
unsigned long owner);
|
||||
/*
|
||||
* Free a memory block identified by its user hash key.
|
||||
*/
|
||||
|
||||
extern int drm_sman_free_key(struct drm_sman * sman, unsigned int key);
|
||||
|
||||
/*
|
||||
* returns 1 iff there are no stale memory blocks associated with this owner.
|
||||
* Typically called to determine if we need to idle the hardware and call
|
||||
* drm_sman_owner_cleanup. If there are no stale memory blocks, it removes all
|
||||
* resources associated with owner.
|
||||
*/
|
||||
|
||||
extern int drm_sman_owner_clean(struct drm_sman * sman, unsigned long owner);
|
||||
|
||||
/*
|
||||
* Frees all stale memory blocks associated with this owner. Note that this
|
||||
* requires that the hardware is finished with all blocks, so the graphics engine
|
||||
* should be idled before this call is made. This function also frees
|
||||
* any resources associated with "owner" and should be called when owner
|
||||
* is not going to be referenced anymore.
|
||||
*/
|
||||
|
||||
extern void drm_sman_owner_cleanup(struct drm_sman * sman, unsigned long owner);
|
||||
|
||||
/*
|
||||
* Frees all stale memory blocks associated with the memory manager.
|
||||
* See idling above.
|
||||
*/
|
||||
|
||||
extern void drm_sman_cleanup(struct drm_sman * sman);
|
||||
|
||||
#endif
|
||||
@@ -32,17 +32,16 @@
|
||||
/**
|
||||
* User-desired buffer creation information structure.
|
||||
*
|
||||
* @size: requested size for the object.
|
||||
* @size: user-desired memory allocation size.
|
||||
* - this size value would be page-aligned internally.
|
||||
* @flags: user request for setting memory type or cache attributes.
|
||||
* @handle: returned handle for the object.
|
||||
* @pad: just padding to be 64-bit aligned.
|
||||
* @handle: returned a handle to created gem object.
|
||||
* - this handle will be set by gem module of kernel side.
|
||||
*/
|
||||
struct drm_exynos_gem_create {
|
||||
unsigned int size;
|
||||
uint64_t size;
|
||||
unsigned int flags;
|
||||
unsigned int handle;
|
||||
unsigned int pad;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -75,9 +74,16 @@ struct drm_exynos_gem_mmap {
|
||||
uint64_t mapped;
|
||||
};
|
||||
|
||||
struct drm_exynos_plane_set_zpos {
|
||||
__u32 plane_id;
|
||||
__s32 zpos;
|
||||
};
|
||||
|
||||
#define DRM_EXYNOS_GEM_CREATE 0x00
|
||||
#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
|
||||
#define DRM_EXYNOS_GEM_MMAP 0x02
|
||||
/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
|
||||
#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06
|
||||
|
||||
#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
|
||||
@@ -88,6 +94,9 @@ struct drm_exynos_gem_mmap {
|
||||
#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
|
||||
|
||||
#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
|
||||
|
||||
/**
|
||||
* Platform Specific Structure for DRM based FIMD.
|
||||
*
|
||||
@@ -103,4 +112,31 @@ struct exynos_drm_fimd_pdata {
|
||||
unsigned int bpp;
|
||||
};
|
||||
|
||||
/**
|
||||
* Platform Specific Structure for DRM based HDMI.
|
||||
*
|
||||
* @hdmi_dev: device point to specific hdmi driver.
|
||||
* @mixer_dev: device point to specific mixer driver.
|
||||
*
|
||||
* this structure is used for common hdmi driver and each device object
|
||||
* would be used to access specific device driver(hdmi or mixer driver)
|
||||
*/
|
||||
struct exynos_drm_common_hdmi_pd {
|
||||
struct device *hdmi_dev;
|
||||
struct device *mixer_dev;
|
||||
};
|
||||
|
||||
/**
|
||||
* Platform Specific Structure for DRM based HDMI core.
|
||||
*
|
||||
* @timing: default video mode for initializing
|
||||
* @default_win: default window layer number to be used for UI.
|
||||
* @bpp: default bit per pixel.
|
||||
*/
|
||||
struct exynos_drm_hdmi_pdata {
|
||||
struct fb_videomode timing;
|
||||
unsigned int default_win;
|
||||
unsigned int bpp;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
91
include/drm/gma_drm.h
Normal file
91
include/drm/gma_drm.h
Normal file
@@ -0,0 +1,91 @@
|
||||
/**************************************************************************
|
||||
* Copyright (c) 2007-2011, Intel Corporation.
|
||||
* All Rights Reserved.
|
||||
* Copyright (c) 2008, Tungsten Graphics Inc. Cedar Park, TX., USA.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifndef _PSB_DRM_H_
|
||||
#define _PSB_DRM_H_
|
||||
|
||||
/*
|
||||
* Manage the LUT for an output
|
||||
*/
|
||||
struct drm_psb_dpst_lut_arg {
|
||||
uint8_t lut[256];
|
||||
int output_id;
|
||||
};
|
||||
|
||||
/*
|
||||
* Validate modes
|
||||
*/
|
||||
struct drm_psb_mode_operation_arg {
|
||||
u32 obj_id;
|
||||
u16 operation;
|
||||
struct drm_mode_modeinfo mode;
|
||||
u64 data;
|
||||
};
|
||||
|
||||
/*
|
||||
* Query the stolen memory for smarter management of
|
||||
* memory by the server
|
||||
*/
|
||||
struct drm_psb_stolen_memory_arg {
|
||||
u32 base;
|
||||
u32 size;
|
||||
};
|
||||
|
||||
struct drm_psb_get_pipe_from_crtc_id_arg {
|
||||
/** ID of CRTC being requested **/
|
||||
u32 crtc_id;
|
||||
/** pipe of requested CRTC **/
|
||||
u32 pipe;
|
||||
};
|
||||
|
||||
struct drm_psb_gem_create {
|
||||
__u64 size;
|
||||
__u32 handle;
|
||||
__u32 flags;
|
||||
#define GMA_GEM_CREATE_STOLEN 1 /* Stolen memory can be used */
|
||||
};
|
||||
|
||||
struct drm_psb_gem_mmap {
|
||||
__u32 handle;
|
||||
__u32 pad;
|
||||
/**
|
||||
* Fake offset to use for subsequent mmap call
|
||||
*
|
||||
* This is a fixed-size type for 32/64 compatibility.
|
||||
*/
|
||||
__u64 offset;
|
||||
};
|
||||
|
||||
/* Controlling the kernel modesetting buffers */
|
||||
|
||||
#define DRM_GMA_GEM_CREATE 0x00 /* Create a GEM object */
|
||||
#define DRM_GMA_GEM_MMAP 0x01 /* Map GEM memory */
|
||||
#define DRM_GMA_STOLEN_MEMORY 0x02 /* Report stolen memory */
|
||||
#define DRM_GMA_2D_OP 0x03 /* Will be merged later */
|
||||
#define DRM_GMA_GAMMA 0x04 /* Set gamma table */
|
||||
#define DRM_GMA_ADB 0x05 /* Get backlight */
|
||||
#define DRM_GMA_DPST_BL 0x06 /* Set backlight */
|
||||
#define DRM_GMA_GET_PIPE_FROM_CRTC_ID 0x1 /* CRTC to physical pipe# */
|
||||
#define DRM_GMA_MODE_OPERATION 0x07 /* Mode validation/DC set */
|
||||
#define PSB_MODE_OPERATION_MODE_VALID 0x01
|
||||
|
||||
|
||||
#endif
|
||||
@@ -198,6 +198,8 @@ typedef struct _drm_i915_sarea {
|
||||
#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
|
||||
#define DRM_I915_OVERLAY_ATTRS 0x28
|
||||
#define DRM_I915_GEM_EXECBUFFER2 0x29
|
||||
#define DRM_I915_GET_SPRITE_COLORKEY 0x2a
|
||||
#define DRM_I915_SET_SPRITE_COLORKEY 0x2b
|
||||
|
||||
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
|
||||
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
|
||||
@@ -239,6 +241,8 @@ typedef struct _drm_i915_sarea {
|
||||
#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
|
||||
#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image)
|
||||
#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
|
||||
#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
|
||||
#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
|
||||
|
||||
/* Allow drivers to submit batchbuffers directly to hardware, relying
|
||||
* on the security mechanisms provided by hardware.
|
||||
@@ -291,6 +295,7 @@ typedef struct drm_i915_irq_wait {
|
||||
#define I915_PARAM_HAS_COHERENT_RINGS 13
|
||||
#define I915_PARAM_HAS_EXEC_CONSTANTS 14
|
||||
#define I915_PARAM_HAS_RELAXED_DELTA 15
|
||||
#define I915_PARAM_HAS_GEN7_SOL_RESET 16
|
||||
|
||||
typedef struct drm_i915_getparam {
|
||||
int param;
|
||||
@@ -653,6 +658,9 @@ struct drm_i915_gem_execbuffer2 {
|
||||
__u64 rsvd2;
|
||||
};
|
||||
|
||||
/** Resets the SO write offset registers for transform feedback on gen7. */
|
||||
#define I915_EXEC_GEN7_SOL_RESET (1<<8)
|
||||
|
||||
struct drm_i915_gem_pin {
|
||||
/** Handle of the buffer to be pinned. */
|
||||
__u32 handle;
|
||||
@@ -844,4 +852,36 @@ struct drm_intel_overlay_attrs {
|
||||
__u32 gamma5;
|
||||
};
|
||||
|
||||
/*
|
||||
* Intel sprite handling
|
||||
*
|
||||
* Color keying works with a min/mask/max tuple. Both source and destination
|
||||
* color keying is allowed.
|
||||
*
|
||||
* Source keying:
|
||||
* Sprite pixels within the min & max values, masked against the color channels
|
||||
* specified in the mask field, will be transparent. All other pixels will
|
||||
* be displayed on top of the primary plane. For RGB surfaces, only the min
|
||||
* and mask fields will be used; ranged compares are not allowed.
|
||||
*
|
||||
* Destination keying:
|
||||
* Primary plane pixels that match the min value, masked against the color
|
||||
* channels specified in the mask field, will be replaced by corresponding
|
||||
* pixels from the sprite plane.
|
||||
*
|
||||
* Note that source & destination keying are exclusive; only one can be
|
||||
* active on a given plane.
|
||||
*/
|
||||
|
||||
#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */
|
||||
#define I915_SET_COLORKEY_DESTINATION (1<<1)
|
||||
#define I915_SET_COLORKEY_SOURCE (1<<2)
|
||||
struct drm_intel_sprite_colorkey {
|
||||
__u32 plane_id;
|
||||
__u32 min_value;
|
||||
__u32 channel_mask;
|
||||
__u32 max_value;
|
||||
__u32 flags;
|
||||
};
|
||||
|
||||
#endif /* _I915_DRM_H_ */
|
||||
|
||||
@@ -509,6 +509,7 @@ typedef struct {
|
||||
#define DRM_RADEON_GEM_SET_TILING 0x28
|
||||
#define DRM_RADEON_GEM_GET_TILING 0x29
|
||||
#define DRM_RADEON_GEM_BUSY 0x2a
|
||||
#define DRM_RADEON_GEM_VA 0x2b
|
||||
|
||||
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
|
||||
#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
|
||||
@@ -550,6 +551,7 @@ typedef struct {
|
||||
#define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
|
||||
#define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
|
||||
#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
|
||||
#define DRM_IOCTL_RADEON_GEM_VA DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_VA, struct drm_radeon_gem_va)
|
||||
|
||||
typedef struct drm_radeon_init {
|
||||
enum {
|
||||
@@ -872,12 +874,39 @@ struct drm_radeon_gem_pwrite {
|
||||
uint64_t data_ptr;
|
||||
};
|
||||
|
||||
#define RADEON_VA_MAP 1
|
||||
#define RADEON_VA_UNMAP 2
|
||||
|
||||
#define RADEON_VA_RESULT_OK 0
|
||||
#define RADEON_VA_RESULT_ERROR 1
|
||||
#define RADEON_VA_RESULT_VA_EXIST 2
|
||||
|
||||
#define RADEON_VM_PAGE_VALID (1 << 0)
|
||||
#define RADEON_VM_PAGE_READABLE (1 << 1)
|
||||
#define RADEON_VM_PAGE_WRITEABLE (1 << 2)
|
||||
#define RADEON_VM_PAGE_SYSTEM (1 << 3)
|
||||
#define RADEON_VM_PAGE_SNOOPED (1 << 4)
|
||||
|
||||
struct drm_radeon_gem_va {
|
||||
uint32_t handle;
|
||||
uint32_t operation;
|
||||
uint32_t vm_id;
|
||||
uint32_t flags;
|
||||
uint64_t offset;
|
||||
};
|
||||
|
||||
#define RADEON_CHUNK_ID_RELOCS 0x01
|
||||
#define RADEON_CHUNK_ID_IB 0x02
|
||||
#define RADEON_CHUNK_ID_FLAGS 0x03
|
||||
|
||||
/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */
|
||||
#define RADEON_CS_KEEP_TILING_FLAGS 0x01
|
||||
#define RADEON_CS_USE_VM 0x02
|
||||
/* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring type */
|
||||
#define RADEON_CS_RING_GFX 0
|
||||
#define RADEON_CS_RING_COMPUTE 1
|
||||
/* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority */
|
||||
/* 0 = normal, + = higher priority, - = lower priority */
|
||||
|
||||
struct drm_radeon_cs_chunk {
|
||||
uint32_t chunk_id;
|
||||
@@ -885,6 +914,9 @@ struct drm_radeon_cs_chunk {
|
||||
uint64_t chunk_data;
|
||||
};
|
||||
|
||||
/* drm_radeon_cs_reloc.flags */
|
||||
#define RADEON_RELOC_DONT_SYNC 0x01
|
||||
|
||||
struct drm_radeon_cs_reloc {
|
||||
uint32_t handle;
|
||||
uint32_t read_domains;
|
||||
@@ -916,6 +948,10 @@ struct drm_radeon_cs {
|
||||
#define RADEON_INFO_NUM_TILE_PIPES 0x0b /* tile pipes for r600+ */
|
||||
#define RADEON_INFO_FUSION_GART_WORKING 0x0c /* fusion writes to GTT were broken before this */
|
||||
#define RADEON_INFO_BACKEND_MAP 0x0d /* pipe to backend map, needed by mesa */
|
||||
/* virtual address start, va < start are reserved by the kernel */
|
||||
#define RADEON_INFO_VA_START 0x0e
|
||||
/* maximum size of ib using the virtual memory cs */
|
||||
#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
|
||||
|
||||
struct drm_radeon_info {
|
||||
uint32_t request;
|
||||
|
||||
@@ -64,4 +64,8 @@ typedef struct {
|
||||
unsigned int offset, size;
|
||||
} drm_sis_fb_t;
|
||||
|
||||
struct sis_file_private {
|
||||
struct list_head obj_list;
|
||||
};
|
||||
|
||||
#endif /* __SIS_DRM_H__ */
|
||||
|
||||
@@ -122,17 +122,12 @@ struct ttm_mem_reg {
|
||||
* be mmapped by user space. Each of these bos occupy a slot in the
|
||||
* device address space, that can be used for normal vm operations.
|
||||
*
|
||||
* @ttm_bo_type_user: These are user-space memory areas that are made
|
||||
* available to the GPU by mapping the buffer pages into the GPU aperture
|
||||
* space. These buffers cannot be mmaped from the device address space.
|
||||
*
|
||||
* @ttm_bo_type_kernel: These buffers are like ttm_bo_type_device buffers,
|
||||
* but they cannot be accessed from user-space. For kernel-only use.
|
||||
*/
|
||||
|
||||
enum ttm_bo_type {
|
||||
ttm_bo_type_device,
|
||||
ttm_bo_type_user,
|
||||
ttm_bo_type_kernel
|
||||
};
|
||||
|
||||
@@ -434,9 +429,9 @@ extern void ttm_bo_unlock_delayed_workqueue(struct ttm_bo_device *bdev,
|
||||
* -EBUSY if the buffer is busy and no_wait is true.
|
||||
* -ERESTARTSYS if interrupted by a signal.
|
||||
*/
|
||||
|
||||
extern int
|
||||
ttm_bo_synccpu_write_grab(struct ttm_buffer_object *bo, bool no_wait);
|
||||
|
||||
/**
|
||||
* ttm_bo_synccpu_write_release:
|
||||
*
|
||||
@@ -446,6 +441,22 @@ ttm_bo_synccpu_write_grab(struct ttm_buffer_object *bo, bool no_wait);
|
||||
*/
|
||||
extern void ttm_bo_synccpu_write_release(struct ttm_buffer_object *bo);
|
||||
|
||||
/**
|
||||
* ttm_bo_acc_size
|
||||
*
|
||||
* @bdev: Pointer to a ttm_bo_device struct.
|
||||
* @bo_size: size of the buffer object in byte.
|
||||
* @struct_size: size of the structure holding buffer object datas
|
||||
*
|
||||
* Returns size to account for a buffer object
|
||||
*/
|
||||
size_t ttm_bo_acc_size(struct ttm_bo_device *bdev,
|
||||
unsigned long bo_size,
|
||||
unsigned struct_size);
|
||||
size_t ttm_bo_dma_acc_size(struct ttm_bo_device *bdev,
|
||||
unsigned long bo_size,
|
||||
unsigned struct_size);
|
||||
|
||||
/**
|
||||
* ttm_bo_init
|
||||
*
|
||||
@@ -493,6 +504,7 @@ extern int ttm_bo_init(struct ttm_bo_device *bdev,
|
||||
struct file *persistent_swap_storage,
|
||||
size_t acc_size,
|
||||
void (*destroy) (struct ttm_buffer_object *));
|
||||
|
||||
/**
|
||||
* ttm_bo_synccpu_object_init
|
||||
*
|
||||
|
||||
@@ -42,37 +42,10 @@
|
||||
struct ttm_backend;
|
||||
|
||||
struct ttm_backend_func {
|
||||
/**
|
||||
* struct ttm_backend_func member populate
|
||||
*
|
||||
* @backend: Pointer to a struct ttm_backend.
|
||||
* @num_pages: Number of pages to populate.
|
||||
* @pages: Array of pointers to ttm pages.
|
||||
* @dummy_read_page: Page to be used instead of NULL pages in the
|
||||
* array @pages.
|
||||
* @dma_addrs: Array of DMA (bus) address of the ttm pages.
|
||||
*
|
||||
* Populate the backend with ttm pages. Depending on the backend,
|
||||
* it may or may not copy the @pages array.
|
||||
*/
|
||||
int (*populate) (struct ttm_backend *backend,
|
||||
unsigned long num_pages, struct page **pages,
|
||||
struct page *dummy_read_page,
|
||||
dma_addr_t *dma_addrs);
|
||||
/**
|
||||
* struct ttm_backend_func member clear
|
||||
*
|
||||
* @backend: Pointer to a struct ttm_backend.
|
||||
*
|
||||
* This is an "unpopulate" function. Release all resources
|
||||
* allocated with populate.
|
||||
*/
|
||||
void (*clear) (struct ttm_backend *backend);
|
||||
|
||||
/**
|
||||
* struct ttm_backend_func member bind
|
||||
*
|
||||
* @backend: Pointer to a struct ttm_backend.
|
||||
* @ttm: Pointer to a struct ttm_tt.
|
||||
* @bo_mem: Pointer to a struct ttm_mem_reg describing the
|
||||
* memory type and location for binding.
|
||||
*
|
||||
@@ -80,46 +53,29 @@ struct ttm_backend_func {
|
||||
* indicated by @bo_mem. This function should be able to handle
|
||||
* differences between aperture and system page sizes.
|
||||
*/
|
||||
int (*bind) (struct ttm_backend *backend, struct ttm_mem_reg *bo_mem);
|
||||
int (*bind) (struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem);
|
||||
|
||||
/**
|
||||
* struct ttm_backend_func member unbind
|
||||
*
|
||||
* @backend: Pointer to a struct ttm_backend.
|
||||
* @ttm: Pointer to a struct ttm_tt.
|
||||
*
|
||||
* Unbind previously bound backend pages. This function should be
|
||||
* able to handle differences between aperture and system page sizes.
|
||||
*/
|
||||
int (*unbind) (struct ttm_backend *backend);
|
||||
int (*unbind) (struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* struct ttm_backend_func member destroy
|
||||
*
|
||||
* @backend: Pointer to a struct ttm_backend.
|
||||
* @ttm: Pointer to a struct ttm_tt.
|
||||
*
|
||||
* Destroy the backend.
|
||||
* Destroy the backend. This will be call back from ttm_tt_destroy so
|
||||
* don't call ttm_tt_destroy from the callback or infinite loop.
|
||||
*/
|
||||
void (*destroy) (struct ttm_backend *backend);
|
||||
void (*destroy) (struct ttm_tt *ttm);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ttm_backend
|
||||
*
|
||||
* @bdev: Pointer to a struct ttm_bo_device.
|
||||
* @flags: For driver use.
|
||||
* @func: Pointer to a struct ttm_backend_func that describes
|
||||
* the backend methods.
|
||||
*
|
||||
*/
|
||||
|
||||
struct ttm_backend {
|
||||
struct ttm_bo_device *bdev;
|
||||
uint32_t flags;
|
||||
struct ttm_backend_func *func;
|
||||
};
|
||||
|
||||
#define TTM_PAGE_FLAG_USER (1 << 1)
|
||||
#define TTM_PAGE_FLAG_USER_DIRTY (1 << 2)
|
||||
#define TTM_PAGE_FLAG_WRITE (1 << 3)
|
||||
#define TTM_PAGE_FLAG_SWAPPED (1 << 4)
|
||||
#define TTM_PAGE_FLAG_PERSISTENT_SWAP (1 << 5)
|
||||
@@ -135,23 +91,18 @@ enum ttm_caching_state {
|
||||
/**
|
||||
* struct ttm_tt
|
||||
*
|
||||
* @bdev: Pointer to a struct ttm_bo_device.
|
||||
* @func: Pointer to a struct ttm_backend_func that describes
|
||||
* the backend methods.
|
||||
* @dummy_read_page: Page to map where the ttm_tt page array contains a NULL
|
||||
* pointer.
|
||||
* @pages: Array of pages backing the data.
|
||||
* @first_himem_page: Himem pages are put last in the page array, which
|
||||
* enables us to run caching attribute changes on only the first part
|
||||
* of the page array containing lomem pages. This is the index of the
|
||||
* first himem page.
|
||||
* @last_lomem_page: Index of the last lomem page in the page array.
|
||||
* @num_pages: Number of pages in the page array.
|
||||
* @bdev: Pointer to the current struct ttm_bo_device.
|
||||
* @be: Pointer to the ttm backend.
|
||||
* @tsk: The task for user ttm.
|
||||
* @start: virtual address for user ttm.
|
||||
* @swap_storage: Pointer to shmem struct file for swap storage.
|
||||
* @caching_state: The current caching state of the pages.
|
||||
* @state: The current binding state of the pages.
|
||||
* @dma_address: The DMA (bus) addresses of the pages (if TTM_PAGE_FLAG_DMA32)
|
||||
*
|
||||
* This is a structure holding the pages, caching- and aperture binding
|
||||
* status for a buffer object that isn't backed by fixed (VRAM / AGP)
|
||||
@@ -159,16 +110,14 @@ enum ttm_caching_state {
|
||||
*/
|
||||
|
||||
struct ttm_tt {
|
||||
struct ttm_bo_device *bdev;
|
||||
struct ttm_backend_func *func;
|
||||
struct page *dummy_read_page;
|
||||
struct page **pages;
|
||||
long first_himem_page;
|
||||
long last_lomem_page;
|
||||
uint32_t page_flags;
|
||||
unsigned long num_pages;
|
||||
struct ttm_bo_global *glob;
|
||||
struct ttm_backend *be;
|
||||
struct task_struct *tsk;
|
||||
unsigned long start;
|
||||
struct file *swap_storage;
|
||||
enum ttm_caching_state caching_state;
|
||||
enum {
|
||||
@@ -176,7 +125,23 @@ struct ttm_tt {
|
||||
tt_unbound,
|
||||
tt_unpopulated,
|
||||
} state;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ttm_dma_tt
|
||||
*
|
||||
* @ttm: Base ttm_tt struct.
|
||||
* @dma_address: The DMA (bus) addresses of the pages
|
||||
* @pages_list: used by some page allocation backend
|
||||
*
|
||||
* This is a structure holding the pages, caching- and aperture binding
|
||||
* status for a buffer object that isn't backed by fixed (VRAM / AGP)
|
||||
* memory.
|
||||
*/
|
||||
struct ttm_dma_tt {
|
||||
struct ttm_tt ttm;
|
||||
dma_addr_t *dma_address;
|
||||
struct list_head pages_list;
|
||||
};
|
||||
|
||||
#define TTM_MEMTYPE_FLAG_FIXED (1 << 0) /* Fixed (on-card) PCI memory */
|
||||
@@ -351,15 +316,42 @@ struct ttm_mem_type_manager {
|
||||
|
||||
struct ttm_bo_driver {
|
||||
/**
|
||||
* struct ttm_bo_driver member create_ttm_backend_entry
|
||||
* ttm_tt_create
|
||||
*
|
||||
* @bdev: The buffer object device.
|
||||
* @bdev: pointer to a struct ttm_bo_device:
|
||||
* @size: Size of the data needed backing.
|
||||
* @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags.
|
||||
* @dummy_read_page: See struct ttm_bo_device.
|
||||
*
|
||||
* Create a driver specific struct ttm_backend.
|
||||
* Create a struct ttm_tt to back data with system memory pages.
|
||||
* No pages are actually allocated.
|
||||
* Returns:
|
||||
* NULL: Out of memory.
|
||||
*/
|
||||
struct ttm_tt *(*ttm_tt_create)(struct ttm_bo_device *bdev,
|
||||
unsigned long size,
|
||||
uint32_t page_flags,
|
||||
struct page *dummy_read_page);
|
||||
|
||||
struct ttm_backend *(*create_ttm_backend_entry)
|
||||
(struct ttm_bo_device *bdev);
|
||||
/**
|
||||
* ttm_tt_populate
|
||||
*
|
||||
* @ttm: The struct ttm_tt to contain the backing pages.
|
||||
*
|
||||
* Allocate all backing pages
|
||||
* Returns:
|
||||
* -ENOMEM: Out of memory.
|
||||
*/
|
||||
int (*ttm_tt_populate)(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* ttm_tt_unpopulate
|
||||
*
|
||||
* @ttm: The struct ttm_tt to contain the backing pages.
|
||||
*
|
||||
* Free all backing page
|
||||
*/
|
||||
void (*ttm_tt_unpopulate)(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* struct ttm_bo_driver member invalidate_caches
|
||||
@@ -477,9 +469,6 @@ struct ttm_bo_global_ref {
|
||||
* @dummy_read_page: Pointer to a dummy page used for mapping requests
|
||||
* of unpopulated pages.
|
||||
* @shrink: A shrink callback object used for buffer object swap.
|
||||
* @ttm_bo_extra_size: Extra size (sizeof(struct ttm_buffer_object) excluded)
|
||||
* used by a buffer object. This is excluding page arrays and backing pages.
|
||||
* @ttm_bo_size: This is @ttm_bo_extra_size + sizeof(struct ttm_buffer_object).
|
||||
* @device_list_mutex: Mutex protecting the device list.
|
||||
* This mutex is held while traversing the device list for pm options.
|
||||
* @lru_lock: Spinlock protecting the bo subsystem lru lists.
|
||||
@@ -497,8 +486,6 @@ struct ttm_bo_global {
|
||||
struct ttm_mem_global *mem_glob;
|
||||
struct page *dummy_read_page;
|
||||
struct ttm_mem_shrink shrink;
|
||||
size_t ttm_bo_extra_size;
|
||||
size_t ttm_bo_size;
|
||||
struct mutex device_list_mutex;
|
||||
spinlock_t lru_lock;
|
||||
|
||||
@@ -600,8 +587,9 @@ ttm_flag_masked(uint32_t *old, uint32_t new, uint32_t mask)
|
||||
}
|
||||
|
||||
/**
|
||||
* ttm_tt_create
|
||||
* ttm_tt_init
|
||||
*
|
||||
* @ttm: The struct ttm_tt.
|
||||
* @bdev: pointer to a struct ttm_bo_device:
|
||||
* @size: Size of the data needed backing.
|
||||
* @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags.
|
||||
@@ -612,28 +600,22 @@ ttm_flag_masked(uint32_t *old, uint32_t new, uint32_t mask)
|
||||
* Returns:
|
||||
* NULL: Out of memory.
|
||||
*/
|
||||
extern struct ttm_tt *ttm_tt_create(struct ttm_bo_device *bdev,
|
||||
unsigned long size,
|
||||
uint32_t page_flags,
|
||||
struct page *dummy_read_page);
|
||||
extern int ttm_tt_init(struct ttm_tt *ttm, struct ttm_bo_device *bdev,
|
||||
unsigned long size, uint32_t page_flags,
|
||||
struct page *dummy_read_page);
|
||||
extern int ttm_dma_tt_init(struct ttm_dma_tt *ttm_dma, struct ttm_bo_device *bdev,
|
||||
unsigned long size, uint32_t page_flags,
|
||||
struct page *dummy_read_page);
|
||||
|
||||
/**
|
||||
* ttm_tt_set_user:
|
||||
* ttm_tt_fini
|
||||
*
|
||||
* @ttm: The struct ttm_tt to populate.
|
||||
* @tsk: A struct task_struct for which @start is a valid user-space address.
|
||||
* @start: A valid user-space address.
|
||||
* @num_pages: Size in pages of the user memory area.
|
||||
* @ttm: the ttm_tt structure.
|
||||
*
|
||||
* Populate a struct ttm_tt with a user-space memory area after first pinning
|
||||
* the pages backing it.
|
||||
* Returns:
|
||||
* !0: Error.
|
||||
* Free memory of ttm_tt structure
|
||||
*/
|
||||
|
||||
extern int ttm_tt_set_user(struct ttm_tt *ttm,
|
||||
struct task_struct *tsk,
|
||||
unsigned long start, unsigned long num_pages);
|
||||
extern void ttm_tt_fini(struct ttm_tt *ttm);
|
||||
extern void ttm_dma_tt_fini(struct ttm_dma_tt *ttm_dma);
|
||||
|
||||
/**
|
||||
* ttm_ttm_bind:
|
||||
@@ -645,21 +627,12 @@ extern int ttm_tt_set_user(struct ttm_tt *ttm,
|
||||
*/
|
||||
extern int ttm_tt_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem);
|
||||
|
||||
/**
|
||||
* ttm_tt_populate:
|
||||
*
|
||||
* @ttm: The struct ttm_tt to contain the backing pages.
|
||||
*
|
||||
* Add backing pages to all of @ttm
|
||||
*/
|
||||
extern int ttm_tt_populate(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* ttm_ttm_destroy:
|
||||
*
|
||||
* @ttm: The struct ttm_tt.
|
||||
*
|
||||
* Unbind, unpopulate and destroy a struct ttm_tt.
|
||||
* Unbind, unpopulate and destroy common struct ttm_tt.
|
||||
*/
|
||||
extern void ttm_tt_destroy(struct ttm_tt *ttm);
|
||||
|
||||
@@ -673,19 +646,13 @@ extern void ttm_tt_destroy(struct ttm_tt *ttm);
|
||||
extern void ttm_tt_unbind(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* ttm_ttm_destroy:
|
||||
* ttm_tt_swapin:
|
||||
*
|
||||
* @ttm: The struct ttm_tt.
|
||||
* @index: Index of the desired page.
|
||||
*
|
||||
* Return a pointer to the struct page backing @ttm at page
|
||||
* index @index. If the page is unpopulated, one will be allocated to
|
||||
* populate that index.
|
||||
*
|
||||
* Returns:
|
||||
* NULL on OOM.
|
||||
* Swap in a previously swap out ttm_tt.
|
||||
*/
|
||||
extern struct page *ttm_tt_get_page(struct ttm_tt *ttm, int index);
|
||||
extern int ttm_tt_swapin(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* ttm_tt_cache_flush:
|
||||
@@ -1046,17 +1013,25 @@ extern const struct ttm_mem_type_manager_func ttm_bo_manager_func;
|
||||
#include <linux/agp_backend.h>
|
||||
|
||||
/**
|
||||
* ttm_agp_backend_init
|
||||
* ttm_agp_tt_create
|
||||
*
|
||||
* @bdev: Pointer to a struct ttm_bo_device.
|
||||
* @bridge: The agp bridge this device is sitting on.
|
||||
* @size: Size of the data needed backing.
|
||||
* @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags.
|
||||
* @dummy_read_page: See struct ttm_bo_device.
|
||||
*
|
||||
*
|
||||
* Create a TTM backend that uses the indicated AGP bridge as an aperture
|
||||
* for TT memory. This function uses the linux agpgart interface to
|
||||
* bind and unbind memory backing a ttm_tt.
|
||||
*/
|
||||
extern struct ttm_backend *ttm_agp_backend_init(struct ttm_bo_device *bdev,
|
||||
struct agp_bridge_data *bridge);
|
||||
extern struct ttm_tt *ttm_agp_tt_create(struct ttm_bo_device *bdev,
|
||||
struct agp_bridge_data *bridge,
|
||||
unsigned long size, uint32_t page_flags,
|
||||
struct page *dummy_read_page);
|
||||
int ttm_agp_tt_populate(struct ttm_tt *ttm);
|
||||
void ttm_agp_tt_unpopulate(struct ttm_tt *ttm);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -29,35 +29,6 @@
|
||||
#include "ttm_bo_driver.h"
|
||||
#include "ttm_memory.h"
|
||||
|
||||
/**
|
||||
* Get count number of pages from pool to pages list.
|
||||
*
|
||||
* @pages: head of empty linked list where pages are filled.
|
||||
* @flags: ttm flags for page allocation.
|
||||
* @cstate: ttm caching state for the page.
|
||||
* @count: number of pages to allocate.
|
||||
* @dma_address: The DMA (bus) address of pages (if TTM_PAGE_FLAG_DMA32 set).
|
||||
*/
|
||||
int ttm_get_pages(struct list_head *pages,
|
||||
int flags,
|
||||
enum ttm_caching_state cstate,
|
||||
unsigned count,
|
||||
dma_addr_t *dma_address);
|
||||
/**
|
||||
* Put linked list of pages to pool.
|
||||
*
|
||||
* @pages: list of pages to free.
|
||||
* @page_count: number of pages in the list. Zero can be passed for unknown
|
||||
* count.
|
||||
* @flags: ttm flags for page allocation.
|
||||
* @cstate: ttm caching state.
|
||||
* @dma_address: The DMA (bus) address of pages (if TTM_PAGE_FLAG_DMA32 set).
|
||||
*/
|
||||
void ttm_put_pages(struct list_head *pages,
|
||||
unsigned page_count,
|
||||
int flags,
|
||||
enum ttm_caching_state cstate,
|
||||
dma_addr_t *dma_address);
|
||||
/**
|
||||
* Initialize pool allocator.
|
||||
*/
|
||||
@@ -67,8 +38,62 @@ int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages);
|
||||
*/
|
||||
void ttm_page_alloc_fini(void);
|
||||
|
||||
/**
|
||||
* ttm_pool_populate:
|
||||
*
|
||||
* @ttm: The struct ttm_tt to contain the backing pages.
|
||||
*
|
||||
* Add backing pages to all of @ttm
|
||||
*/
|
||||
extern int ttm_pool_populate(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* ttm_pool_unpopulate:
|
||||
*
|
||||
* @ttm: The struct ttm_tt which to free backing pages.
|
||||
*
|
||||
* Free all pages of @ttm
|
||||
*/
|
||||
extern void ttm_pool_unpopulate(struct ttm_tt *ttm);
|
||||
|
||||
/**
|
||||
* Output the state of pools to debugfs file
|
||||
*/
|
||||
extern int ttm_page_alloc_debugfs(struct seq_file *m, void *data);
|
||||
|
||||
|
||||
#ifdef CONFIG_SWIOTLB
|
||||
/**
|
||||
* Initialize pool allocator.
|
||||
*/
|
||||
int ttm_dma_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages);
|
||||
|
||||
/**
|
||||
* Free pool allocator.
|
||||
*/
|
||||
void ttm_dma_page_alloc_fini(void);
|
||||
|
||||
/**
|
||||
* Output the state of pools to debugfs file
|
||||
*/
|
||||
extern int ttm_dma_page_alloc_debugfs(struct seq_file *m, void *data);
|
||||
|
||||
extern int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev);
|
||||
extern void ttm_dma_unpopulate(struct ttm_dma_tt *ttm_dma, struct device *dev);
|
||||
|
||||
#else
|
||||
static inline int ttm_dma_page_alloc_init(struct ttm_mem_global *glob,
|
||||
unsigned max_pages)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline void ttm_dma_page_alloc_fini(void) { return; }
|
||||
|
||||
static inline int ttm_dma_page_alloc_debugfs(struct seq_file *m, void *data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -274,4 +274,8 @@ typedef struct drm_via_dmablit {
|
||||
drm_via_blitsync_t sync;
|
||||
} drm_via_dmablit_t;
|
||||
|
||||
struct via_file_private {
|
||||
struct list_head obj_list;
|
||||
};
|
||||
|
||||
#endif /* _VIA_DRM_H_ */
|
||||
|
||||
@@ -185,6 +185,7 @@ header-y += if_pppol2tp.h
|
||||
header-y += if_pppox.h
|
||||
header-y += if_slip.h
|
||||
header-y += if_strip.h
|
||||
header-y += if_team.h
|
||||
header-y += if_tr.h
|
||||
header-y += if_tun.h
|
||||
header-y += if_tunnel.h
|
||||
@@ -194,7 +195,9 @@ header-y += igmp.h
|
||||
header-y += in.h
|
||||
header-y += in6.h
|
||||
header-y += in_route.h
|
||||
header-y += sock_diag.h
|
||||
header-y += inet_diag.h
|
||||
header-y += unix_diag.h
|
||||
header-y += inotify.h
|
||||
header-y += input.h
|
||||
header-y += ioctl.h
|
||||
|
||||
@@ -146,6 +146,9 @@ extern void acct_exit_ns(struct pid_namespace *);
|
||||
*
|
||||
*/
|
||||
|
||||
#undef ACCT_VERSION
|
||||
#undef AHZ
|
||||
|
||||
#ifdef CONFIG_BSD_PROCESS_ACCT_V3
|
||||
#define ACCT_VERSION 3
|
||||
#define AHZ 100
|
||||
|
||||
@@ -302,10 +302,19 @@ extern bool osc_sb_apei_support_acked;
|
||||
OSC_PCI_EXPRESS_PME_CONTROL | \
|
||||
OSC_PCI_EXPRESS_AER_CONTROL | \
|
||||
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
|
||||
|
||||
#define OSC_PCI_NATIVE_HOTPLUG (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
|
||||
OSC_SHPC_NATIVE_HP_CONTROL)
|
||||
|
||||
extern acpi_status acpi_pci_osc_control_set(acpi_handle handle,
|
||||
u32 *mask, u32 req);
|
||||
extern void acpi_early_init(void);
|
||||
|
||||
extern int acpi_nvs_register(__u64 start, __u64 size);
|
||||
|
||||
extern int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
|
||||
void *data);
|
||||
|
||||
#else /* !CONFIG_ACPI */
|
||||
|
||||
#define acpi_disabled 1
|
||||
@@ -348,15 +357,18 @@ static inline int acpi_table_parse(char *id,
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
#endif /* !CONFIG_ACPI */
|
||||
|
||||
#ifdef CONFIG_ACPI_SLEEP
|
||||
int suspend_nvs_register(unsigned long start, unsigned long size);
|
||||
#else
|
||||
static inline int suspend_nvs_register(unsigned long a, unsigned long b)
|
||||
static inline int acpi_nvs_register(__u64 start, __u64 size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
|
||||
void *data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_ACPI */
|
||||
|
||||
#endif /*_LINUX_ACPI_H*/
|
||||
|
||||
@@ -12,4 +12,7 @@ static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
|
||||
|
||||
void __iomem *acpi_os_get_iomem(acpi_physical_address phys, unsigned int size);
|
||||
|
||||
int acpi_os_map_generic_address(struct acpi_generic_address *addr);
|
||||
void acpi_os_unmap_generic_address(struct acpi_generic_address *addr);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -23,6 +23,8 @@ struct ata_port_info;
|
||||
struct ahci_platform_data {
|
||||
int (*init)(struct device *dev, void __iomem *addr);
|
||||
void (*exit)(struct device *dev);
|
||||
int (*suspend)(struct device *dev);
|
||||
int (*resume)(struct device *dev);
|
||||
const struct ata_port_info *ata_port_info;
|
||||
unsigned int force_port_map;
|
||||
unsigned int mask_port_map;
|
||||
|
||||
@@ -16,6 +16,7 @@
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/resource.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
@@ -35,12 +36,6 @@ struct amba_device {
|
||||
unsigned int irq[AMBA_NR_IRQS];
|
||||
};
|
||||
|
||||
struct amba_id {
|
||||
unsigned int id;
|
||||
unsigned int mask;
|
||||
void *data;
|
||||
};
|
||||
|
||||
struct amba_driver {
|
||||
struct device_driver drv;
|
||||
int (*probe)(struct amba_device *, const struct amba_id *);
|
||||
|
||||
@@ -30,6 +30,7 @@ struct dma_chan;
|
||||
* @cd_invert: true if the gpio_cd pin value is active low
|
||||
* @capabilities: the capabilities of the block as implemented in
|
||||
* this platform, signify anything MMC_CAP_* from mmc/host.h
|
||||
* @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
|
||||
* @dma_filter: function used to select an appropriate RX and TX
|
||||
* DMA channel to be used for DMA, if and only if you're deploying the
|
||||
* generic DMA engine
|
||||
@@ -52,6 +53,7 @@ struct mmci_platform_data {
|
||||
int gpio_cd;
|
||||
bool cd_invert;
|
||||
unsigned long capabilities;
|
||||
unsigned long capabilities2;
|
||||
bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
|
||||
void *dma_rx_param;
|
||||
void *dma_tx_param;
|
||||
|
||||
@@ -238,6 +238,9 @@ struct dma_chan;
|
||||
* @enable_dma: if true enables DMA driven transfers.
|
||||
* @dma_rx_param: parameter to locate an RX DMA channel.
|
||||
* @dma_tx_param: parameter to locate a TX DMA channel.
|
||||
* @autosuspend_delay: delay in ms following transfer completion before the
|
||||
* runtime power management system suspends the device. A setting of 0
|
||||
* indicates no delay and the device will be suspended immediately.
|
||||
*/
|
||||
struct pl022_ssp_controller {
|
||||
u16 bus_id;
|
||||
@@ -246,6 +249,7 @@ struct pl022_ssp_controller {
|
||||
bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
|
||||
void *dma_rx_param;
|
||||
void *dma_tx_param;
|
||||
int autosuspend_delay;
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
@@ -7,7 +7,7 @@ struct pl061_platform_data {
|
||||
unsigned gpio_base;
|
||||
|
||||
/* number of the first IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to NO_IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to 0.
|
||||
*/
|
||||
unsigned irq_base;
|
||||
|
||||
|
||||
@@ -134,7 +134,7 @@ struct pl08x_txd {
|
||||
struct dma_async_tx_descriptor tx;
|
||||
struct list_head node;
|
||||
struct list_head dsg_list;
|
||||
enum dma_data_direction direction;
|
||||
enum dma_transfer_direction direction;
|
||||
dma_addr_t llis_bus;
|
||||
struct pl08x_lli *llis_va;
|
||||
/* Default cctl value for LLIs */
|
||||
@@ -197,7 +197,7 @@ struct pl08x_dma_chan {
|
||||
dma_addr_t dst_addr;
|
||||
u32 src_cctl;
|
||||
u32 dst_cctl;
|
||||
enum dma_data_direction runtime_direction;
|
||||
enum dma_transfer_direction runtime_direction;
|
||||
dma_cookie_t lc;
|
||||
struct list_head pend_list;
|
||||
struct pl08x_txd *at;
|
||||
|
||||
@@ -12,17 +12,9 @@
|
||||
#ifndef __AMBA_PL330_H_
|
||||
#define __AMBA_PL330_H_
|
||||
|
||||
#include <linux/dmaengine.h>
|
||||
#include <asm/hardware/pl330.h>
|
||||
|
||||
struct dma_pl330_peri {
|
||||
/*
|
||||
* Peri_Req i/f of the DMAC that is
|
||||
* peripheral could be reached from.
|
||||
*/
|
||||
u8 peri_id; /* specific dma id */
|
||||
enum pl330_reqtype rqtype;
|
||||
};
|
||||
|
||||
struct dma_pl330_platdata {
|
||||
/*
|
||||
* Number of valid peripherals connected to DMAC.
|
||||
@@ -33,9 +25,12 @@ struct dma_pl330_platdata {
|
||||
*/
|
||||
u8 nr_valid_peri;
|
||||
/* Array of valid peripherals */
|
||||
struct dma_pl330_peri *peri;
|
||||
u8 *peri_id;
|
||||
/* Operational capabilities */
|
||||
dma_cap_mask_t cap_mask;
|
||||
/* Bytes to allocate for MC buffer */
|
||||
unsigned mcbuf_sz;
|
||||
};
|
||||
|
||||
extern bool pl330_filter(struct dma_chan *chan, void *param);
|
||||
#endif /* __AMBA_PL330_H_ */
|
||||
|
||||
@@ -20,12 +20,148 @@
|
||||
#ifndef _ASM_X86_AMD_IOMMU_H
|
||||
#define _ASM_X86_AMD_IOMMU_H
|
||||
|
||||
#include <linux/irqreturn.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#ifdef CONFIG_AMD_IOMMU
|
||||
|
||||
struct task_struct;
|
||||
struct pci_dev;
|
||||
|
||||
extern int amd_iommu_detect(void);
|
||||
|
||||
|
||||
/**
|
||||
* amd_iommu_enable_device_erratum() - Enable erratum workaround for device
|
||||
* in the IOMMUv2 driver
|
||||
* @pdev: The PCI device the workaround is necessary for
|
||||
* @erratum: The erratum workaround to enable
|
||||
*
|
||||
* The function needs to be called before amd_iommu_init_device().
|
||||
* Possible values for the erratum number are for now:
|
||||
* - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
|
||||
* is enabled
|
||||
* - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
|
||||
* requests to one
|
||||
*/
|
||||
#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
|
||||
#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
|
||||
|
||||
extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
|
||||
|
||||
/**
|
||||
* amd_iommu_init_device() - Init device for use with IOMMUv2 driver
|
||||
* @pdev: The PCI device to initialize
|
||||
* @pasids: Number of PASIDs to support for this device
|
||||
*
|
||||
* This function does all setup for the device pdev so that it can be
|
||||
* used with IOMMUv2.
|
||||
* Returns 0 on success or negative value on error.
|
||||
*/
|
||||
extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
|
||||
|
||||
/**
|
||||
* amd_iommu_free_device() - Free all IOMMUv2 related device resources
|
||||
* and disable IOMMUv2 usage for this device
|
||||
* @pdev: The PCI device to disable IOMMUv2 usage for'
|
||||
*/
|
||||
extern void amd_iommu_free_device(struct pci_dev *pdev);
|
||||
|
||||
/**
|
||||
* amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
|
||||
* @pdev: The PCI device to bind the task to
|
||||
* @pasid: The PASID on the device the task should be bound to
|
||||
* @task: the task to bind
|
||||
*
|
||||
* The function returns 0 on success or a negative value on error.
|
||||
*/
|
||||
extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
|
||||
struct task_struct *task);
|
||||
|
||||
/**
|
||||
* amd_iommu_unbind_pasid() - Unbind a PASID from its task on
|
||||
* a device
|
||||
* @pdev: The device of the PASID
|
||||
* @pasid: The PASID to unbind
|
||||
*
|
||||
* When this function returns the device is no longer using the PASID
|
||||
* and the PASID is no longer bound to its task.
|
||||
*/
|
||||
extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
|
||||
|
||||
/**
|
||||
* amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
|
||||
* PRI requests
|
||||
* @pdev: The PCI device the call-back should be registered for
|
||||
* @cb: The call-back function
|
||||
*
|
||||
* The IOMMUv2 driver invokes this call-back when it is unable to
|
||||
* successfully handle a PRI request. The device driver can then decide
|
||||
* which PRI response the device should see. Possible return values for
|
||||
* the call-back are:
|
||||
*
|
||||
* - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
|
||||
* - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
|
||||
* - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
|
||||
* the device is required to disable
|
||||
* PRI when it receives this response
|
||||
*
|
||||
* The function returns 0 on success or negative value on error.
|
||||
*/
|
||||
#define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
|
||||
#define AMD_IOMMU_INV_PRI_RSP_INVALID 1
|
||||
#define AMD_IOMMU_INV_PRI_RSP_FAIL 2
|
||||
|
||||
typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
|
||||
int pasid,
|
||||
unsigned long address,
|
||||
u16);
|
||||
|
||||
extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
|
||||
amd_iommu_invalid_ppr_cb cb);
|
||||
|
||||
/**
|
||||
* amd_iommu_device_info() - Get information about IOMMUv2 support of a
|
||||
* PCI device
|
||||
* @pdev: PCI device to query information from
|
||||
* @info: A pointer to an amd_iommu_device_info structure which will contain
|
||||
* the information about the PCI device
|
||||
*
|
||||
* Returns 0 on success, negative value on error
|
||||
*/
|
||||
|
||||
#define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
|
||||
#define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
|
||||
#define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
|
||||
#define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
|
||||
on memory pages */
|
||||
#define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
|
||||
super-user privileges */
|
||||
|
||||
struct amd_iommu_device_info {
|
||||
int max_pasids;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
extern int amd_iommu_device_info(struct pci_dev *pdev,
|
||||
struct amd_iommu_device_info *info);
|
||||
|
||||
/**
|
||||
* amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
|
||||
* a pasid context. This call-back is
|
||||
* invoked when the IOMMUv2 driver needs to
|
||||
* invalidate a PASID context, for example
|
||||
* because the task that is bound to that
|
||||
* context is about to exit.
|
||||
*
|
||||
* @pdev: The PCI device the call-back should be registered for
|
||||
* @cb: The call-back function
|
||||
*/
|
||||
|
||||
typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
|
||||
|
||||
extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
|
||||
amd_iommu_invalidate_ctx cb);
|
||||
|
||||
#else
|
||||
|
||||
static inline int amd_iommu_detect(void) { return -ENODEV; }
|
||||
|
||||
@@ -27,10 +27,7 @@ extern int __devexit __pata_platform_remove(struct device *dev);
|
||||
/*
|
||||
* Marvell SATA private data
|
||||
*/
|
||||
struct mbus_dram_target_info;
|
||||
|
||||
struct mv_sata_platform_data {
|
||||
struct mbus_dram_target_info *dram;
|
||||
int n_ports; /* number of sata ports */
|
||||
};
|
||||
|
||||
|
||||
@@ -445,16 +445,6 @@ void vcc_insert_socket(struct sock *sk);
|
||||
|
||||
void atm_dev_release_vccs(struct atm_dev *dev);
|
||||
|
||||
/*
|
||||
* This is approximately the algorithm used by alloc_skb.
|
||||
*
|
||||
*/
|
||||
|
||||
static inline int atm_guess_pdu2truesize(int size)
|
||||
{
|
||||
return SKB_DATA_ALIGN(size) + sizeof(struct skb_shared_info);
|
||||
}
|
||||
|
||||
|
||||
static inline void atm_force_charge(struct atm_vcc *vcc,int truesize)
|
||||
{
|
||||
|
||||
@@ -26,6 +26,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/elf-em.h>
|
||||
#include <linux/ptrace.h>
|
||||
|
||||
/* The netlink messages for the audit system is divided into blocks:
|
||||
* 1000 - 1099 are for commanding the audit system
|
||||
@@ -181,6 +182,40 @@
|
||||
* AUDIT_UNUSED_BITS is updated if need be. */
|
||||
#define AUDIT_UNUSED_BITS 0x07FFFC00
|
||||
|
||||
/* AUDIT_FIELD_COMPARE rule list */
|
||||
#define AUDIT_COMPARE_UID_TO_OBJ_UID 1
|
||||
#define AUDIT_COMPARE_GID_TO_OBJ_GID 2
|
||||
#define AUDIT_COMPARE_EUID_TO_OBJ_UID 3
|
||||
#define AUDIT_COMPARE_EGID_TO_OBJ_GID 4
|
||||
#define AUDIT_COMPARE_AUID_TO_OBJ_UID 5
|
||||
#define AUDIT_COMPARE_SUID_TO_OBJ_UID 6
|
||||
#define AUDIT_COMPARE_SGID_TO_OBJ_GID 7
|
||||
#define AUDIT_COMPARE_FSUID_TO_OBJ_UID 8
|
||||
#define AUDIT_COMPARE_FSGID_TO_OBJ_GID 9
|
||||
|
||||
#define AUDIT_COMPARE_UID_TO_AUID 10
|
||||
#define AUDIT_COMPARE_UID_TO_EUID 11
|
||||
#define AUDIT_COMPARE_UID_TO_FSUID 12
|
||||
#define AUDIT_COMPARE_UID_TO_SUID 13
|
||||
|
||||
#define AUDIT_COMPARE_AUID_TO_FSUID 14
|
||||
#define AUDIT_COMPARE_AUID_TO_SUID 15
|
||||
#define AUDIT_COMPARE_AUID_TO_EUID 16
|
||||
|
||||
#define AUDIT_COMPARE_EUID_TO_SUID 17
|
||||
#define AUDIT_COMPARE_EUID_TO_FSUID 18
|
||||
|
||||
#define AUDIT_COMPARE_SUID_TO_FSUID 19
|
||||
|
||||
#define AUDIT_COMPARE_GID_TO_EGID 20
|
||||
#define AUDIT_COMPARE_GID_TO_FSGID 21
|
||||
#define AUDIT_COMPARE_GID_TO_SGID 22
|
||||
|
||||
#define AUDIT_COMPARE_EGID_TO_FSGID 23
|
||||
#define AUDIT_COMPARE_EGID_TO_SGID 24
|
||||
#define AUDIT_COMPARE_SGID_TO_FSGID 25
|
||||
|
||||
#define AUDIT_MAX_FIELD_COMPARE AUDIT_COMPARE_SGID_TO_FSGID
|
||||
|
||||
/* Rule fields */
|
||||
/* These are useful when checking the
|
||||
@@ -222,6 +257,9 @@
|
||||
#define AUDIT_PERM 106
|
||||
#define AUDIT_DIR 107
|
||||
#define AUDIT_FILETYPE 108
|
||||
#define AUDIT_OBJ_UID 109
|
||||
#define AUDIT_OBJ_GID 110
|
||||
#define AUDIT_FIELD_COMPARE 111
|
||||
|
||||
#define AUDIT_ARG0 200
|
||||
#define AUDIT_ARG1 (AUDIT_ARG0+1)
|
||||
@@ -408,28 +446,24 @@ struct audit_field {
|
||||
void *lsm_rule;
|
||||
};
|
||||
|
||||
#define AUDITSC_INVALID 0
|
||||
#define AUDITSC_SUCCESS 1
|
||||
#define AUDITSC_FAILURE 2
|
||||
#define AUDITSC_RESULT(x) ( ((long)(x))<0?AUDITSC_FAILURE:AUDITSC_SUCCESS )
|
||||
extern int __init audit_register_class(int class, unsigned *list);
|
||||
extern int audit_classify_syscall(int abi, unsigned syscall);
|
||||
extern int audit_classify_arch(int arch);
|
||||
#ifdef CONFIG_AUDITSYSCALL
|
||||
/* These are defined in auditsc.c */
|
||||
/* Public API */
|
||||
extern void audit_finish_fork(struct task_struct *child);
|
||||
extern int audit_alloc(struct task_struct *task);
|
||||
extern void audit_free(struct task_struct *task);
|
||||
extern void audit_syscall_entry(int arch,
|
||||
int major, unsigned long a0, unsigned long a1,
|
||||
unsigned long a2, unsigned long a3);
|
||||
extern void audit_syscall_exit(int failed, long return_code);
|
||||
extern void __audit_free(struct task_struct *task);
|
||||
extern void __audit_syscall_entry(int arch,
|
||||
int major, unsigned long a0, unsigned long a1,
|
||||
unsigned long a2, unsigned long a3);
|
||||
extern void __audit_syscall_exit(int ret_success, long ret_value);
|
||||
extern void __audit_getname(const char *name);
|
||||
extern void audit_putname(const char *name);
|
||||
extern void __audit_inode(const char *name, const struct dentry *dentry);
|
||||
extern void __audit_inode_child(const struct dentry *dentry,
|
||||
const struct inode *parent);
|
||||
extern void __audit_seccomp(unsigned long syscall);
|
||||
extern void __audit_ptrace(struct task_struct *t);
|
||||
|
||||
static inline int audit_dummy_context(void)
|
||||
@@ -437,6 +471,27 @@ static inline int audit_dummy_context(void)
|
||||
void *p = current->audit_context;
|
||||
return !p || *(int *)p;
|
||||
}
|
||||
static inline void audit_free(struct task_struct *task)
|
||||
{
|
||||
if (unlikely(task->audit_context))
|
||||
__audit_free(task);
|
||||
}
|
||||
static inline void audit_syscall_entry(int arch, int major, unsigned long a0,
|
||||
unsigned long a1, unsigned long a2,
|
||||
unsigned long a3)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_syscall_entry(arch, major, a0, a1, a2, a3);
|
||||
}
|
||||
static inline void audit_syscall_exit(void *pt_regs)
|
||||
{
|
||||
if (unlikely(current->audit_context)) {
|
||||
int success = is_syscall_success(pt_regs);
|
||||
int return_code = regs_return_value(pt_regs);
|
||||
|
||||
__audit_syscall_exit(success, return_code);
|
||||
}
|
||||
}
|
||||
static inline void audit_getname(const char *name)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
@@ -453,6 +508,12 @@ static inline void audit_inode_child(const struct dentry *dentry,
|
||||
}
|
||||
void audit_core_dumps(long signr);
|
||||
|
||||
static inline void audit_seccomp(unsigned long syscall)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_seccomp(syscall);
|
||||
}
|
||||
|
||||
static inline void audit_ptrace(struct task_struct *t)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
@@ -463,18 +524,17 @@ static inline void audit_ptrace(struct task_struct *t)
|
||||
extern unsigned int audit_serial(void);
|
||||
extern int auditsc_get_stamp(struct audit_context *ctx,
|
||||
struct timespec *t, unsigned int *serial);
|
||||
extern int audit_set_loginuid(struct task_struct *task, uid_t loginuid);
|
||||
extern int audit_set_loginuid(uid_t loginuid);
|
||||
#define audit_get_loginuid(t) ((t)->loginuid)
|
||||
#define audit_get_sessionid(t) ((t)->sessionid)
|
||||
extern void audit_log_task_context(struct audit_buffer *ab);
|
||||
extern void __audit_ipc_obj(struct kern_ipc_perm *ipcp);
|
||||
extern void __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mode);
|
||||
extern int audit_bprm(struct linux_binprm *bprm);
|
||||
extern void audit_socketcall(int nargs, unsigned long *args);
|
||||
extern int audit_sockaddr(int len, void *addr);
|
||||
extern void __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode);
|
||||
extern int __audit_bprm(struct linux_binprm *bprm);
|
||||
extern void __audit_socketcall(int nargs, unsigned long *args);
|
||||
extern int __audit_sockaddr(int len, void *addr);
|
||||
extern void __audit_fd_pair(int fd1, int fd2);
|
||||
extern int audit_set_macxattr(const char *name);
|
||||
extern void __audit_mq_open(int oflag, mode_t mode, struct mq_attr *attr);
|
||||
extern void __audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr);
|
||||
extern void __audit_mq_sendrecv(mqd_t mqdes, size_t msg_len, unsigned int msg_prio, const struct timespec *abs_timeout);
|
||||
extern void __audit_mq_notify(mqd_t mqdes, const struct sigevent *notification);
|
||||
extern void __audit_mq_getsetattr(mqd_t mqdes, struct mq_attr *mqstat);
|
||||
@@ -494,12 +554,29 @@ static inline void audit_fd_pair(int fd1, int fd2)
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_fd_pair(fd1, fd2);
|
||||
}
|
||||
static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mode)
|
||||
static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_ipc_set_perm(qbytes, uid, gid, mode);
|
||||
}
|
||||
static inline void audit_mq_open(int oflag, mode_t mode, struct mq_attr *attr)
|
||||
static inline int audit_bprm(struct linux_binprm *bprm)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
return __audit_bprm(bprm);
|
||||
return 0;
|
||||
}
|
||||
static inline void audit_socketcall(int nargs, unsigned long *args)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_socketcall(nargs, args);
|
||||
}
|
||||
static inline int audit_sockaddr(int len, void *addr)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
return __audit_sockaddr(len, addr);
|
||||
return 0;
|
||||
}
|
||||
static inline void audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_mq_open(oflag, mode, attr);
|
||||
@@ -544,12 +621,11 @@ static inline void audit_mmap_fd(int fd, int flags)
|
||||
|
||||
extern int audit_n_rules;
|
||||
extern int audit_signals;
|
||||
#else
|
||||
#define audit_finish_fork(t)
|
||||
#else /* CONFIG_AUDITSYSCALL */
|
||||
#define audit_alloc(t) ({ 0; })
|
||||
#define audit_free(t) do { ; } while (0)
|
||||
#define audit_syscall_entry(ta,a,b,c,d,e) do { ; } while (0)
|
||||
#define audit_syscall_exit(f,r) do { ; } while (0)
|
||||
#define audit_syscall_exit(r) do { ; } while (0)
|
||||
#define audit_dummy_context() 1
|
||||
#define audit_getname(n) do { ; } while (0)
|
||||
#define audit_putname(n) do { ; } while (0)
|
||||
@@ -558,6 +634,7 @@ extern int audit_signals;
|
||||
#define audit_inode(n,d) do { (void)(d); } while (0)
|
||||
#define audit_inode_child(i,p) do { ; } while (0)
|
||||
#define audit_core_dumps(i) do { ; } while (0)
|
||||
#define audit_seccomp(i) do { ; } while (0)
|
||||
#define auditsc_get_stamp(c,t,s) (0)
|
||||
#define audit_get_loginuid(t) (-1)
|
||||
#define audit_get_sessionid(t) (-1)
|
||||
@@ -568,7 +645,6 @@ extern int audit_signals;
|
||||
#define audit_socketcall(n,a) ((void)0)
|
||||
#define audit_fd_pair(n,a) ((void)0)
|
||||
#define audit_sockaddr(len, addr) ({ 0; })
|
||||
#define audit_set_macxattr(n) do { ; } while (0)
|
||||
#define audit_mq_open(o,m,a) ((void)0)
|
||||
#define audit_mq_sendrecv(d,l,p,t) ((void)0)
|
||||
#define audit_mq_notify(d,n) ((void)0)
|
||||
@@ -579,7 +655,7 @@ extern int audit_signals;
|
||||
#define audit_ptrace(t) ((void)0)
|
||||
#define audit_n_rules 0
|
||||
#define audit_signals 0
|
||||
#endif
|
||||
#endif /* CONFIG_AUDITSYSCALL */
|
||||
|
||||
#ifdef CONFIG_AUDIT
|
||||
/* These are defined in audit.c */
|
||||
|
||||
@@ -162,7 +162,7 @@ struct bcma_driver {
|
||||
|
||||
int (*probe)(struct bcma_device *dev);
|
||||
void (*remove)(struct bcma_device *dev);
|
||||
int (*suspend)(struct bcma_device *dev, pm_message_t state);
|
||||
int (*suspend)(struct bcma_device *dev);
|
||||
int (*resume)(struct bcma_device *dev);
|
||||
void (*shutdown)(struct bcma_device *dev);
|
||||
|
||||
@@ -205,61 +205,82 @@ struct bcma_bus {
|
||||
struct ssb_sprom sprom;
|
||||
};
|
||||
|
||||
extern inline u32 bcma_read8(struct bcma_device *core, u16 offset)
|
||||
static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
|
||||
{
|
||||
return core->bus->ops->read8(core, offset);
|
||||
}
|
||||
extern inline u32 bcma_read16(struct bcma_device *core, u16 offset)
|
||||
static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
|
||||
{
|
||||
return core->bus->ops->read16(core, offset);
|
||||
}
|
||||
extern inline u32 bcma_read32(struct bcma_device *core, u16 offset)
|
||||
static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
|
||||
{
|
||||
return core->bus->ops->read32(core, offset);
|
||||
}
|
||||
extern inline
|
||||
static inline
|
||||
void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
|
||||
{
|
||||
core->bus->ops->write8(core, offset, value);
|
||||
}
|
||||
extern inline
|
||||
static inline
|
||||
void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
|
||||
{
|
||||
core->bus->ops->write16(core, offset, value);
|
||||
}
|
||||
extern inline
|
||||
static inline
|
||||
void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
|
||||
{
|
||||
core->bus->ops->write32(core, offset, value);
|
||||
}
|
||||
#ifdef CONFIG_BCMA_BLOCKIO
|
||||
extern inline void bcma_block_read(struct bcma_device *core, void *buffer,
|
||||
static inline void bcma_block_read(struct bcma_device *core, void *buffer,
|
||||
size_t count, u16 offset, u8 reg_width)
|
||||
{
|
||||
core->bus->ops->block_read(core, buffer, count, offset, reg_width);
|
||||
}
|
||||
extern inline void bcma_block_write(struct bcma_device *core, const void *buffer,
|
||||
size_t count, u16 offset, u8 reg_width)
|
||||
static inline void bcma_block_write(struct bcma_device *core,
|
||||
const void *buffer, size_t count,
|
||||
u16 offset, u8 reg_width)
|
||||
{
|
||||
core->bus->ops->block_write(core, buffer, count, offset, reg_width);
|
||||
}
|
||||
#endif
|
||||
extern inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
|
||||
static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
|
||||
{
|
||||
return core->bus->ops->aread32(core, offset);
|
||||
}
|
||||
extern inline
|
||||
static inline
|
||||
void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
|
||||
{
|
||||
core->bus->ops->awrite32(core, offset, value);
|
||||
}
|
||||
|
||||
#define bcma_mask32(cc, offset, mask) \
|
||||
bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask))
|
||||
#define bcma_set32(cc, offset, set) \
|
||||
bcma_write32(cc, offset, bcma_read32(cc, offset) | (set))
|
||||
#define bcma_maskset32(cc, offset, mask, set) \
|
||||
bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set))
|
||||
static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
|
||||
{
|
||||
bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
|
||||
}
|
||||
static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
|
||||
{
|
||||
bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
|
||||
}
|
||||
static inline void bcma_maskset32(struct bcma_device *cc,
|
||||
u16 offset, u32 mask, u32 set)
|
||||
{
|
||||
bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
|
||||
}
|
||||
static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
|
||||
{
|
||||
bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
|
||||
}
|
||||
static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
|
||||
{
|
||||
bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
|
||||
}
|
||||
static inline void bcma_maskset16(struct bcma_device *cc,
|
||||
u16 offset, u16 mask, u16 set)
|
||||
{
|
||||
bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
|
||||
}
|
||||
|
||||
extern bool bcma_core_is_enabled(struct bcma_device *core);
|
||||
extern void bcma_core_disable(struct bcma_device *core, u32 flags);
|
||||
|
||||
@@ -203,6 +203,7 @@
|
||||
#define BCMA_CC_PMU_CTL 0x0600 /* PMU control */
|
||||
#define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
|
||||
#define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16
|
||||
#define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400
|
||||
#define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
|
||||
#define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
|
||||
#define BCMA_CC_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */
|
||||
|
||||
@@ -515,24 +515,64 @@ extern void bio_integrity_init(void);
|
||||
|
||||
#else /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
#define bio_integrity(a) (0)
|
||||
#define bioset_integrity_create(a, b) (0)
|
||||
#define bio_integrity_prep(a) (0)
|
||||
#define bio_integrity_enabled(a) (0)
|
||||
static inline int bio_integrity(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_enabled(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int bioset_integrity_create(struct bio_set *bs, int pool_size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void bioset_integrity_free (struct bio_set *bs)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_prep(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_free(struct bio *bio, struct bio_set *bs)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_clone(struct bio *bio, struct bio *bio_src,
|
||||
gfp_t gfp_mask, struct bio_set *bs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#define bioset_integrity_free(a) do { } while (0)
|
||||
#define bio_integrity_free(a, b) do { } while (0)
|
||||
#define bio_integrity_endio(a, b) do { } while (0)
|
||||
#define bio_integrity_advance(a, b) do { } while (0)
|
||||
#define bio_integrity_trim(a, b, c) do { } while (0)
|
||||
#define bio_integrity_split(a, b, c) do { } while (0)
|
||||
#define bio_integrity_set_tag(a, b, c) do { } while (0)
|
||||
#define bio_integrity_get_tag(a, b, c) do { } while (0)
|
||||
#define bio_integrity_init(a) do { } while (0)
|
||||
|
||||
static inline void bio_integrity_split(struct bio *bio, struct bio_pair *bp,
|
||||
int sectors)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_advance(struct bio *bio,
|
||||
unsigned int bytes_done)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_trim(struct bio *bio, unsigned int offset,
|
||||
unsigned int sectors)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_init(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
|
||||
@@ -22,8 +22,14 @@ extern unsigned long __sw_hweight64(__u64 w);
|
||||
#include <asm/bitops.h>
|
||||
|
||||
#define for_each_set_bit(bit, addr, size) \
|
||||
for ((bit) = find_first_bit((addr), (size)); \
|
||||
(bit) < (size); \
|
||||
for ((bit) = find_first_bit((addr), (size)); \
|
||||
(bit) < (size); \
|
||||
(bit) = find_next_bit((addr), (size), (bit) + 1))
|
||||
|
||||
/* same as for_each_set_bit() but use bit as value to start with */
|
||||
#define for_each_set_bit_cont(bit, addr, size) \
|
||||
for ((bit) = find_next_bit((addr), (size), (bit)); \
|
||||
(bit) < (size); \
|
||||
(bit) = find_next_bit((addr), (size), (bit) + 1))
|
||||
|
||||
static __inline__ int get_bitmask_order(unsigned int count)
|
||||
|
||||
@@ -111,10 +111,14 @@ struct request {
|
||||
* Three pointers are available for the IO schedulers, if they need
|
||||
* more they have to dynamically allocate it. Flush requests are
|
||||
* never put on the IO scheduler. So let the flush fields share
|
||||
* space with the three elevator_private pointers.
|
||||
* space with the elevator data.
|
||||
*/
|
||||
union {
|
||||
void *elevator_private[3];
|
||||
struct {
|
||||
struct io_cq *icq;
|
||||
void *priv[2];
|
||||
} elv;
|
||||
|
||||
struct {
|
||||
unsigned int seq;
|
||||
struct list_head list;
|
||||
@@ -310,6 +314,12 @@ struct request_queue {
|
||||
*/
|
||||
unsigned long queue_flags;
|
||||
|
||||
/*
|
||||
* ida allocated id for this queue. Used to index queues from
|
||||
* ioctx.
|
||||
*/
|
||||
int id;
|
||||
|
||||
/*
|
||||
* queue needs bounce pages for pages above this limit
|
||||
*/
|
||||
@@ -351,6 +361,8 @@ struct request_queue {
|
||||
struct timer_list timeout;
|
||||
struct list_head timeout_list;
|
||||
|
||||
struct list_head icq_list;
|
||||
|
||||
struct queue_limits limits;
|
||||
|
||||
/*
|
||||
@@ -387,6 +399,9 @@ struct request_queue {
|
||||
/* Throttle data */
|
||||
struct throtl_data *td;
|
||||
#endif
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
int ioc_release_depth;
|
||||
#endif
|
||||
};
|
||||
|
||||
#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
|
||||
@@ -481,6 +496,7 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
|
||||
|
||||
#define blk_queue_tagged(q) test_bit(QUEUE_FLAG_QUEUED, &(q)->queue_flags)
|
||||
#define blk_queue_stopped(q) test_bit(QUEUE_FLAG_STOPPED, &(q)->queue_flags)
|
||||
#define blk_queue_dead(q) test_bit(QUEUE_FLAG_DEAD, &(q)->queue_flags)
|
||||
#define blk_queue_nomerges(q) test_bit(QUEUE_FLAG_NOMERGES, &(q)->queue_flags)
|
||||
#define blk_queue_noxmerges(q) \
|
||||
test_bit(QUEUE_FLAG_NOXMERGES, &(q)->queue_flags)
|
||||
@@ -660,7 +676,6 @@ extern void __blk_put_request(struct request_queue *, struct request *);
|
||||
extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
|
||||
extern struct request *blk_make_request(struct request_queue *, struct bio *,
|
||||
gfp_t);
|
||||
extern void blk_insert_request(struct request_queue *, struct request *, int, void *);
|
||||
extern void blk_requeue_request(struct request_queue *, struct request *);
|
||||
extern void blk_add_request_payload(struct request *rq, struct page *page,
|
||||
unsigned int len);
|
||||
@@ -675,6 +690,9 @@ extern int blk_insert_cloned_request(struct request_queue *q,
|
||||
struct request *rq);
|
||||
extern void blk_delay_queue(struct request_queue *, unsigned long);
|
||||
extern void blk_recount_segments(struct request_queue *, struct bio *);
|
||||
extern int scsi_verify_blk_ioctl(struct block_device *, unsigned int);
|
||||
extern int scsi_cmd_blk_ioctl(struct block_device *, fmode_t,
|
||||
unsigned int, void __user *);
|
||||
extern int scsi_cmd_ioctl(struct request_queue *, struct gendisk *, fmode_t,
|
||||
unsigned int, void __user *);
|
||||
extern int sg_scsi_ioctl(struct request_queue *, struct gendisk *, fmode_t,
|
||||
@@ -805,9 +823,6 @@ extern void blk_unprep_request(struct request *);
|
||||
*/
|
||||
extern struct request_queue *blk_init_queue_node(request_fn_proc *rfn,
|
||||
spinlock_t *lock, int node_id);
|
||||
extern struct request_queue *blk_init_allocated_queue_node(struct request_queue *,
|
||||
request_fn_proc *,
|
||||
spinlock_t *, int node_id);
|
||||
extern struct request_queue *blk_init_queue(request_fn_proc *, spinlock_t *);
|
||||
extern struct request_queue *blk_init_allocated_queue(struct request_queue *,
|
||||
request_fn_proc *, spinlock_t *);
|
||||
@@ -829,6 +844,7 @@ extern void blk_queue_io_min(struct request_queue *q, unsigned int min);
|
||||
extern void blk_limits_io_opt(struct queue_limits *limits, unsigned int opt);
|
||||
extern void blk_queue_io_opt(struct request_queue *q, unsigned int opt);
|
||||
extern void blk_set_default_limits(struct queue_limits *lim);
|
||||
extern void blk_set_stacking_limits(struct queue_limits *lim);
|
||||
extern int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
|
||||
sector_t offset);
|
||||
extern int bdev_stack_limits(struct queue_limits *t, struct block_device *bdev,
|
||||
@@ -859,7 +875,7 @@ extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatte
|
||||
extern void blk_dump_rq_flags(struct request *, char *);
|
||||
extern long nr_blockdev_pages(void);
|
||||
|
||||
int blk_get_queue(struct request_queue *);
|
||||
bool __must_check blk_get_queue(struct request_queue *);
|
||||
struct request_queue *blk_alloc_queue(gfp_t);
|
||||
struct request_queue *blk_alloc_queue_node(gfp_t, int);
|
||||
extern void blk_put_queue(struct request_queue *);
|
||||
@@ -1282,19 +1298,70 @@ queue_max_integrity_segments(struct request_queue *q)
|
||||
|
||||
#else /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
#define blk_integrity_rq(rq) (0)
|
||||
#define blk_rq_count_integrity_sg(a, b) (0)
|
||||
#define blk_rq_map_integrity_sg(a, b, c) (0)
|
||||
#define bdev_get_integrity(a) (0)
|
||||
#define blk_get_integrity(a) (0)
|
||||
#define blk_integrity_compare(a, b) (0)
|
||||
#define blk_integrity_register(a, b) (0)
|
||||
#define blk_integrity_unregister(a) do { } while (0)
|
||||
#define blk_queue_max_integrity_segments(a, b) do { } while (0)
|
||||
#define queue_max_integrity_segments(a) (0)
|
||||
#define blk_integrity_merge_rq(a, b, c) (0)
|
||||
#define blk_integrity_merge_bio(a, b, c) (0)
|
||||
#define blk_integrity_is_initialized(a) (0)
|
||||
struct bio;
|
||||
struct block_device;
|
||||
struct gendisk;
|
||||
struct blk_integrity;
|
||||
|
||||
static inline int blk_integrity_rq(struct request *rq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_rq_count_integrity_sg(struct request_queue *q,
|
||||
struct bio *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_rq_map_integrity_sg(struct request_queue *q,
|
||||
struct bio *b,
|
||||
struct scatterlist *s)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline struct blk_integrity *bdev_get_integrity(struct block_device *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline struct blk_integrity *blk_get_integrity(struct gendisk *disk)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline int blk_integrity_compare(struct gendisk *a, struct gendisk *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_register(struct gendisk *d,
|
||||
struct blk_integrity *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline void blk_integrity_unregister(struct gendisk *d)
|
||||
{
|
||||
}
|
||||
static inline void blk_queue_max_integrity_segments(struct request_queue *q,
|
||||
unsigned int segs)
|
||||
{
|
||||
}
|
||||
static inline unsigned short queue_max_integrity_segments(struct request_queue *q)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_merge_rq(struct request_queue *rq,
|
||||
struct request *r1,
|
||||
struct request *r2)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_merge_bio(struct request_queue *rq,
|
||||
struct request *r,
|
||||
struct bio *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline bool blk_integrity_is_initialized(struct gendisk *g)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
|
||||
@@ -44,7 +44,7 @@ extern unsigned long init_bootmem_node(pg_data_t *pgdat,
|
||||
unsigned long endpfn);
|
||||
extern unsigned long init_bootmem(unsigned long addr, unsigned long memend);
|
||||
|
||||
unsigned long free_all_memory_core_early(int nodeid);
|
||||
extern unsigned long free_low_memory_core_early(int nodeid);
|
||||
extern unsigned long free_all_bootmem_node(pg_data_t *pgdat);
|
||||
extern unsigned long free_all_bootmem(void);
|
||||
|
||||
|
||||
33
include/linux/can/platform/cc770.h
Normal file
33
include/linux/can/platform/cc770.h
Normal file
@@ -0,0 +1,33 @@
|
||||
#ifndef _CAN_PLATFORM_CC770_H_
|
||||
#define _CAN_PLATFORM_CC770_H_
|
||||
|
||||
/* CPU Interface Register (0x02) */
|
||||
#define CPUIF_CEN 0x01 /* Clock Out Enable */
|
||||
#define CPUIF_MUX 0x04 /* Multiplex */
|
||||
#define CPUIF_SLP 0x08 /* Sleep */
|
||||
#define CPUIF_PWD 0x10 /* Power Down Mode */
|
||||
#define CPUIF_DMC 0x20 /* Divide Memory Clock */
|
||||
#define CPUIF_DSC 0x40 /* Divide System Clock */
|
||||
#define CPUIF_RST 0x80 /* Hardware Reset Status */
|
||||
|
||||
/* Clock Out Register (0x1f) */
|
||||
#define CLKOUT_CD_MASK 0x0f /* Clock Divider mask */
|
||||
#define CLKOUT_SL_MASK 0x30 /* Slew Rate mask */
|
||||
#define CLKOUT_SL_SHIFT 4
|
||||
|
||||
/* Bus Configuration Register (0x2f) */
|
||||
#define BUSCFG_DR0 0x01 /* Disconnect RX0 Input / Select RX input */
|
||||
#define BUSCFG_DR1 0x02 /* Disconnect RX1 Input / Silent mode */
|
||||
#define BUSCFG_DT1 0x08 /* Disconnect TX1 Output */
|
||||
#define BUSCFG_POL 0x20 /* Polarity dominant or recessive */
|
||||
#define BUSCFG_CBY 0x40 /* Input Comparator Bypass */
|
||||
|
||||
struct cc770_platform_data {
|
||||
u32 osc_freq; /* CAN bus oscillator frequency in Hz */
|
||||
|
||||
u8 cir; /* CPU Interface Register */
|
||||
u8 cor; /* Clock Out Register */
|
||||
u8 bcr; /* Bus Configuration Register */
|
||||
};
|
||||
|
||||
#endif /* !_CAN_PLATFORM_CC770_H_ */
|
||||
@@ -380,7 +380,6 @@ struct user_namespace;
|
||||
struct user_namespace *current_user_ns(void);
|
||||
|
||||
extern const kernel_cap_t __cap_empty_set;
|
||||
extern const kernel_cap_t __cap_full_set;
|
||||
extern const kernel_cap_t __cap_init_eff_set;
|
||||
|
||||
/*
|
||||
@@ -544,9 +543,10 @@ extern bool has_capability(struct task_struct *t, int cap);
|
||||
extern bool has_ns_capability(struct task_struct *t,
|
||||
struct user_namespace *ns, int cap);
|
||||
extern bool has_capability_noaudit(struct task_struct *t, int cap);
|
||||
extern bool has_ns_capability_noaudit(struct task_struct *t,
|
||||
struct user_namespace *ns, int cap);
|
||||
extern bool capable(int cap);
|
||||
extern bool ns_capable(struct user_namespace *ns, int cap);
|
||||
extern bool task_ns_capable(struct task_struct *t, int cap);
|
||||
extern bool nsown_capable(int cap);
|
||||
|
||||
/* audit system wants to get cap info from files as well */
|
||||
|
||||
@@ -319,7 +319,7 @@ struct cftype {
|
||||
* If not 0, file mode is set to this value, otherwise it will
|
||||
* be figured out automatically
|
||||
*/
|
||||
mode_t mode;
|
||||
umode_t mode;
|
||||
|
||||
/*
|
||||
* If non-zero, defines the maximum length of string that can
|
||||
@@ -456,6 +456,28 @@ int cgroup_is_descendant(const struct cgroup *cgrp, struct task_struct *task);
|
||||
void cgroup_exclude_rmdir(struct cgroup_subsys_state *css);
|
||||
void cgroup_release_and_wakeup_rmdir(struct cgroup_subsys_state *css);
|
||||
|
||||
/*
|
||||
* Control Group taskset, used to pass around set of tasks to cgroup_subsys
|
||||
* methods.
|
||||
*/
|
||||
struct cgroup_taskset;
|
||||
struct task_struct *cgroup_taskset_first(struct cgroup_taskset *tset);
|
||||
struct task_struct *cgroup_taskset_next(struct cgroup_taskset *tset);
|
||||
struct cgroup *cgroup_taskset_cur_cgroup(struct cgroup_taskset *tset);
|
||||
int cgroup_taskset_size(struct cgroup_taskset *tset);
|
||||
|
||||
/**
|
||||
* cgroup_taskset_for_each - iterate cgroup_taskset
|
||||
* @task: the loop cursor
|
||||
* @skip_cgrp: skip if task's cgroup matches this, %NULL to iterate through all
|
||||
* @tset: taskset to iterate
|
||||
*/
|
||||
#define cgroup_taskset_for_each(task, skip_cgrp, tset) \
|
||||
for ((task) = cgroup_taskset_first((tset)); (task); \
|
||||
(task) = cgroup_taskset_next((tset))) \
|
||||
if (!(skip_cgrp) || \
|
||||
cgroup_taskset_cur_cgroup((tset)) != (skip_cgrp))
|
||||
|
||||
/*
|
||||
* Control Group subsystem type.
|
||||
* See Documentation/cgroups/cgroups.txt for details
|
||||
@@ -467,14 +489,11 @@ struct cgroup_subsys {
|
||||
int (*pre_destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
|
||||
void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
|
||||
int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||
struct task_struct *tsk);
|
||||
int (*can_attach_task)(struct cgroup *cgrp, struct task_struct *tsk);
|
||||
struct cgroup_taskset *tset);
|
||||
void (*cancel_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||
struct task_struct *tsk);
|
||||
void (*pre_attach)(struct cgroup *cgrp);
|
||||
void (*attach_task)(struct cgroup *cgrp, struct task_struct *tsk);
|
||||
struct cgroup_taskset *tset);
|
||||
void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||
struct cgroup *old_cgrp, struct task_struct *tsk);
|
||||
struct cgroup_taskset *tset);
|
||||
void (*fork)(struct cgroup_subsys *ss, struct task_struct *task);
|
||||
void (*exit)(struct cgroup_subsys *ss, struct cgroup *cgrp,
|
||||
struct cgroup *old_cgrp, struct task_struct *task);
|
||||
|
||||
@@ -59,8 +59,16 @@ SUBSYS(net_cls)
|
||||
SUBSYS(blkio)
|
||||
#endif
|
||||
|
||||
/* */
|
||||
|
||||
#ifdef CONFIG_CGROUP_PERF
|
||||
SUBSYS(perf)
|
||||
#endif
|
||||
|
||||
/* */
|
||||
|
||||
#ifdef CONFIG_NETPRIO_CGROUP
|
||||
SUBSYS(net_prio)
|
||||
#endif
|
||||
|
||||
/* */
|
||||
|
||||
@@ -107,6 +107,28 @@ static inline void clk_unprepare(struct clk *clk)
|
||||
}
|
||||
#endif
|
||||
|
||||
/* clk_prepare_enable helps cases using clk_enable in non-atomic context. */
|
||||
static inline int clk_prepare_enable(struct clk *clk)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = clk_prepare(clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = clk_enable(clk);
|
||||
if (ret)
|
||||
clk_unprepare(clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* clk_disable_unprepare helps cases using clk_disable in non-atomic context. */
|
||||
static inline void clk_disable_unprepare(struct clk *clk)
|
||||
{
|
||||
clk_disable(clk);
|
||||
clk_unprepare(clk);
|
||||
}
|
||||
|
||||
/**
|
||||
* clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
|
||||
* This is only valid once the clock source has been enabled.
|
||||
|
||||
@@ -71,7 +71,7 @@ struct timecounter {
|
||||
|
||||
/**
|
||||
* cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds
|
||||
* @tc: Pointer to cycle counter.
|
||||
* @cc: Pointer to cycle counter.
|
||||
* @cycles: Cycles
|
||||
*
|
||||
* XXX - This could use some mult_lxl_ll() asm optimization. Same code
|
||||
@@ -114,7 +114,7 @@ extern u64 timecounter_read(struct timecounter *tc);
|
||||
* time base as values returned by
|
||||
* timecounter_read()
|
||||
* @tc: Pointer to time counter.
|
||||
* @cycle: a value returned by tc->cc->read()
|
||||
* @cycle_tstamp: a value returned by tc->cc->read()
|
||||
*
|
||||
* Cycle counts that are converted correctly as long as they
|
||||
* fall into the interval [-1/2 max cycle count, +1/2 max cycle count],
|
||||
@@ -156,10 +156,12 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
|
||||
* @mult: cycle to nanosecond multiplier
|
||||
* @shift: cycle to nanosecond divisor (power of two)
|
||||
* @max_idle_ns: max idle time permitted by the clocksource (nsecs)
|
||||
* @maxadj: maximum adjustment value to mult (~11%)
|
||||
* @flags: flags describing special properties
|
||||
* @archdata: arch-specific data
|
||||
* @suspend: suspend function for the clocksource, if necessary
|
||||
* @resume: resume function for the clocksource, if necessary
|
||||
* @cycle_last: most recent cycle counter value seen by ::read()
|
||||
*/
|
||||
struct clocksource {
|
||||
/*
|
||||
@@ -172,7 +174,7 @@ struct clocksource {
|
||||
u32 mult;
|
||||
u32 shift;
|
||||
u64 max_idle_ns;
|
||||
|
||||
u32 maxadj;
|
||||
#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
|
||||
struct arch_clocksource_data archdata;
|
||||
#endif
|
||||
@@ -186,6 +188,7 @@ struct clocksource {
|
||||
void (*suspend)(struct clocksource *cs);
|
||||
void (*resume)(struct clocksource *cs);
|
||||
|
||||
/* private: */
|
||||
#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
|
||||
/* Watchdog related data, used by the framework */
|
||||
struct list_head wd_list;
|
||||
@@ -260,6 +263,9 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant)
|
||||
|
||||
/**
|
||||
* clocksource_cyc2ns - converts clocksource cycles to nanoseconds
|
||||
* @cycles: cycles
|
||||
* @mult: cycle to nanosecond multiplier
|
||||
* @shift: cycle to nanosecond divisor (power of two)
|
||||
*
|
||||
* Converts cycles to nanoseconds, using the given mult and shift.
|
||||
*
|
||||
|
||||
@@ -422,9 +422,9 @@ asmlinkage long compat_sys_getdents64(unsigned int fd,
|
||||
asmlinkage long compat_sys_vmsplice(int fd, const struct compat_iovec __user *,
|
||||
unsigned int nr_segs, unsigned int flags);
|
||||
asmlinkage long compat_sys_open(const char __user *filename, int flags,
|
||||
int mode);
|
||||
umode_t mode);
|
||||
asmlinkage long compat_sys_openat(unsigned int dfd, const char __user *filename,
|
||||
int flags, int mode);
|
||||
int flags, umode_t mode);
|
||||
asmlinkage long compat_sys_open_by_handle_at(int mountdirfd,
|
||||
struct file_handle __user *handle,
|
||||
int flags);
|
||||
@@ -552,5 +552,14 @@ extern ssize_t compat_rw_copy_check_uvector(int type,
|
||||
|
||||
extern void __user *compat_alloc_user_space(unsigned long len);
|
||||
|
||||
asmlinkage ssize_t compat_sys_process_vm_readv(compat_pid_t pid,
|
||||
const struct compat_iovec __user *lvec,
|
||||
unsigned long liovcnt, const struct compat_iovec __user *rvec,
|
||||
unsigned long riovcnt, unsigned long flags);
|
||||
asmlinkage ssize_t compat_sys_process_vm_writev(compat_pid_t pid,
|
||||
const struct compat_iovec __user *lvec,
|
||||
unsigned long liovcnt, const struct compat_iovec __user *rvec,
|
||||
unsigned long riovcnt, unsigned long flags);
|
||||
|
||||
#endif /* CONFIG_COMPAT */
|
||||
#endif /* _LINUX_COMPAT_H */
|
||||
|
||||
@@ -50,6 +50,11 @@
|
||||
# define inline inline __attribute__((always_inline))
|
||||
# define __inline__ __inline__ __attribute__((always_inline))
|
||||
# define __inline __inline __attribute__((always_inline))
|
||||
#else
|
||||
/* A lot of inline functions can cause havoc with function tracing */
|
||||
# define inline inline notrace
|
||||
# define __inline__ __inline__ notrace
|
||||
# define __inline __inline notrace
|
||||
#endif
|
||||
|
||||
#define __deprecated __attribute__((deprecated))
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
the kernel context */
|
||||
#define __cold __attribute__((__cold__))
|
||||
|
||||
#define __linktime_error(message) __attribute__((__error__(message)))
|
||||
|
||||
#if __GNUC_MINOR__ >= 5
|
||||
/*
|
||||
|
||||
@@ -293,7 +293,9 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
|
||||
#ifndef __compiletime_error
|
||||
# define __compiletime_error(message)
|
||||
#endif
|
||||
|
||||
#ifndef __linktime_error
|
||||
# define __linktime_error(message)
|
||||
#endif
|
||||
/*
|
||||
* Prevent the compiler from merging or refetching accesses. The compiler
|
||||
* is also forbidden from reordering successive instances of ACCESS_ONCE(),
|
||||
|
||||
@@ -124,7 +124,7 @@ extern struct config_item *config_group_find_item(struct config_group *,
|
||||
struct configfs_attribute {
|
||||
const char *ca_name;
|
||||
struct module *ca_owner;
|
||||
mode_t ca_mode;
|
||||
umode_t ca_mode;
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
@@ -152,7 +152,7 @@ extern int braille_register_console(struct console *, int index,
|
||||
char *console_options, char *braille_options);
|
||||
extern int braille_unregister_console(struct console *);
|
||||
extern void console_sysfs_notify(void);
|
||||
extern int console_suspend_enabled;
|
||||
extern bool console_suspend_enabled;
|
||||
|
||||
/* Suspend and resume console messages over PM events */
|
||||
extern void suspend_console(void);
|
||||
|
||||
@@ -35,8 +35,8 @@ struct cordic_iq {
|
||||
* @theta: angle in degrees for which i/q coordinate is to be calculated.
|
||||
* @coord: function output parameter holding the i/q coordinate.
|
||||
*
|
||||
* The function calculates the i/q coordinate for a given angle using
|
||||
* cordic algorithm. The coordinate consists of a real (i) and an
|
||||
* The function calculates the i/q coordinate for a given angle using the
|
||||
* CORDIC algorithm. The coordinate consists of a real (i) and an
|
||||
* imaginary (q) part. The real part is essentially the cosine of the
|
||||
* angle and the imaginary part is the sine of the angle. The returned
|
||||
* values are scaled by 2^16 for precision. The range for theta is
|
||||
|
||||
@@ -14,7 +14,7 @@
|
||||
#ifndef _LINUX_CPU_H_
|
||||
#define _LINUX_CPU_H_
|
||||
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/node.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/cpumask.h>
|
||||
@@ -22,19 +22,20 @@
|
||||
struct cpu {
|
||||
int node_id; /* The node which contains the CPU */
|
||||
int hotpluggable; /* creates sysfs control file if hotpluggable */
|
||||
struct sys_device sysdev;
|
||||
struct device dev;
|
||||
};
|
||||
|
||||
extern int register_cpu(struct cpu *cpu, int num);
|
||||
extern struct sys_device *get_cpu_sysdev(unsigned cpu);
|
||||
extern struct device *get_cpu_device(unsigned cpu);
|
||||
extern bool cpu_is_hotpluggable(unsigned cpu);
|
||||
|
||||
extern int cpu_add_sysdev_attr(struct sysdev_attribute *attr);
|
||||
extern void cpu_remove_sysdev_attr(struct sysdev_attribute *attr);
|
||||
extern int cpu_add_dev_attr(struct device_attribute *attr);
|
||||
extern void cpu_remove_dev_attr(struct device_attribute *attr);
|
||||
|
||||
extern int cpu_add_sysdev_attr_group(struct attribute_group *attrs);
|
||||
extern void cpu_remove_sysdev_attr_group(struct attribute_group *attrs);
|
||||
extern int cpu_add_dev_attr_group(struct attribute_group *attrs);
|
||||
extern void cpu_remove_dev_attr_group(struct attribute_group *attrs);
|
||||
|
||||
extern int sched_create_sysfs_power_savings_entries(struct sysdev_class *cls);
|
||||
extern int sched_create_sysfs_power_savings_entries(struct device *dev);
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
extern void unregister_cpu(struct cpu *cpu);
|
||||
@@ -160,7 +161,7 @@ static inline void cpu_maps_update_done(void)
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
extern struct sysdev_class cpu_sysdev_class;
|
||||
extern struct bus_type cpu_subsys;
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
/* Stop CPUs going up and down. */
|
||||
|
||||
@@ -130,7 +130,6 @@ struct cpuidle_driver {
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
extern void disable_cpuidle(void);
|
||||
extern int cpuidle_idle_call(void);
|
||||
|
||||
extern int cpuidle_register_driver(struct cpuidle_driver *drv);
|
||||
struct cpuidle_driver *cpuidle_get_driver(void);
|
||||
extern void cpuidle_unregister_driver(struct cpuidle_driver *drv);
|
||||
@@ -145,7 +144,6 @@ extern void cpuidle_disable_device(struct cpuidle_device *dev);
|
||||
#else
|
||||
static inline void disable_cpuidle(void) { }
|
||||
static inline int cpuidle_idle_call(void) { return -ENODEV; }
|
||||
|
||||
static inline int cpuidle_register_driver(struct cpuidle_driver *drv)
|
||||
{return -ENODEV; }
|
||||
static inline struct cpuidle_driver *cpuidle_get_driver(void) {return NULL; }
|
||||
@@ -188,7 +186,14 @@ struct cpuidle_governor {
|
||||
extern int cpuidle_register_governor(struct cpuidle_governor *gov);
|
||||
extern void cpuidle_unregister_governor(struct cpuidle_governor *gov);
|
||||
|
||||
#ifdef CONFIG_INTEL_IDLE
|
||||
extern int intel_idle_cpu_init(int cpu);
|
||||
#else
|
||||
static inline int intel_idle_cpu_init(int cpu) { return -1; }
|
||||
#endif
|
||||
|
||||
#else
|
||||
static inline int intel_idle_cpu_init(int cpu) { return -1; }
|
||||
|
||||
static inline int cpuidle_register_governor(struct cpuidle_governor *gov)
|
||||
{return 0;}
|
||||
|
||||
@@ -5,6 +5,7 @@
|
||||
#include <linux/kexec.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/elf.h>
|
||||
|
||||
#define ELFCORE_ADDR_MAX (-1ULL)
|
||||
#define ELFCORE_ADDR_ERR (-2ULL)
|
||||
|
||||
@@ -358,10 +358,12 @@ static inline void put_cred(const struct cred *_cred)
|
||||
#define current_security() (current_cred_xxx(security))
|
||||
|
||||
#ifdef CONFIG_USER_NS
|
||||
#define current_user_ns() (current_cred_xxx(user_ns))
|
||||
#define current_user_ns() (current_cred_xxx(user_ns))
|
||||
#define task_user_ns(task) (task_cred_xxx((task), user_ns))
|
||||
#else
|
||||
extern struct user_namespace init_user_ns;
|
||||
#define current_user_ns() (&init_user_ns)
|
||||
#define current_user_ns() (&init_user_ns)
|
||||
#define task_user_ns(task) (&init_user_ns)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -5,6 +5,9 @@
|
||||
* Copyright (C) 1996 Paul Mackerras.
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_CUDA_H
|
||||
#define _LINUX_CUDA_H
|
||||
|
||||
/* CUDA commands (2nd byte) */
|
||||
#define CUDA_WARM_START 0
|
||||
#define CUDA_AUTOPOLL 1
|
||||
@@ -34,3 +37,5 @@ extern int cuda_request(struct adb_request *req,
|
||||
extern void cuda_poll(void);
|
||||
|
||||
#endif /* __KERNEL */
|
||||
|
||||
#endif /* _LINUX_CUDA_H */
|
||||
|
||||
@@ -203,6 +203,7 @@ struct dentry_operations {
|
||||
|
||||
#define DCACHE_CANT_MOUNT 0x0100
|
||||
#define DCACHE_GENOCIDE 0x0200
|
||||
#define DCACHE_SHRINK_LIST 0x0400
|
||||
|
||||
#define DCACHE_NFSFS_RENAMED 0x1000
|
||||
/* this dentry has been "silly renamed" and has to be deleted on the last
|
||||
@@ -241,6 +242,7 @@ extern struct dentry * d_alloc(struct dentry *, const struct qstr *);
|
||||
extern struct dentry * d_alloc_pseudo(struct super_block *, const struct qstr *);
|
||||
extern struct dentry * d_splice_alias(struct inode *, struct dentry *);
|
||||
extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *);
|
||||
extern struct dentry *d_find_any_alias(struct inode *inode);
|
||||
extern struct dentry * d_obtain_alias(struct inode *);
|
||||
extern void shrink_dcache_sb(struct super_block *);
|
||||
extern void shrink_dcache_parent(struct dentry *);
|
||||
@@ -249,6 +251,7 @@ extern int d_invalidate(struct dentry *);
|
||||
|
||||
/* only used at mount-time */
|
||||
extern struct dentry * d_alloc_root(struct inode *);
|
||||
extern struct dentry * d_make_root(struct inode *);
|
||||
|
||||
/* <clickety>-<click> the ramfs-type tree */
|
||||
extern void d_genocide(struct dentry *);
|
||||
@@ -339,7 +342,8 @@ extern int d_validate(struct dentry *, struct dentry *);
|
||||
*/
|
||||
extern char *dynamic_dname(struct dentry *, char *, int, const char *, ...);
|
||||
|
||||
extern char *__d_path(const struct path *path, struct path *root, char *, int);
|
||||
extern char *__d_path(const struct path *, const struct path *, char *, int);
|
||||
extern char *d_absolute_path(const struct path *, char *, int);
|
||||
extern char *d_path(const struct path *, char *, int);
|
||||
extern char *d_path_with_unreachable(const struct path *, char *, int);
|
||||
extern char *dentry_path_raw(struct dentry *, char *, int);
|
||||
|
||||
@@ -16,6 +16,7 @@
|
||||
#define _DEBUGFS_H_
|
||||
|
||||
#include <linux/fs.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
@@ -26,6 +27,17 @@ struct debugfs_blob_wrapper {
|
||||
unsigned long size;
|
||||
};
|
||||
|
||||
struct debugfs_reg32 {
|
||||
char *name;
|
||||
unsigned long offset;
|
||||
};
|
||||
|
||||
struct debugfs_regset32 {
|
||||
struct debugfs_reg32 *regs;
|
||||
int nregs;
|
||||
void __iomem *base;
|
||||
};
|
||||
|
||||
extern struct dentry *arch_debugfs_dir;
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
@@ -34,7 +46,7 @@ extern struct dentry *arch_debugfs_dir;
|
||||
extern const struct file_operations debugfs_file_operations;
|
||||
extern const struct inode_operations debugfs_link_operations;
|
||||
|
||||
struct dentry *debugfs_create_file(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_file(const char *name, umode_t mode,
|
||||
struct dentry *parent, void *data,
|
||||
const struct file_operations *fops);
|
||||
|
||||
@@ -49,31 +61,38 @@ void debugfs_remove_recursive(struct dentry *dentry);
|
||||
struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry,
|
||||
struct dentry *new_dir, const char *new_name);
|
||||
|
||||
struct dentry *debugfs_create_u8(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_u8(const char *name, umode_t mode,
|
||||
struct dentry *parent, u8 *value);
|
||||
struct dentry *debugfs_create_u16(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_u16(const char *name, umode_t mode,
|
||||
struct dentry *parent, u16 *value);
|
||||
struct dentry *debugfs_create_u32(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_u32(const char *name, umode_t mode,
|
||||
struct dentry *parent, u32 *value);
|
||||
struct dentry *debugfs_create_u64(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_u64(const char *name, umode_t mode,
|
||||
struct dentry *parent, u64 *value);
|
||||
struct dentry *debugfs_create_x8(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_x8(const char *name, umode_t mode,
|
||||
struct dentry *parent, u8 *value);
|
||||
struct dentry *debugfs_create_x16(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_x16(const char *name, umode_t mode,
|
||||
struct dentry *parent, u16 *value);
|
||||
struct dentry *debugfs_create_x32(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_x32(const char *name, umode_t mode,
|
||||
struct dentry *parent, u32 *value);
|
||||
struct dentry *debugfs_create_x64(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_x64(const char *name, umode_t mode,
|
||||
struct dentry *parent, u64 *value);
|
||||
struct dentry *debugfs_create_size_t(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_size_t(const char *name, umode_t mode,
|
||||
struct dentry *parent, size_t *value);
|
||||
struct dentry *debugfs_create_bool(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_bool(const char *name, umode_t mode,
|
||||
struct dentry *parent, u32 *value);
|
||||
|
||||
struct dentry *debugfs_create_blob(const char *name, mode_t mode,
|
||||
struct dentry *debugfs_create_blob(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
struct debugfs_blob_wrapper *blob);
|
||||
|
||||
struct dentry *debugfs_create_regset32(const char *name, mode_t mode,
|
||||
struct dentry *parent,
|
||||
struct debugfs_regset32 *regset);
|
||||
|
||||
int debugfs_print_regs32(struct seq_file *s, const struct debugfs_reg32 *regs,
|
||||
int nregs, void __iomem *base, char *prefix);
|
||||
|
||||
bool debugfs_initialized(void);
|
||||
|
||||
#else
|
||||
@@ -86,7 +105,7 @@ bool debugfs_initialized(void);
|
||||
* want to duplicate the design decision mistakes of procfs and devfs again.
|
||||
*/
|
||||
|
||||
static inline struct dentry *debugfs_create_file(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_file(const char *name, umode_t mode,
|
||||
struct dentry *parent, void *data,
|
||||
const struct file_operations *fops)
|
||||
{
|
||||
@@ -118,76 +137,83 @@ static inline struct dentry *debugfs_rename(struct dentry *old_dir, struct dentr
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_u8(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_u8(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u8 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_u16(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_u16(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u16 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_u32(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_u32(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u32 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_u64(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_u64(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u64 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_x8(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_x8(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u8 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_x16(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_x16(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u16 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_x32(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_x32(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u32 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_size_t(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_size_t(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
size_t *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_bool(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_bool(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
u32 *value)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_blob(const char *name, mode_t mode,
|
||||
static inline struct dentry *debugfs_create_blob(const char *name, umode_t mode,
|
||||
struct dentry *parent,
|
||||
struct debugfs_blob_wrapper *blob)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline struct dentry *debugfs_create_regset32(const char *name,
|
||||
mode_t mode, struct dentry *parent,
|
||||
struct debugfs_regset32 *regset)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline bool debugfs_initialized(void)
|
||||
{
|
||||
return false;
|
||||
|
||||
@@ -46,6 +46,8 @@ struct debug_obj {
|
||||
* fails
|
||||
* @fixup_free: fixup function, which is called when the free check
|
||||
* fails
|
||||
* @fixup_assert_init: fixup function, which is called when the assert_init
|
||||
* check fails
|
||||
*/
|
||||
struct debug_obj_descr {
|
||||
const char *name;
|
||||
@@ -54,6 +56,7 @@ struct debug_obj_descr {
|
||||
int (*fixup_activate) (void *addr, enum debug_obj_state state);
|
||||
int (*fixup_destroy) (void *addr, enum debug_obj_state state);
|
||||
int (*fixup_free) (void *addr, enum debug_obj_state state);
|
||||
int (*fixup_assert_init)(void *addr, enum debug_obj_state state);
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DEBUG_OBJECTS
|
||||
@@ -64,6 +67,7 @@ extern void debug_object_activate (void *addr, struct debug_obj_descr *descr);
|
||||
extern void debug_object_deactivate(void *addr, struct debug_obj_descr *descr);
|
||||
extern void debug_object_destroy (void *addr, struct debug_obj_descr *descr);
|
||||
extern void debug_object_free (void *addr, struct debug_obj_descr *descr);
|
||||
extern void debug_object_assert_init(void *addr, struct debug_obj_descr *descr);
|
||||
|
||||
/*
|
||||
* Active state:
|
||||
@@ -89,6 +93,8 @@ static inline void
|
||||
debug_object_destroy (void *addr, struct debug_obj_descr *descr) { }
|
||||
static inline void
|
||||
debug_object_free (void *addr, struct debug_obj_descr *descr) { }
|
||||
static inline void
|
||||
debug_object_assert_init(void *addr, struct debug_obj_descr *descr) { }
|
||||
|
||||
static inline void debug_objects_early_init(void) { }
|
||||
static inline void debug_objects_mem_init(void) { }
|
||||
|
||||
@@ -53,6 +53,8 @@ extern void bus_remove_file(struct bus_type *, struct bus_attribute *);
|
||||
* struct bus_type - The bus type of the device
|
||||
*
|
||||
* @name: The name of the bus.
|
||||
* @dev_name: Used for subsystems to enumerate devices like ("foo%u", dev->id).
|
||||
* @dev_root: Default device to use as the parent.
|
||||
* @bus_attrs: Default attributes of the bus.
|
||||
* @dev_attrs: Default attributes of the devices on the bus.
|
||||
* @drv_attrs: Default attributes of the device drivers on the bus.
|
||||
@@ -86,6 +88,8 @@ extern void bus_remove_file(struct bus_type *, struct bus_attribute *);
|
||||
*/
|
||||
struct bus_type {
|
||||
const char *name;
|
||||
const char *dev_name;
|
||||
struct device *dev_root;
|
||||
struct bus_attribute *bus_attrs;
|
||||
struct device_attribute *dev_attrs;
|
||||
struct driver_attribute *drv_attrs;
|
||||
@@ -106,12 +110,30 @@ struct bus_type {
|
||||
struct subsys_private *p;
|
||||
};
|
||||
|
||||
extern int __must_check bus_register(struct bus_type *bus);
|
||||
/* This is a #define to keep the compiler from merging different
|
||||
* instances of the __key variable */
|
||||
#define bus_register(subsys) \
|
||||
({ \
|
||||
static struct lock_class_key __key; \
|
||||
__bus_register(subsys, &__key); \
|
||||
})
|
||||
extern int __must_check __bus_register(struct bus_type *bus,
|
||||
struct lock_class_key *key);
|
||||
extern void bus_unregister(struct bus_type *bus);
|
||||
|
||||
extern int __must_check bus_rescan_devices(struct bus_type *bus);
|
||||
|
||||
/* iterator helpers for buses */
|
||||
struct subsys_dev_iter {
|
||||
struct klist_iter ki;
|
||||
const struct device_type *type;
|
||||
};
|
||||
void subsys_dev_iter_init(struct subsys_dev_iter *iter,
|
||||
struct bus_type *subsys,
|
||||
struct device *start,
|
||||
const struct device_type *type);
|
||||
struct device *subsys_dev_iter_next(struct subsys_dev_iter *iter);
|
||||
void subsys_dev_iter_exit(struct subsys_dev_iter *iter);
|
||||
|
||||
int bus_for_each_dev(struct bus_type *bus, struct device *start, void *data,
|
||||
int (*fn)(struct device *dev, void *data));
|
||||
@@ -121,10 +143,10 @@ struct device *bus_find_device(struct bus_type *bus, struct device *start,
|
||||
struct device *bus_find_device_by_name(struct bus_type *bus,
|
||||
struct device *start,
|
||||
const char *name);
|
||||
|
||||
struct device *subsys_find_device_by_id(struct bus_type *bus, unsigned int id,
|
||||
struct device *hint);
|
||||
int bus_for_each_drv(struct bus_type *bus, struct device_driver *start,
|
||||
void *data, int (*fn)(struct device_driver *, void *));
|
||||
|
||||
void bus_sort_breadthfirst(struct bus_type *bus,
|
||||
int (*compare)(const struct device *a,
|
||||
const struct device *b));
|
||||
@@ -255,6 +277,33 @@ struct device *driver_find_device(struct device_driver *drv,
|
||||
struct device *start, void *data,
|
||||
int (*match)(struct device *dev, void *data));
|
||||
|
||||
/**
|
||||
* struct subsys_interface - interfaces to device functions
|
||||
* @name name of the device function
|
||||
* @subsystem subsytem of the devices to attach to
|
||||
* @node the list of functions registered at the subsystem
|
||||
* @add device hookup to device function handler
|
||||
* @remove device hookup to device function handler
|
||||
*
|
||||
* Simple interfaces attached to a subsystem. Multiple interfaces can
|
||||
* attach to a subsystem and its devices. Unlike drivers, they do not
|
||||
* exclusively claim or control devices. Interfaces usually represent
|
||||
* a specific functionality of a subsystem/class of devices.
|
||||
*/
|
||||
struct subsys_interface {
|
||||
const char *name;
|
||||
struct bus_type *subsys;
|
||||
struct list_head node;
|
||||
int (*add_dev)(struct device *dev, struct subsys_interface *sif);
|
||||
int (*remove_dev)(struct device *dev, struct subsys_interface *sif);
|
||||
};
|
||||
|
||||
int subsys_interface_register(struct subsys_interface *sif);
|
||||
void subsys_interface_unregister(struct subsys_interface *sif);
|
||||
|
||||
int subsys_system_register(struct bus_type *subsys,
|
||||
const struct attribute_group **groups);
|
||||
|
||||
/**
|
||||
* struct class - device classes
|
||||
* @name: Name of the class.
|
||||
@@ -294,7 +343,7 @@ struct class {
|
||||
struct kobject *dev_kobj;
|
||||
|
||||
int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env);
|
||||
char *(*devnode)(struct device *dev, mode_t *mode);
|
||||
char *(*devnode)(struct device *dev, umode_t *mode);
|
||||
|
||||
void (*class_release)(struct class *class);
|
||||
void (*dev_release)(struct device *dev);
|
||||
@@ -423,7 +472,7 @@ struct device_type {
|
||||
const char *name;
|
||||
const struct attribute_group **groups;
|
||||
int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
|
||||
char *(*devnode)(struct device *dev, mode_t *mode);
|
||||
char *(*devnode)(struct device *dev, umode_t *mode);
|
||||
void (*release)(struct device *dev);
|
||||
|
||||
const struct dev_pm_ops *pm;
|
||||
@@ -438,11 +487,31 @@ struct device_attribute {
|
||||
const char *buf, size_t count);
|
||||
};
|
||||
|
||||
#define DEVICE_ATTR(_name, _mode, _show, _store) \
|
||||
struct device_attribute dev_attr_##_name = __ATTR(_name, _mode, _show, _store)
|
||||
struct dev_ext_attribute {
|
||||
struct device_attribute attr;
|
||||
void *var;
|
||||
};
|
||||
|
||||
extern int __must_check device_create_file(struct device *device,
|
||||
const struct device_attribute *entry);
|
||||
ssize_t device_show_ulong(struct device *dev, struct device_attribute *attr,
|
||||
char *buf);
|
||||
ssize_t device_store_ulong(struct device *dev, struct device_attribute *attr,
|
||||
const char *buf, size_t count);
|
||||
ssize_t device_show_int(struct device *dev, struct device_attribute *attr,
|
||||
char *buf);
|
||||
ssize_t device_store_int(struct device *dev, struct device_attribute *attr,
|
||||
const char *buf, size_t count);
|
||||
|
||||
#define DEVICE_ATTR(_name, _mode, _show, _store) \
|
||||
struct device_attribute dev_attr_##_name = __ATTR(_name, _mode, _show, _store)
|
||||
#define DEVICE_ULONG_ATTR(_name, _mode, _var) \
|
||||
struct dev_ext_attribute dev_attr_##_name = \
|
||||
{ __ATTR(_name, _mode, device_show_ulong, device_store_ulong), &(_var) }
|
||||
#define DEVICE_INT_ATTR(_name, _mode, _var) \
|
||||
struct dev_ext_attribute dev_attr_##_name = \
|
||||
{ __ATTR(_name, _mode, device_show_ulong, device_store_ulong), &(_var) }
|
||||
|
||||
extern int device_create_file(struct device *device,
|
||||
const struct device_attribute *entry);
|
||||
extern void device_remove_file(struct device *dev,
|
||||
const struct device_attribute *attr);
|
||||
extern int __must_check device_create_bin_file(struct device *dev,
|
||||
@@ -490,6 +559,9 @@ extern int devres_release_group(struct device *dev, void *id);
|
||||
extern void *devm_kzalloc(struct device *dev, size_t size, gfp_t gfp);
|
||||
extern void devm_kfree(struct device *dev, void *p);
|
||||
|
||||
void __iomem *devm_request_and_ioremap(struct device *dev,
|
||||
struct resource *res);
|
||||
|
||||
struct device_dma_parameters {
|
||||
/*
|
||||
* a low level driver may set these to teach IOMMU code about
|
||||
@@ -600,6 +672,7 @@ struct device {
|
||||
struct device_node *of_node; /* associated device tree node */
|
||||
|
||||
dev_t devt; /* dev_t, creates the sysfs "dev" */
|
||||
u32 id; /* device instance */
|
||||
|
||||
spinlock_t devres_lock;
|
||||
struct list_head devres_head;
|
||||
@@ -720,7 +793,7 @@ extern int device_rename(struct device *dev, const char *new_name);
|
||||
extern int device_move(struct device *dev, struct device *new_parent,
|
||||
enum dpm_order dpm_order);
|
||||
extern const char *device_get_devnode(struct device *dev,
|
||||
mode_t *mode, const char **tmp);
|
||||
umode_t *mode, const char **tmp);
|
||||
extern void *dev_get_drvdata(const struct device *dev);
|
||||
extern int dev_set_drvdata(struct device *dev, void *data);
|
||||
|
||||
@@ -924,4 +997,25 @@ extern long sysfs_deprecated;
|
||||
#define sysfs_deprecated 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* module_driver() - Helper macro for drivers that don't do anything
|
||||
* special in module init/exit. This eliminates a lot of boilerplate.
|
||||
* Each module may only use this macro once, and calling it replaces
|
||||
* module_init() and module_exit().
|
||||
*
|
||||
* Use this macro to construct bus specific macros for registering
|
||||
* drivers, and do not use it on its own.
|
||||
*/
|
||||
#define module_driver(__driver, __register, __unregister) \
|
||||
static int __init __driver##_init(void) \
|
||||
{ \
|
||||
return __register(&(__driver)); \
|
||||
} \
|
||||
module_init(__driver##_init); \
|
||||
static void __exit __driver##_exit(void) \
|
||||
{ \
|
||||
__unregister(&(__driver)); \
|
||||
} \
|
||||
module_exit(__driver##_exit);
|
||||
|
||||
#endif /* _DEVICE_H_ */
|
||||
|
||||
64
include/linux/digsig.h
Normal file
64
include/linux/digsig.h
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Nokia Corporation
|
||||
* Copyright (C) 2011 Intel Corporation
|
||||
*
|
||||
* Author:
|
||||
* Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
|
||||
* <dmitry.kasatkin@intel.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, version 2 of the License.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _DIGSIG_H
|
||||
#define _DIGSIG_H
|
||||
|
||||
#include <linux/key.h>
|
||||
|
||||
enum pubkey_algo {
|
||||
PUBKEY_ALGO_RSA,
|
||||
PUBKEY_ALGO_MAX,
|
||||
};
|
||||
|
||||
enum digest_algo {
|
||||
DIGEST_ALGO_SHA1,
|
||||
DIGEST_ALGO_SHA256,
|
||||
DIGEST_ALGO_MAX
|
||||
};
|
||||
|
||||
struct pubkey_hdr {
|
||||
uint8_t version; /* key format version */
|
||||
time_t timestamp; /* key made, always 0 for now */
|
||||
uint8_t algo;
|
||||
uint8_t nmpi;
|
||||
char mpi[0];
|
||||
} __packed;
|
||||
|
||||
struct signature_hdr {
|
||||
uint8_t version; /* signature format version */
|
||||
time_t timestamp; /* signature made */
|
||||
uint8_t algo;
|
||||
uint8_t hash;
|
||||
uint8_t keyid[8];
|
||||
uint8_t nmpi;
|
||||
char mpi[0];
|
||||
} __packed;
|
||||
|
||||
#if defined(CONFIG_SIGNATURE) || defined(CONFIG_SIGNATURE_MODULE)
|
||||
|
||||
int digsig_verify(struct key *keyring, const char *sig, int siglen,
|
||||
const char *digest, int digestlen);
|
||||
|
||||
#else
|
||||
|
||||
static inline int digsig_verify(struct key *keyring, const char *sig,
|
||||
int siglen, const char *digest, int digestlen)
|
||||
{
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SIGNATURE */
|
||||
|
||||
#endif /* _DIGSIG_H */
|
||||
@@ -1,61 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2006 James Simmons <jsimmons@infradead.org>
|
||||
*
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or (at
|
||||
* your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
||||
*
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_DISPLAY_H
|
||||
#define _LINUX_DISPLAY_H
|
||||
|
||||
#include <linux/device.h>
|
||||
|
||||
struct display_device;
|
||||
|
||||
/* This structure defines all the properties of a Display. */
|
||||
struct display_driver {
|
||||
int (*set_contrast)(struct display_device *, unsigned int);
|
||||
int (*get_contrast)(struct display_device *);
|
||||
void (*suspend)(struct display_device *, pm_message_t state);
|
||||
void (*resume)(struct display_device *);
|
||||
int (*probe)(struct display_device *, void *);
|
||||
int (*remove)(struct display_device *);
|
||||
int max_contrast;
|
||||
};
|
||||
|
||||
struct display_device {
|
||||
struct module *owner; /* Owner module */
|
||||
struct display_driver *driver;
|
||||
struct device *parent; /* This is the parent */
|
||||
struct device *dev; /* This is this display device */
|
||||
struct mutex lock;
|
||||
void *priv_data;
|
||||
char type[16];
|
||||
char *name;
|
||||
int idx;
|
||||
};
|
||||
|
||||
extern struct display_device *display_device_register(struct display_driver *driver,
|
||||
struct device *dev, void *devdata);
|
||||
extern void display_device_unregister(struct display_device *dev);
|
||||
|
||||
extern int probe_edid(struct display_device *dev, void *devdata);
|
||||
|
||||
#define to_display_device(obj) container_of(obj, struct display_device, class_dev)
|
||||
|
||||
#endif
|
||||
@@ -2,7 +2,7 @@
|
||||
*******************************************************************************
|
||||
**
|
||||
** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved.
|
||||
** Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
|
||||
** Copyright (C) 2004-2011 Red Hat, Inc. All rights reserved.
|
||||
**
|
||||
** This copyrighted material is made available to anyone wishing to use,
|
||||
** modify, copy, or redistribute it subject to the terms and conditions
|
||||
@@ -74,15 +74,76 @@ struct dlm_lksb {
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
struct dlm_slot {
|
||||
int nodeid; /* 1 to MAX_INT */
|
||||
int slot; /* 1 to MAX_INT */
|
||||
};
|
||||
|
||||
/*
|
||||
* recover_prep: called before the dlm begins lock recovery.
|
||||
* Notfies lockspace user that locks from failed members will be granted.
|
||||
* recover_slot: called after recover_prep and before recover_done.
|
||||
* Identifies a failed lockspace member.
|
||||
* recover_done: called after the dlm completes lock recovery.
|
||||
* Identifies lockspace members and lockspace generation number.
|
||||
*/
|
||||
|
||||
struct dlm_lockspace_ops {
|
||||
void (*recover_prep) (void *ops_arg);
|
||||
void (*recover_slot) (void *ops_arg, struct dlm_slot *slot);
|
||||
void (*recover_done) (void *ops_arg, struct dlm_slot *slots,
|
||||
int num_slots, int our_slot, uint32_t generation);
|
||||
};
|
||||
|
||||
/*
|
||||
* dlm_new_lockspace
|
||||
*
|
||||
* Starts a lockspace with the given name. If the named lockspace exists in
|
||||
* the cluster, the calling node joins it.
|
||||
* Create/join a lockspace.
|
||||
*
|
||||
* name: lockspace name, null terminated, up to DLM_LOCKSPACE_LEN (not
|
||||
* including terminating null).
|
||||
*
|
||||
* cluster: cluster name, null terminated, up to DLM_LOCKSPACE_LEN (not
|
||||
* including terminating null). Optional. When cluster is null, it
|
||||
* is not used. When set, dlm_new_lockspace() returns -EBADR if cluster
|
||||
* is not equal to the dlm cluster name.
|
||||
*
|
||||
* flags:
|
||||
* DLM_LSFL_NODIR
|
||||
* The dlm should not use a resource directory, but statically assign
|
||||
* resource mastery to nodes based on the name hash that is otherwise
|
||||
* used to select the directory node. Must be the same on all nodes.
|
||||
* DLM_LSFL_TIMEWARN
|
||||
* The dlm should emit netlink messages if locks have been waiting
|
||||
* for a configurable amount of time. (Unused.)
|
||||
* DLM_LSFL_FS
|
||||
* The lockspace user is in the kernel (i.e. filesystem). Enables
|
||||
* direct bast/cast callbacks.
|
||||
* DLM_LSFL_NEWEXCL
|
||||
* dlm_new_lockspace() should return -EEXIST if the lockspace exists.
|
||||
*
|
||||
* lvblen: length of lvb in bytes. Must be multiple of 8.
|
||||
* dlm_new_lockspace() returns an error if this does not match
|
||||
* what other nodes are using.
|
||||
*
|
||||
* ops: callbacks that indicate lockspace recovery points so the
|
||||
* caller can coordinate its recovery and know lockspace members.
|
||||
* This is only used by the initial dlm_new_lockspace() call.
|
||||
* Optional.
|
||||
*
|
||||
* ops_arg: arg for ops callbacks.
|
||||
*
|
||||
* ops_result: tells caller if the ops callbacks (if provided) will
|
||||
* be used or not. 0: will be used, -EXXX will not be used.
|
||||
* -EOPNOTSUPP: the dlm does not have recovery_callbacks enabled.
|
||||
*
|
||||
* lockspace: handle for dlm functions
|
||||
*/
|
||||
|
||||
int dlm_new_lockspace(const char *name, int namelen,
|
||||
dlm_lockspace_t **lockspace, uint32_t flags, int lvblen);
|
||||
int dlm_new_lockspace(const char *name, const char *cluster,
|
||||
uint32_t flags, int lvblen,
|
||||
const struct dlm_lockspace_ops *ops, void *ops_arg,
|
||||
int *ops_result, dlm_lockspace_t **lockspace);
|
||||
|
||||
/*
|
||||
* dlm_release_lockspace
|
||||
|
||||
176
include/linux/dma-buf.h
Normal file
176
include/linux/dma-buf.h
Normal file
@@ -0,0 +1,176 @@
|
||||
/*
|
||||
* Header file for dma buffer sharing framework.
|
||||
*
|
||||
* Copyright(C) 2011 Linaro Limited. All rights reserved.
|
||||
* Author: Sumit Semwal <sumit.semwal@ti.com>
|
||||
*
|
||||
* Many thanks to linaro-mm-sig list, and specially
|
||||
* Arnd Bergmann <arnd@arndb.de>, Rob Clark <rob@ti.com> and
|
||||
* Daniel Vetter <daniel@ffwll.ch> for their support in creation and
|
||||
* refining of this idea.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published by
|
||||
* the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifndef __DMA_BUF_H__
|
||||
#define __DMA_BUF_H__
|
||||
|
||||
#include <linux/file.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
struct dma_buf;
|
||||
struct dma_buf_attachment;
|
||||
|
||||
/**
|
||||
* struct dma_buf_ops - operations possible on struct dma_buf
|
||||
* @attach: [optional] allows different devices to 'attach' themselves to the
|
||||
* given buffer. It might return -EBUSY to signal that backing storage
|
||||
* is already allocated and incompatible with the requirements
|
||||
* of requesting device.
|
||||
* @detach: [optional] detach a given device from this buffer.
|
||||
* @map_dma_buf: returns list of scatter pages allocated, increases usecount
|
||||
* of the buffer. Requires atleast one attach to be called
|
||||
* before. Returned sg list should already be mapped into
|
||||
* _device_ address space. This call may sleep. May also return
|
||||
* -EINTR. Should return -EINVAL if attach hasn't been called yet.
|
||||
* @unmap_dma_buf: decreases usecount of buffer, might deallocate scatter
|
||||
* pages.
|
||||
* @release: release this buffer; to be called after the last dma_buf_put.
|
||||
*/
|
||||
struct dma_buf_ops {
|
||||
int (*attach)(struct dma_buf *, struct device *,
|
||||
struct dma_buf_attachment *);
|
||||
|
||||
void (*detach)(struct dma_buf *, struct dma_buf_attachment *);
|
||||
|
||||
/* For {map,unmap}_dma_buf below, any specific buffer attributes
|
||||
* required should get added to device_dma_parameters accessible
|
||||
* via dev->dma_params.
|
||||
*/
|
||||
struct sg_table * (*map_dma_buf)(struct dma_buf_attachment *,
|
||||
enum dma_data_direction);
|
||||
void (*unmap_dma_buf)(struct dma_buf_attachment *,
|
||||
struct sg_table *);
|
||||
/* TODO: Add try_map_dma_buf version, to return immed with -EBUSY
|
||||
* if the call would block.
|
||||
*/
|
||||
|
||||
/* after final dma_buf_put() */
|
||||
void (*release)(struct dma_buf *);
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dma_buf - shared buffer object
|
||||
* @size: size of the buffer
|
||||
* @file: file pointer used for sharing buffers across, and for refcounting.
|
||||
* @attachments: list of dma_buf_attachment that denotes all devices attached.
|
||||
* @ops: dma_buf_ops associated with this buffer object.
|
||||
* @priv: exporter specific private data for this buffer object.
|
||||
*/
|
||||
struct dma_buf {
|
||||
size_t size;
|
||||
struct file *file;
|
||||
struct list_head attachments;
|
||||
const struct dma_buf_ops *ops;
|
||||
/* mutex to serialize list manipulation and other ops */
|
||||
struct mutex lock;
|
||||
void *priv;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dma_buf_attachment - holds device-buffer attachment data
|
||||
* @dmabuf: buffer for this attachment.
|
||||
* @dev: device attached to the buffer.
|
||||
* @node: list of dma_buf_attachment.
|
||||
* @priv: exporter specific attachment data.
|
||||
*
|
||||
* This structure holds the attachment information between the dma_buf buffer
|
||||
* and its user device(s). The list contains one attachment struct per device
|
||||
* attached to the buffer.
|
||||
*/
|
||||
struct dma_buf_attachment {
|
||||
struct dma_buf *dmabuf;
|
||||
struct device *dev;
|
||||
struct list_head node;
|
||||
void *priv;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DMA_SHARED_BUFFER
|
||||
struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf,
|
||||
struct device *dev);
|
||||
void dma_buf_detach(struct dma_buf *dmabuf,
|
||||
struct dma_buf_attachment *dmabuf_attach);
|
||||
struct dma_buf *dma_buf_export(void *priv, struct dma_buf_ops *ops,
|
||||
size_t size, int flags);
|
||||
int dma_buf_fd(struct dma_buf *dmabuf);
|
||||
struct dma_buf *dma_buf_get(int fd);
|
||||
void dma_buf_put(struct dma_buf *dmabuf);
|
||||
|
||||
struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *,
|
||||
enum dma_data_direction);
|
||||
void dma_buf_unmap_attachment(struct dma_buf_attachment *, struct sg_table *);
|
||||
#else
|
||||
|
||||
static inline struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf,
|
||||
struct device *dev)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline void dma_buf_detach(struct dma_buf *dmabuf,
|
||||
struct dma_buf_attachment *dmabuf_attach)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline struct dma_buf *dma_buf_export(void *priv,
|
||||
struct dma_buf_ops *ops,
|
||||
size_t size, int flags)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline int dma_buf_fd(struct dma_buf *dmabuf)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline struct dma_buf *dma_buf_get(int fd)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline void dma_buf_put(struct dma_buf *dmabuf)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline struct sg_table *dma_buf_map_attachment(
|
||||
struct dma_buf_attachment *attach, enum dma_data_direction write)
|
||||
{
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
static inline void dma_buf_unmap_attachment(struct dma_buf_attachment *attach,
|
||||
struct sg_table *sg)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_DMA_SHARED_BUFFER */
|
||||
|
||||
#endif /* __DMA_BUF_H__ */
|
||||
@@ -31,6 +31,7 @@ extern void free_dmar_iommu(struct intel_iommu *iommu);
|
||||
extern int iommu_calculate_agaw(struct intel_iommu *iommu);
|
||||
extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
|
||||
extern int dmar_disabled;
|
||||
extern int intel_iommu_enabled;
|
||||
#else
|
||||
static inline int iommu_calculate_agaw(struct intel_iommu *iommu)
|
||||
{
|
||||
@@ -44,6 +45,7 @@ static inline void free_dmar_iommu(struct intel_iommu *iommu)
|
||||
{
|
||||
}
|
||||
#define dmar_disabled (1)
|
||||
#define intel_iommu_enabled (0)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -23,7 +23,6 @@
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/uio.h>
|
||||
#include <linux/dma-direction.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <asm/page.h>
|
||||
@@ -72,11 +71,93 @@ enum dma_transaction_type {
|
||||
DMA_ASYNC_TX,
|
||||
DMA_SLAVE,
|
||||
DMA_CYCLIC,
|
||||
DMA_INTERLEAVE,
|
||||
/* last transaction type for creation of the capabilities mask */
|
||||
DMA_TX_TYPE_END,
|
||||
};
|
||||
|
||||
/* last transaction type for creation of the capabilities mask */
|
||||
#define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
|
||||
/**
|
||||
* enum dma_transfer_direction - dma transfer mode and direction indicator
|
||||
* @DMA_MEM_TO_MEM: Async/Memcpy mode
|
||||
* @DMA_MEM_TO_DEV: Slave mode & From Memory to Device
|
||||
* @DMA_DEV_TO_MEM: Slave mode & From Device to Memory
|
||||
* @DMA_DEV_TO_DEV: Slave mode & From Device to Device
|
||||
*/
|
||||
enum dma_transfer_direction {
|
||||
DMA_MEM_TO_MEM,
|
||||
DMA_MEM_TO_DEV,
|
||||
DMA_DEV_TO_MEM,
|
||||
DMA_DEV_TO_DEV,
|
||||
DMA_TRANS_NONE,
|
||||
};
|
||||
|
||||
/**
|
||||
* Interleaved Transfer Request
|
||||
* ----------------------------
|
||||
* A chunk is collection of contiguous bytes to be transfered.
|
||||
* The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
|
||||
* ICGs may or maynot change between chunks.
|
||||
* A FRAME is the smallest series of contiguous {chunk,icg} pairs,
|
||||
* that when repeated an integral number of times, specifies the transfer.
|
||||
* A transfer template is specification of a Frame, the number of times
|
||||
* it is to be repeated and other per-transfer attributes.
|
||||
*
|
||||
* Practically, a client driver would have ready a template for each
|
||||
* type of transfer it is going to need during its lifetime and
|
||||
* set only 'src_start' and 'dst_start' before submitting the requests.
|
||||
*
|
||||
*
|
||||
* | Frame-1 | Frame-2 | ~ | Frame-'numf' |
|
||||
* |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...|
|
||||
*
|
||||
* == Chunk size
|
||||
* ... ICG
|
||||
*/
|
||||
|
||||
/**
|
||||
* struct data_chunk - Element of scatter-gather list that makes a frame.
|
||||
* @size: Number of bytes to read from source.
|
||||
* size_dst := fn(op, size_src), so doesn't mean much for destination.
|
||||
* @icg: Number of bytes to jump after last src/dst address of this
|
||||
* chunk and before first src/dst address for next chunk.
|
||||
* Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
|
||||
* Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
|
||||
*/
|
||||
struct data_chunk {
|
||||
size_t size;
|
||||
size_t icg;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dma_interleaved_template - Template to convey DMAC the transfer pattern
|
||||
* and attributes.
|
||||
* @src_start: Bus address of source for the first chunk.
|
||||
* @dst_start: Bus address of destination for the first chunk.
|
||||
* @dir: Specifies the type of Source and Destination.
|
||||
* @src_inc: If the source address increments after reading from it.
|
||||
* @dst_inc: If the destination address increments after writing to it.
|
||||
* @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
|
||||
* Otherwise, source is read contiguously (icg ignored).
|
||||
* Ignored if src_inc is false.
|
||||
* @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
|
||||
* Otherwise, destination is filled contiguously (icg ignored).
|
||||
* Ignored if dst_inc is false.
|
||||
* @numf: Number of frames in this template.
|
||||
* @frame_size: Number of chunks in a frame i.e, size of sgl[].
|
||||
* @sgl: Array of {chunk,icg} pairs that make up a frame.
|
||||
*/
|
||||
struct dma_interleaved_template {
|
||||
dma_addr_t src_start;
|
||||
dma_addr_t dst_start;
|
||||
enum dma_transfer_direction dir;
|
||||
bool src_inc;
|
||||
bool dst_inc;
|
||||
bool src_sgl;
|
||||
bool dst_sgl;
|
||||
size_t numf;
|
||||
size_t frame_size;
|
||||
struct data_chunk sgl[0];
|
||||
};
|
||||
|
||||
/**
|
||||
* enum dma_ctrl_flags - DMA flags to augment operation preparation,
|
||||
@@ -269,7 +350,7 @@ enum dma_slave_buswidth {
|
||||
* struct, if applicable.
|
||||
*/
|
||||
struct dma_slave_config {
|
||||
enum dma_data_direction direction;
|
||||
enum dma_transfer_direction direction;
|
||||
dma_addr_t src_addr;
|
||||
dma_addr_t dst_addr;
|
||||
enum dma_slave_buswidth src_addr_width;
|
||||
@@ -433,6 +514,7 @@ struct dma_tx_state {
|
||||
* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
|
||||
* The function takes a buffer of size buf_len. The callback function will
|
||||
* be called after period_len bytes have been transferred.
|
||||
* @device_prep_interleaved_dma: Transfer expression in a generic way.
|
||||
* @device_control: manipulate all pending operations on a channel, returns
|
||||
* zero or error code
|
||||
* @device_tx_status: poll for transaction completion, the optional
|
||||
@@ -492,11 +574,14 @@ struct dma_device {
|
||||
|
||||
struct dma_async_tx_descriptor *(*device_prep_slave_sg)(
|
||||
struct dma_chan *chan, struct scatterlist *sgl,
|
||||
unsigned int sg_len, enum dma_data_direction direction,
|
||||
unsigned int sg_len, enum dma_transfer_direction direction,
|
||||
unsigned long flags);
|
||||
struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
|
||||
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
|
||||
size_t period_len, enum dma_data_direction direction);
|
||||
size_t period_len, enum dma_transfer_direction direction);
|
||||
struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
|
||||
struct dma_chan *chan, struct dma_interleaved_template *xt,
|
||||
unsigned long flags);
|
||||
int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
||||
unsigned long arg);
|
||||
|
||||
@@ -522,7 +607,7 @@ static inline int dmaengine_slave_config(struct dma_chan *chan,
|
||||
|
||||
static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
|
||||
struct dma_chan *chan, void *buf, size_t len,
|
||||
enum dma_data_direction dir, unsigned long flags)
|
||||
enum dma_transfer_direction dir, unsigned long flags)
|
||||
{
|
||||
struct scatterlist sg;
|
||||
sg_init_one(&sg, buf, len);
|
||||
|
||||
@@ -72,7 +72,7 @@ typedef enum fe_caps {
|
||||
|
||||
struct dvb_frontend_info {
|
||||
char name[128];
|
||||
fe_type_t type;
|
||||
fe_type_t type; /* DEPRECATED. Use DTV_ENUM_DELSYS instead */
|
||||
__u32 frequency_min;
|
||||
__u32 frequency_max;
|
||||
__u32 frequency_stepsize;
|
||||
@@ -181,6 +181,7 @@ typedef enum fe_transmit_mode {
|
||||
TRANSMISSION_MODE_32K,
|
||||
} fe_transmit_mode_t;
|
||||
|
||||
#if defined(__DVB_CORE__) || !defined (__KERNEL__)
|
||||
typedef enum fe_bandwidth {
|
||||
BANDWIDTH_8_MHZ,
|
||||
BANDWIDTH_7_MHZ,
|
||||
@@ -190,7 +191,7 @@ typedef enum fe_bandwidth {
|
||||
BANDWIDTH_10_MHZ,
|
||||
BANDWIDTH_1_712_MHZ,
|
||||
} fe_bandwidth_t;
|
||||
|
||||
#endif
|
||||
|
||||
typedef enum fe_guard_interval {
|
||||
GUARD_INTERVAL_1_32,
|
||||
@@ -213,6 +214,7 @@ typedef enum fe_hierarchy {
|
||||
} fe_hierarchy_t;
|
||||
|
||||
|
||||
#if defined(__DVB_CORE__) || !defined (__KERNEL__)
|
||||
struct dvb_qpsk_parameters {
|
||||
__u32 symbol_rate; /* symbol rate in Symbols per second */
|
||||
fe_code_rate_t fec_inner; /* forward error correction (see above) */
|
||||
@@ -251,11 +253,11 @@ struct dvb_frontend_parameters {
|
||||
} u;
|
||||
};
|
||||
|
||||
|
||||
struct dvb_frontend_event {
|
||||
fe_status_t status;
|
||||
struct dvb_frontend_parameters parameters;
|
||||
};
|
||||
#endif
|
||||
|
||||
/* S2API Commands */
|
||||
#define DTV_UNDEFINED 0
|
||||
@@ -316,7 +318,9 @@ struct dvb_frontend_event {
|
||||
|
||||
#define DTV_DVBT2_PLP_ID 43
|
||||
|
||||
#define DTV_MAX_COMMAND DTV_DVBT2_PLP_ID
|
||||
#define DTV_ENUM_DELSYS 44
|
||||
|
||||
#define DTV_MAX_COMMAND DTV_ENUM_DELSYS
|
||||
|
||||
typedef enum fe_pilot {
|
||||
PILOT_ON,
|
||||
@@ -333,7 +337,7 @@ typedef enum fe_rolloff {
|
||||
|
||||
typedef enum fe_delivery_system {
|
||||
SYS_UNDEFINED,
|
||||
SYS_DVBC_ANNEX_AC,
|
||||
SYS_DVBC_ANNEX_A,
|
||||
SYS_DVBC_ANNEX_B,
|
||||
SYS_DVBT,
|
||||
SYS_DSS,
|
||||
@@ -350,8 +354,13 @@ typedef enum fe_delivery_system {
|
||||
SYS_DAB,
|
||||
SYS_DVBT2,
|
||||
SYS_TURBO,
|
||||
SYS_DVBC_ANNEX_C,
|
||||
} fe_delivery_system_t;
|
||||
|
||||
|
||||
#define SYS_DVBC_ANNEX_AC SYS_DVBC_ANNEX_A
|
||||
|
||||
|
||||
struct dtv_cmds_h {
|
||||
char *name; /* A display name for debugging purposes */
|
||||
|
||||
|
||||
@@ -24,6 +24,6 @@
|
||||
#define _DVBVERSION_H_
|
||||
|
||||
#define DVB_API_VERSION 5
|
||||
#define DVB_API_VERSION_MINOR 4
|
||||
#define DVB_API_VERSION_MINOR 5
|
||||
|
||||
#endif /*_DVBVERSION_H_*/
|
||||
|
||||
@@ -127,7 +127,7 @@ struct dw_cyclic_desc {
|
||||
|
||||
struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
|
||||
dma_addr_t buf_addr, size_t buf_len, size_t period_len,
|
||||
enum dma_data_direction direction);
|
||||
enum dma_transfer_direction direction);
|
||||
void dw_dma_cyclic_free(struct dma_chan *chan);
|
||||
int dw_dma_cyclic_start(struct dma_chan *chan);
|
||||
void dw_dma_cyclic_stop(struct dma_chan *chan);
|
||||
|
||||
97
include/linux/dynamic_queue_limits.h
Normal file
97
include/linux/dynamic_queue_limits.h
Normal file
@@ -0,0 +1,97 @@
|
||||
/*
|
||||
* Dynamic queue limits (dql) - Definitions
|
||||
*
|
||||
* Copyright (c) 2011, Tom Herbert <therbert@google.com>
|
||||
*
|
||||
* This header file contains the definitions for dynamic queue limits (dql).
|
||||
* dql would be used in conjunction with a producer/consumer type queue
|
||||
* (possibly a HW queue). Such a queue would have these general properties:
|
||||
*
|
||||
* 1) Objects are queued up to some limit specified as number of objects.
|
||||
* 2) Periodically a completion process executes which retires consumed
|
||||
* objects.
|
||||
* 3) Starvation occurs when limit has been reached, all queued data has
|
||||
* actually been consumed, but completion processing has not yet run
|
||||
* so queuing new data is blocked.
|
||||
* 4) Minimizing the amount of queued data is desirable.
|
||||
*
|
||||
* The goal of dql is to calculate the limit as the minimum number of objects
|
||||
* needed to prevent starvation.
|
||||
*
|
||||
* The primary functions of dql are:
|
||||
* dql_queued - called when objects are enqueued to record number of objects
|
||||
* dql_avail - returns how many objects are available to be queued based
|
||||
* on the object limit and how many objects are already enqueued
|
||||
* dql_completed - called at completion time to indicate how many objects
|
||||
* were retired from the queue
|
||||
*
|
||||
* The dql implementation does not implement any locking for the dql data
|
||||
* structures, the higher layer should provide this. dql_queued should
|
||||
* be serialized to prevent concurrent execution of the function; this
|
||||
* is also true for dql_completed. However, dql_queued and dlq_completed can
|
||||
* be executed concurrently (i.e. they can be protected by different locks).
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_DQL_H
|
||||
#define _LINUX_DQL_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
struct dql {
|
||||
/* Fields accessed in enqueue path (dql_queued) */
|
||||
unsigned int num_queued; /* Total ever queued */
|
||||
unsigned int adj_limit; /* limit + num_completed */
|
||||
unsigned int last_obj_cnt; /* Count at last queuing */
|
||||
|
||||
/* Fields accessed only by completion path (dql_completed) */
|
||||
|
||||
unsigned int limit ____cacheline_aligned_in_smp; /* Current limit */
|
||||
unsigned int num_completed; /* Total ever completed */
|
||||
|
||||
unsigned int prev_ovlimit; /* Previous over limit */
|
||||
unsigned int prev_num_queued; /* Previous queue total */
|
||||
unsigned int prev_last_obj_cnt; /* Previous queuing cnt */
|
||||
|
||||
unsigned int lowest_slack; /* Lowest slack found */
|
||||
unsigned long slack_start_time; /* Time slacks seen */
|
||||
|
||||
/* Configuration */
|
||||
unsigned int max_limit; /* Max limit */
|
||||
unsigned int min_limit; /* Minimum limit */
|
||||
unsigned int slack_hold_time; /* Time to measure slack */
|
||||
};
|
||||
|
||||
/* Set some static maximums */
|
||||
#define DQL_MAX_OBJECT (UINT_MAX / 16)
|
||||
#define DQL_MAX_LIMIT ((UINT_MAX / 2) - DQL_MAX_OBJECT)
|
||||
|
||||
/*
|
||||
* Record number of objects queued. Assumes that caller has already checked
|
||||
* availability in the queue with dql_avail.
|
||||
*/
|
||||
static inline void dql_queued(struct dql *dql, unsigned int count)
|
||||
{
|
||||
BUG_ON(count > DQL_MAX_OBJECT);
|
||||
|
||||
dql->num_queued += count;
|
||||
dql->last_obj_cnt = count;
|
||||
}
|
||||
|
||||
/* Returns how many objects can be queued, < 0 indicates over limit. */
|
||||
static inline int dql_avail(const struct dql *dql)
|
||||
{
|
||||
return dql->adj_limit - dql->num_queued;
|
||||
}
|
||||
|
||||
/* Record number of completed objects and recalculate the limit. */
|
||||
void dql_completed(struct dql *dql, unsigned int count);
|
||||
|
||||
/* Reset dql state */
|
||||
void dql_reset(struct dql *dql);
|
||||
|
||||
/* Initialize dql state */
|
||||
int dql_init(struct dql *dql, unsigned hold_time);
|
||||
|
||||
#endif /* _KERNEL_ */
|
||||
|
||||
#endif /* _LINUX_DQL_H */
|
||||
@@ -13,7 +13,7 @@
|
||||
#define _LINUX_EDAC_H_
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
#define EDAC_OPSTATE_INVAL -1
|
||||
#define EDAC_OPSTATE_POLL 0
|
||||
@@ -23,12 +23,12 @@
|
||||
extern int edac_op_state;
|
||||
extern int edac_err_assert;
|
||||
extern atomic_t edac_handlers;
|
||||
extern struct sysdev_class edac_class;
|
||||
extern struct bus_type edac_subsys;
|
||||
|
||||
extern int edac_handler_set(void);
|
||||
extern void edac_atomic_assert_error(void);
|
||||
extern struct sysdev_class *edac_get_sysfs_class(void);
|
||||
extern void edac_put_sysfs_class(void);
|
||||
extern struct bus_type *edac_get_sysfs_subsys(void);
|
||||
extern void edac_put_sysfs_subsys(void);
|
||||
|
||||
static inline void opstate_init(void)
|
||||
{
|
||||
|
||||
@@ -33,6 +33,7 @@
|
||||
#define PCI_EEPROM_WIDTH_93C86 8
|
||||
#define PCI_EEPROM_WIDTH_OPCODE 3
|
||||
#define PCI_EEPROM_WRITE_OPCODE 0x05
|
||||
#define PCI_EEPROM_ERASE_OPCODE 0x07
|
||||
#define PCI_EEPROM_READ_OPCODE 0x06
|
||||
#define PCI_EEPROM_EWDS_OPCODE 0x10
|
||||
#define PCI_EEPROM_EWEN_OPCODE 0x13
|
||||
@@ -46,6 +47,7 @@
|
||||
* @register_write(struct eeprom_93cx6 *eeprom): handler to
|
||||
* write to the eeprom register by using all reg_* fields.
|
||||
* @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
|
||||
* @drive_data: Set if we're driving the data line.
|
||||
* @reg_data_in: register field to indicate data input
|
||||
* @reg_data_out: register field to indicate data output
|
||||
* @reg_data_clock: register field to set the data clock
|
||||
@@ -62,6 +64,7 @@ struct eeprom_93cx6 {
|
||||
|
||||
int width;
|
||||
|
||||
char drive_data;
|
||||
char reg_data_in;
|
||||
char reg_data_out;
|
||||
char reg_data_clock;
|
||||
@@ -72,3 +75,8 @@ extern void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom,
|
||||
const u8 word, u16 *data);
|
||||
extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
|
||||
const u8 word, __le16 *data, const u16 words);
|
||||
|
||||
extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
|
||||
|
||||
extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
|
||||
u8 addr, u16 data);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user