From 92724c03fa4b9f924b2cde0d8371c0208ecf119a Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 24 Apr 2018 13:47:00 +0900 Subject: [PATCH 1/2] ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node The GIO clock/reset, Another MAC clock, and the PHY clock are required for the ethernet of Pro4 SoC. And add clock-names and reset-names to the ethernet node of PXs2 since we need to distinguish clocks and resets now. Suggested-by: Masahiro Yamada Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-pro4.dtsi | 7 +++++-- arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 ++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 844124bc9c9c..392d7dd6bc06 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -371,8 +371,11 @@ eth: ethernet@65000000 { interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; - clocks = <&sys_clk 6>; - resets = <&sys_rst 6>; + clock-names = "gio", "ether", "ether-gb", "ether-phy"; + clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, + <&sys_clk 10>; + reset-names = "gio", "ether"; + resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index debcbd15c24b..a1839db6e913 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -506,7 +506,9 @@ eth: ethernet@65000000 { interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; From 526f872b8492fbfb1a0f342e601bdc5ba322f16b Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 24 Apr 2018 13:47:02 +0900 Subject: [PATCH 2/2] ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node Add syscon-phy-mode property specifying a phandle of system controller to each ethernet node. Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/boot/dts/uniphier-pxs2.dtsi | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi index 392d7dd6bc06..49539f035219 100644 --- a/arch/arm/boot/dts/uniphier-pro4.dtsi +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi @@ -286,7 +286,7 @@ usb3: usb@5a810100 { has-transaction-translator; }; - soc-glue@5f800000 { + soc_glue: soc-glue@5f800000 { compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -378,6 +378,7 @@ eth: ethernet@65000000 { resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index a1839db6e913..641d96119d4f 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -512,6 +512,7 @@ eth: ethernet@65000000 { resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>;